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Kernel
提交 7efb35af 编写于 作者: S Steve French
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Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6

上级 748c5151 55b70a03
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MAINTAINERS
浏览文件 @ 7efb35af
......@@ -1963,11 +1963,6 @@ M: adaplas@gmail.com
L: linux-fbdev-devel@lists.sourceforge.net (subscribers-only)
S: Maintained
INTEL APIC/IOAPIC, LOWLEVEL X86 SMP SUPPORT
P: Ingo Molnar
M: mingo@redhat.com
S: Maintained
INTEL I8XX RANDOM NUMBER GENERATOR SUPPORT
P: Jeff Garzik
M: jgarzik@pobox.com
......@@ -4269,9 +4264,15 @@ M: jacmet@sunsite.dk
L: linux-serial@vger.kernel.org
S: Maintained
X86 3-LEVEL PAGING (PAE) SUPPORT
X86 ARCHITECTURE (32-BIT AND 64-BIT)
P: Thomas Gleixner
M: tglx@linutronix.de
P: Ingo Molnar
M: mingo@redhat.com
P: H. Peter Anvin
M: hpa@zytor.com
L: linux-kernel@vger.kernel.org
T: git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git
S: Maintained
YAM DRIVER FOR AX.25
......
Makefile
浏览文件 @ 7efb35af
......@@ -1505,7 +1505,7 @@ quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN $(wildcard $(rm-files))
# and we build for the host arch
quiet_cmd_depmod = DEPMOD $(KERNELRELEASE)
cmd_depmod = \
if [ -r System.map -a -x $(DEPMOD) -a "$(SUBARCH)" == "$(ARCH)" ]; then \
if [ -r System.map -a -x $(DEPMOD) -a "$(SUBARCH)" = "$(ARCH)" ]; then \
$(DEPMOD) -ae -F System.map \
$(if $(strip $(INSTALL_MOD_PATH)), -b $(INSTALL_MOD_PATH) -r) \
$(KERNELRELEASE); \
......
arch/blackfin/Kconfig
浏览文件 @ 7efb35af
......@@ -71,7 +71,7 @@ config GENERIC_CALIBRATE_DELAY
config IRQCHIP_DEMUX_GPIO
bool
depends on (BF53x || BF561 || BF54x)
depends on (BF52x || BF53x || BF561 || BF54x)
default y
source "init/Kconfig"
......@@ -85,6 +85,21 @@ choice
prompt "CPU"
default BF533
config BF522
bool "BF522"
help
BF522 Processor Support.
config BF525
bool "BF525"
help
BF525 Processor Support.
config BF527
bool "BF527"
help
BF527 Processor Support.
config BF531
bool "BF531"
help
......@@ -144,13 +159,18 @@ endchoice
choice
prompt "Silicon Rev"
default BF_REV_0_1 if BF527
default BF_REV_0_2 if BF537
default BF_REV_0_3 if BF533
default BF_REV_0_0 if BF549
config BF_REV_0_0
bool "0.0"
depends on (BF549)
depends on (BF549 || BF527)
config BF_REV_0_1
bool "0.2"
depends on (BF549 || BF527)
config BF_REV_0_2
bool "0.2"
......@@ -176,6 +196,11 @@ config BF_REV_NONE
endchoice
config BF52x
bool
depends on (BF522 || BF525 || BF527)
default y
config BF53x
bool
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
......@@ -204,6 +229,12 @@ choice
configuration to ensure that all the other settings are
correct.
config BFIN527_EZKIT
bool "BF527-EZKIT"
depends on (BF522 || BF525 || BF527)
help
BF533-EZKIT-LITE board Support.
config BFIN533_EZKIT
bool "BF533-EZKIT"
depends on (BF533 || BF532 || BF531)
......@@ -299,11 +330,17 @@ config MEM_MT48LC8M32B2B5_7
depends on (BFIN561_BLUETECHNIX_CM)
default y
config MEM_MT48LC32M16A2TG_75
bool
depends on (BFIN527_EZKIT)
default y
config BFIN_SHARED_FLASH_ENET
bool
depends on (BFIN533_STAMP)
default y
source "arch/blackfin/mach-bf527/Kconfig"
source "arch/blackfin/mach-bf533/Kconfig"
source "arch/blackfin/mach-bf561/Kconfig"
source "arch/blackfin/mach-bf537/Kconfig"
......@@ -329,7 +366,7 @@ config CLKIN_HZ
int "Crystal Frequency in Hz"
default "11059200" if BFIN533_STAMP
default "27000000" if BFIN533_EZKIT
default "25000000" if BFIN537_STAMP
default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT)
default "30000000" if BFIN561_EZKIT
default "24576000" if PNAV10
help
......@@ -362,7 +399,7 @@ config VCO_MULT
range 1 64
default "22" if BFIN533_EZKIT
default "45" if BFIN533_STAMP
default "20" if BFIN537_STAMP
default "20" if (BFIN537_STAMP || BFIN527_EZKIT)
default "22" if BFIN533_BLUETECHNIX_CM
default "20" if BFIN537_BLUETECHNIX_CM
default "20" if BFIN561_BLUETECHNIX_CM
......@@ -398,7 +435,7 @@ config SCLK_DIV
range 1 15
default 5 if BFIN533_EZKIT
default 5 if BFIN533_STAMP
default 4 if BFIN537_STAMP
default 4 if (BFIN537_STAMP || BFIN527_EZKIT)
default 5 if BFIN533_BLUETECHNIX_CM
default 4 if BFIN537_BLUETECHNIX_CM
default 4 if BFIN561_BLUETECHNIX_CM
......@@ -450,6 +487,7 @@ comment "Memory Setup"
config MEM_SIZE
int "SDRAM Memory Size in MBytes"
default 32 if BFIN533_EZKIT
default 64 if BFIN527_EZKIT
default 64 if BFIN537_STAMP
default 64 if BFIN561_EZKIT
default 128 if BFIN533_STAMP
......@@ -459,6 +497,7 @@ config MEM_ADD_WIDTH
int "SDRAM Memory Address Width"
default 9 if BFIN533_EZKIT
default 9 if BFIN561_EZKIT
default 10 if BFIN527_EZKIT
default 10 if BFIN537_STAMP
default 11 if BFIN533_STAMP
default 10 if PNAV10
......@@ -749,9 +788,19 @@ config LARGE_ALLOCS
a lot of RAM, and you need to able to allocate very large
contiguous chunks. If unsure, say N.
config BFIN_GPTIMERS
tristate "Enable Blackfin General Purpose Timers API"
default n
help
Enable support for the General Purpose Timers API. If you
are unsure, say N.
To compile this driver as a module, choose M here: the module
will be called gptimers.ko.
config BFIN_DMA_5XX
bool "Enable DMA Support"
depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
depends on (BF52x || BF53x || BF561 || BF54x)
default y
help
DMA driver for BF5xx.
......
arch/blackfin/Makefile
浏览文件 @ 7efb35af
......@@ -12,12 +12,17 @@ LDFLAGS_vmlinux := -X
OBJCOPYFLAGS := -O binary -R .note -R .comment -S
GZFLAGS := -9
CFLAGS += $(call cc-option,-mno-fdpic)
AFLAGS += $(call cc-option,-mno-fdpic)
CFLAGS_MODULE += -mlong-calls
KALLSYMS += --symbol-prefix=_
KBUILD_DEFCONFIG := BF537-STAMP_defconfig
# setup the machine name and the machine dependent settings
machine-$(CONFIG_BF522) := bf527
machine-$(CONFIG_BF525) := bf527
machine-$(CONFIG_BF527) := bf527
machine-$(CONFIG_BF531) := bf533
machine-$(CONFIG_BF532) := bf533
machine-$(CONFIG_BF533) := bf533
......@@ -32,6 +37,9 @@ machine-$(CONFIG_BF561) := bf561
MACHINE := $(machine-y)
export MACHINE
cpu-$(CONFIG_BF522) := bf522
cpu-$(CONFIG_BF525) := bf525
cpu-$(CONFIG_BF527) := bf527
cpu-$(CONFIG_BF531) := bf531
cpu-$(CONFIG_BF532) := bf532
cpu-$(CONFIG_BF533) := bf533
......@@ -97,12 +105,23 @@ archclean:
$(Q)$(MAKE) $(clean)=$(boot)
all: vmImage
boot := arch/$(ARCH)/boot
BOOT_TARGETS = vmImage
.PHONY: $(BOOT_TARGETS)
PHONY += $(BOOT_TARGETS) install
KBUILD_IMAGE := $(boot)/vmImage
all: vmImage
$(BOOT_TARGETS): vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
install:
$(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) install
define archhelp
echo '* vmImage - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage)'
echo ' install - Install kernel using'
echo ' (your) ~/bin/$(CROSS_COMPILE)installkernel or'
echo ' (distribution) PATH: $(CROSS_COMPILE)installkernel or'
echo ' install to $$(INSTALL_PATH)'
endef
arch/blackfin/boot/Makefile
浏览文件 @ 7efb35af
......@@ -26,3 +26,6 @@ $(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
$(obj)/vmImage: $(obj)/vmlinux.gz
$(call if_changed,uimage)
@echo 'Kernel: $@ is ready'
install:
sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
arch/blackfin/boot/install.sh 0 → 100644
浏览文件 @ 7efb35af
#!/bin/sh
#
# arch/blackfin/boot/install.sh
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
# Copyright (C) 1995 by Linus Torvalds
#
# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
# Adapted from code in arch/i386/boot/install.sh by Mike Frysinger
#
# "make install" script for Blackfin architecture
#
# Arguments:
# $1 - kernel version
# $2 - kernel image file
# $3 - kernel map file
# $4 - default install path (blank if root directory)
#
verify () {
if [ ! -f "$1" ]; then
echo "" 1>&2
echo " *** Missing file: $1" 1>&2
echo ' *** You need to run "make" before "make install".' 1>&2
echo "" 1>&2
exit 1
fi
}
# Make sure the files actually exist
verify "$2"
verify "$3"
# User may have a custom install script
if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
if which ${CROSS_COMPILE}installkernel >/dev/null 2>&1; then
exec ${CROSS_COMPILE}installkernel "$@"
fi
# Default install - same as make zlilo
back_it_up() {
local file=$1
[ -f ${file} ] || return 0
local stamp=$(stat -c %Y ${file} 2>/dev/null)
mv ${file} ${file}.${stamp:-old}
}
back_it_up $4/uImage
back_it_up $4/System.map
cat $2 > $4/uImage
cp $3 $4/System.map
arch/blackfin/configs/BF527-EZKIT_defconfig 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/blackfin/configs/BF548-EZKIT_defconfig
浏览文件 @ 7efb35af
......@@ -809,7 +809,14 @@ CONFIG_UNIX98_PTYS=y
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
# CONFIG_WATCHDOG is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_BFIN_WDT=y
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
......
arch/blackfin/kernel/Makefile
浏览文件 @ 7efb35af
......@@ -9,6 +9,7 @@ obj-y := \
sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
fixed_code.o cplbinit.o cacheinit.o reboot.o bfin_gpio.o
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o
obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o
......
arch/blackfin/kernel/bfin_dma_5xx.c
浏览文件 @ 7efb35af
......@@ -420,6 +420,32 @@ unsigned short get_dma_curr_ycount(unsigned int channel)
}
EXPORT_SYMBOL(get_dma_curr_ycount);
unsigned long get_dma_next_desc_ptr(unsigned int channel)
{
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
return dma_ch[channel].regs->next_desc_ptr;
}
EXPORT_SYMBOL(get_dma_next_desc_ptr);
unsigned long get_dma_curr_desc_ptr(unsigned int channel)
{
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
return dma_ch[channel].regs->curr_desc_ptr;
}
unsigned long get_dma_curr_addr(unsigned int channel)
{
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
return dma_ch[channel].regs->curr_addr_ptr;
}
EXPORT_SYMBOL(get_dma_curr_addr);
static void *__dma_memcpy(void *dest, const void *src, size_t size)
{
int direction; /* 1 - address decrease, 0 - address increase */
......
arch/blackfin/kernel/bfin_gpio.c
浏览文件 @ 7efb35af
......@@ -124,7 +124,7 @@ static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
};
#endif
#ifdef BF537_FAMILY
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
(struct gpio_port_t *) PORTFIO,
(struct gpio_port_t *) PORTGIO,
......@@ -139,6 +139,21 @@ static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
#endif
#ifdef BF527_FAMILY
static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
(unsigned short *) PORTF_MUX,
(unsigned short *) PORTG_MUX,
(unsigned short *) PORTH_MUX,
};
static const
u8 pmux_offset[][16] =
{{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
{ 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
};
#endif
#ifdef BF561_FAMILY
static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
(struct gpio_port_t *) FIO0_FLAG_D,
......@@ -186,6 +201,10 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
#endif
#ifdef BF527_FAMILY
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
#endif
#ifdef BF561_FAMILY
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
#endif
......@@ -238,7 +257,7 @@ static int cmp_label(unsigned short ident, const char *label)
return -EINVAL;
}
#ifdef BF537_FAMILY
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
static void port_setup(unsigned short gpio, unsigned short usage)
{
if (!check_gpio(gpio)) {
......@@ -354,6 +373,18 @@ inline u16 get_portmux(unsigned short portno)
return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
}
#elif defined(BF527_FAMILY)
inline void portmux_setup(unsigned short portno, unsigned short function)
{
u16 pmux, ident = P_IDENT(portno);
u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
pmux = *port_mux[gpio_bank(ident)];
pmux &= ~(3 << offset);
pmux |= (function & 3) << offset;
*port_mux[gpio_bank(ident)] = pmux;
SSYNC();
}
#else
# define portmux_setup(...) do { } while (0)
#endif
......
arch/blackfin/kernel/gptimers.c 0 → 100644
浏览文件 @ 7efb35af
/*
* bfin_gptimers.c - derived from bf53x_timers.c
* Driver for General Purpose Timer functions on the Blackfin processor
*
* Copyright (C) 2005 John DeHority
* Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de)
*
* Licensed under the GPLv2.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/blackfin.h>
#include <asm/gptimers.h>
#ifdef DEBUG
# define tassert(expr)
#else
# define tassert(expr) \
if (!(expr)) \
printk(KERN_DEBUG "%s:%s:%i: Assertion failed: " #expr "\n", \
__FILE__, __func__, __LINE__);
#endif
#define BFIN_TIMER_NUM_GROUP (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1)
typedef struct {
uint16_t config;
uint16_t __pad;
uint32_t counter;
uint32_t period;
uint32_t width;
} GPTIMER_timer_regs;
typedef struct {
uint16_t enable;
uint16_t __pad0;
uint16_t disable;
uint16_t __pad1;
uint32_t status;
} GPTIMER_group_regs;
static volatile GPTIMER_timer_regs *const timer_regs[MAX_BLACKFIN_GPTIMERS] =
{
(GPTIMER_timer_regs *)TIMER0_CONFIG,
(GPTIMER_timer_regs *)TIMER1_CONFIG,
(GPTIMER_timer_regs *)TIMER2_CONFIG,
#if (MAX_BLACKFIN_GPTIMERS > 3)
(GPTIMER_timer_regs *)TIMER3_CONFIG,
(GPTIMER_timer_regs *)TIMER4_CONFIG,
(GPTIMER_timer_regs *)TIMER5_CONFIG,
(GPTIMER_timer_regs *)TIMER6_CONFIG,
(GPTIMER_timer_regs *)TIMER7_CONFIG,
#endif
#if (MAX_BLACKFIN_GPTIMERS > 8)
(GPTIMER_timer_regs *)TIMER8_CONFIG,
(GPTIMER_timer_regs *)TIMER9_CONFIG,
(GPTIMER_timer_regs *)TIMER10_CONFIG,
(GPTIMER_timer_regs *)TIMER11_CONFIG,
#endif
};
static volatile GPTIMER_group_regs *const group_regs[BFIN_TIMER_NUM_GROUP] =
{
(GPTIMER_group_regs *)TIMER0_GROUP_REG,
#if (MAX_BLACKFIN_GPTIMERS > 8)
(GPTIMER_group_regs *)TIMER8_GROUP_REG,
#endif
};
static uint32_t const dis_mask[MAX_BLACKFIN_GPTIMERS] =
{
TIMER_STATUS_TRUN0,
TIMER_STATUS_TRUN1,
TIMER_STATUS_TRUN2,
#if (MAX_BLACKFIN_GPTIMERS > 3)
TIMER_STATUS_TRUN3,
TIMER_STATUS_TRUN4,
TIMER_STATUS_TRUN5,
TIMER_STATUS_TRUN6,
TIMER_STATUS_TRUN7,
#endif
#if (MAX_BLACKFIN_GPTIMERS > 8)
TIMER_STATUS_TRUN8,
TIMER_STATUS_TRUN9,
TIMER_STATUS_TRUN10,
TIMER_STATUS_TRUN11,
#endif
};
static uint32_t const irq_mask[MAX_BLACKFIN_GPTIMERS] =
{
TIMER_STATUS_TIMIL0,
TIMER_STATUS_TIMIL1,
TIMER_STATUS_TIMIL2,
#if (MAX_BLACKFIN_GPTIMERS > 3)
TIMER_STATUS_TIMIL3,
TIMER_STATUS_TIMIL4,
TIMER_STATUS_TIMIL5,
TIMER_STATUS_TIMIL6,
TIMER_STATUS_TIMIL7,
#endif
#if (MAX_BLACKFIN_GPTIMERS > 8)
TIMER_STATUS_TIMIL8,
TIMER_STATUS_TIMIL9,
TIMER_STATUS_TIMIL10,
TIMER_STATUS_TIMIL11,
#endif
};
void set_gptimer_pwidth(int timer_id, uint32_t value)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
timer_regs[timer_id]->width = value;
SSYNC();
}
EXPORT_SYMBOL(set_gptimer_pwidth);
uint32_t get_gptimer_pwidth(int timer_id)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
return timer_regs[timer_id]->width;
}
EXPORT_SYMBOL(get_gptimer_pwidth);
void set_gptimer_period(int timer_id, uint32_t period)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
timer_regs[timer_id]->period = period;
SSYNC();
}
EXPORT_SYMBOL(set_gptimer_period);
uint32_t get_gptimer_period(int timer_id)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
return timer_regs[timer_id]->period;
}
EXPORT_SYMBOL(get_gptimer_period);
uint32_t get_gptimer_count(int timer_id)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
return timer_regs[timer_id]->counter;
}
EXPORT_SYMBOL(get_gptimer_count);
uint32_t get_gptimer_status(int group)
{
tassert(group < BFIN_TIMER_NUM_GROUP);
return group_regs[group]->status;
}
EXPORT_SYMBOL(get_gptimer_status);
void set_gptimer_status(int group, uint32_t value)
{
tassert(group < BFIN_TIMER_NUM_GROUP);
group_regs[group]->status = value;
SSYNC();
}
EXPORT_SYMBOL(set_gptimer_status);
uint16_t get_gptimer_intr(int timer_id)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & irq_mask[timer_id]) ? 1 : 0;
}
EXPORT_SYMBOL(get_gptimer_intr);
void clear_gptimer_intr(int timer_id)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
group_regs[BFIN_TIMER_OCTET(timer_id)]->status = irq_mask[timer_id];
}
EXPORT_SYMBOL(clear_gptimer_intr);
void set_gptimer_config(int timer_id, uint16_t config)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
timer_regs[timer_id]->config = config;
SSYNC();
}
EXPORT_SYMBOL(set_gptimer_config);
uint16_t get_gptimer_config(int timer_id)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
return timer_regs[timer_id]->config;
}
EXPORT_SYMBOL(get_gptimer_config);
void enable_gptimers(uint16_t mask)
{
int i;
tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0);
for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) {
group_regs[i]->enable = mask & 0xFF;
mask >>= 8;
}
SSYNC();
}
EXPORT_SYMBOL(enable_gptimers);
void disable_gptimers(uint16_t mask)
{
int i;
uint16_t m = mask;
tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0);
for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) {
group_regs[i]->disable = m & 0xFF;
m >>= 8;
}
for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i)
if (mask & (1 << i))
group_regs[BFIN_TIMER_OCTET(i)]->status |= dis_mask[i];
SSYNC();
}
EXPORT_SYMBOL(disable_gptimers);
void set_gptimer_pulse_hi(int timer_id)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
timer_regs[timer_id]->config |= TIMER_PULSE_HI;
SSYNC();
}
EXPORT_SYMBOL(set_gptimer_pulse_hi);
void clear_gptimer_pulse_hi(int timer_id)
{
tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
timer_regs[timer_id]->config &= ~TIMER_PULSE_HI;
SSYNC();
}
EXPORT_SYMBOL(clear_gptimer_pulse_hi);
uint16_t get_enabled_gptimers(void)
{
int i;
uint16_t result = 0;
for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i)
result |= (group_regs[i]->enable << (i << 3));
return result;
}
EXPORT_SYMBOL(get_enabled_gptimers);
MODULE_AUTHOR("Axel Weiss (awe@aglaia-gmbh.de)");
MODULE_DESCRIPTION("Blackfin General Purpose Timers API");
MODULE_LICENSE("GPL");
arch/blackfin/kernel/reboot.c
浏览文件 @ 7efb35af
......@@ -11,7 +11,7 @@
#include <asm/reboot.h>
#include <asm/system.h>
#if defined(BF537_FAMILY) || defined(BF533_FAMILY)
#if defined(BF537_FAMILY) || defined(BF533_FAMILY) || defined(BF527_FAMILY)
#define SYSCR_VAL 0x0
#elif defined(BF561_FAMILY)
#define SYSCR_VAL 0x20
......
arch/blackfin/kernel/setup.c
浏览文件 @ 7efb35af
......@@ -459,7 +459,7 @@ static u_long get_vco(void)
return vco;
}
/*Get the Core clock*/
/* Get the Core clock */
u_long get_cclk(void)
{
u_long csel, ssel;
......@@ -493,12 +493,24 @@ u_long get_sclk(void)
}
EXPORT_SYMBOL(get_sclk);
unsigned long sclk_to_usecs(unsigned long sclk)
{
return (USEC_PER_SEC * (u64)sclk) / get_sclk();
}
EXPORT_SYMBOL(sclk_to_usecs);
unsigned long usecs_to_sclk(unsigned long usecs)
{
return get_sclk() / (USEC_PER_SEC * (u64)usecs);
}
EXPORT_SYMBOL(usecs_to_sclk);
/*
* Get CPU information for use by the procfs.
*/
static int show_cpuinfo(struct seq_file *m, void *v)
{
char *cpu, *mmu, *fpu, *name;
char *cpu, *mmu, *fpu, *vendor, *cache;
uint32_t revid;
u_long cclk = 0, sclk = 0;
......@@ -508,70 +520,83 @@ static int show_cpuinfo(struct seq_file *m, void *v)
mmu = "none";
fpu = "none";
revid = bfin_revid();
name = bfin_board_name;
cclk = get_cclk();
sclk = get_sclk();
seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
"MMU:\t\t%s\n"
"FPU:\t\t%s\n"
"Core Clock:\t%9lu Hz\n"
"System Clock:\t%9lu Hz\n"
"BogoMips:\t%lu.%02lu\n"
"Calibration:\t%lu loops\n",
cpu, revid, mmu, fpu,
cclk,
sclk,
(loops_per_jiffy * HZ) / 500000,
((loops_per_jiffy * HZ) / 5000) % 100,
(loops_per_jiffy * HZ));
seq_printf(m, "Board Name:\t%s\n", name);
seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20);
seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20);
if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC))
seq_printf(m, "I-CACHE:\tON\n");
else
seq_printf(m, "I-CACHE:\tOFF\n");
if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
seq_printf(m, "D-CACHE:\tON"
#if defined CONFIG_BFIN_WB
" (write-back)"
#elif defined CONFIG_BFIN_WT
" (write-through)"
#endif
"\n");
else
seq_printf(m, "D-CACHE:\tOFF\n");
switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
case 0xca:
vendor = "Analog Devices";
break;
default:
vendor = "unknown";
break;
}
seq_printf(m, "processor\t: %d\n"
"vendor_id\t: %s\n"
"cpu family\t: 0x%x\n"
"model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n"
"stepping\t: %d\n",
0,
vendor,
(bfin_read_CHIPID() & CHIPID_FAMILY),
cpu, cclk/1000000, sclk/1000000,
revid);
seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
cclk/1000000, cclk%1000000,
sclk/1000000, sclk%1000000);
seq_printf(m, "bogomips\t: %lu.%02lu\n"
"Calibration\t: %lu loops\n",
(loops_per_jiffy * HZ) / 500000,
((loops_per_jiffy * HZ) / 5000) % 100,
(loops_per_jiffy * HZ));
/* Check Cache configutation */
switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
case ACACHE_BSRAM:
seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
cache = "dbank-A/B\t: cache/sram";
dcache_size = 16;
dsup_banks = 1;
break;
case ACACHE_BCACHE:
seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
cache = "dbank-A/B\t: cache/cache";
dcache_size = 32;
dsup_banks = 2;
break;
case ASRAM_BSRAM:
seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
cache = "dbank-A/B\t: sram/sram";
dcache_size = 0;
dsup_banks = 0;
break;
default:
cache = "unknown";
dcache_size = 0;
dsup_banks = 0;
break;
}
/* Is it turned on? */
if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)))
dcache_size = 0;
seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
seq_printf(m, "cache size\t: %d KB(L1 icache) "
"%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
BFIN_ICACHESIZE / 1024, dcache_size,
#if defined CONFIG_BFIN_WB
"wb"
#elif defined CONFIG_BFIN_WT
"wt"
#endif
, 0);
seq_printf(m, "%s\n", cache);
seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
seq_printf(m,
"D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
"dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
BFIN_DLINES);
#ifdef CONFIG_BFIN_ICACHE_LOCK
......@@ -625,6 +650,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "No Ways are locked\n");
}
#endif
seq_printf(m, "board name\t: %s\n", bfin_board_name);
seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
((int)memory_end - (int)_stext) >> 10,
_stext,
(void *)memory_end);
return 0;
}
......
arch/blackfin/kernel/traps.c
浏览文件 @ 7efb35af
......@@ -118,12 +118,14 @@ static int printk_address(unsigned long address)
offset = (address - vma->vm_start) + (vma->vm_pgoff << PAGE_SHIFT);
write_unlock_irq(&tasklist_lock);
mmput(mm);
return printk("<0x%p> [ %s + 0x%lx ]",
(void *)address, name, offset);
}
vml = vml->next;
}
mmput(mm);
}
write_unlock_irq(&tasklist_lock);
......
arch/blackfin/lib/Makefile
浏览文件 @ 7efb35af
......@@ -4,7 +4,7 @@
lib-y := \
ashldi3.o ashrdi3.o lshrdi3.o \
muldi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \
muldi3.o divsi3.o udivsi3.o udivdi3.o modsi3.o umodsi3.o \
checksum.o memcpy.o memset.o memcmp.o memchr.o memmove.o \
strcmp.o strcpy.o strncmp.o strncpy.o \
umulsi3_highpart.o smulsi3_highpart.o \
......
arch/blackfin/lib/udivdi3.S 0 → 100644
浏览文件 @ 7efb35af
/*
* udivdi3.S - unsigned long long division
*
* Copyright 2003-2007 Analog Devices Inc.
* Enter bugs at http://blackfin.uclinux.org/
*
* Licensed under the GPLv2 or later.
*/
#include <linux/linkage.h>
#define CARRY AC0
#ifdef CONFIG_ARITHMETIC_OPS_L1
.section .l1.text
#else
.text
#endif
ENTRY(___udivdi3)
R3 = [SP + 12];
[--SP] = (R7:4, P5:3);
/* Attempt to use divide primitive first; these will handle
** most cases, and they're quick - avoids stalls incurred by
** testing for identities.
*/
R4 = R2 | R3;
CC = R4 == 0;
IF CC JUMP .LDIV_BY_ZERO;
R4.H = 0x8000;
R4 >>>= 16; // R4 now 0xFFFF8000
R5 = R0 | R2; // If either dividend or
R4 = R5 & R4; // divisor have bits in
CC = R4; // top half or low half's sign
IF CC JUMP .LIDENTS; // bit, skip builtins.
R4 = R1 | R3; // Also check top halves
CC = R4;
IF CC JUMP .LIDENTS;
/* Can use the builtins. */
AQ = CC; // Clear AQ (CC==0)
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
DIVQ(R0, R2);
R0 = R0.L (Z);
R1 = 0;
(R7:4, P5:3) = [SP++];
RTS;
.LIDENTS:
/* Test for common identities. Value to be returned is
** placed in R6,R7.
*/
// Check for 0/y, return 0
R4 = R0 | R1;
CC = R4 == 0;
IF CC JUMP .LRETURN_R0;
// Check for x/x, return 1
R6 = R0 - R2; // If x == y, then both R6 and R7 will be zero
R7 = R1 - R3;
R4 = R6 | R7; // making R4 zero.
R6 += 1; // which would now make R6:R7==1.
CC = R4 == 0;
IF CC JUMP .LRETURN_IDENT;
// Check for x/1, return x
R6 = R0;
R7 = R1;
CC = R3 == 0;
IF !CC JUMP .Lnexttest;
CC = R2 == 1;
IF CC JUMP .LRETURN_IDENT;
.Lnexttest:
R4.L = ONES R2; // check for div by power of two which
R5.L = ONES R3; // can be done using a shift
R6 = PACK (R5.L, R4.L);
CC = R6 == 1;
IF CC JUMP .Lpower_of_two_upper_zero;
R6 = PACK (R4.L, R5.L);
CC = R6 == 1;
IF CC JUMP .Lpower_of_two_lower_zero;
// Check for x < y, return 0
R6 = 0;
R7 = R6;
CC = R1 < R3 (IU);
IF CC JUMP .LRETURN_IDENT;
CC = R1 == R3;
IF !CC JUMP .Lno_idents;
CC = R0 < R2 (IU);
IF CC JUMP .LRETURN_IDENT;
.Lno_idents: // Idents don't match. Go for the full operation
// If X, or X and Y have high bit set, it'll affect the
// results, so shift right one to stop this. Note: we've already
// checked that X >= Y, so Y's msb won't be set unless X's
// is.
R4 = 0;
CC = R1 < 0;
IF !CC JUMP .Lx_msb_clear;
CC = !CC; // 1 -> 0;
R1 = ROT R1 BY -1; // Shift X >> 1
R0 = ROT R0 BY -1; // lsb -> CC
BITSET(R4,31); // to record only x msb was set
CC = R3 < 0;
IF !CC JUMP .Ly_msb_clear;
CC = !CC;
R3 = ROT R3 BY -1; // Shift Y >> 1
R2 = ROT R2 BY -1;
BITCLR(R4,31); // clear bit to record only x msb was set
.Ly_msb_clear:
.Lx_msb_clear:
// Bit 31 in R4 indicates X msb set, but Y msb wasn't, and no bits
// were lost, so we should shift result left by one.
[--SP] = R4; // save for later
// In the loop that follows, each iteration we add
// either Y' or -Y' to the Remainder. We compute the
// negated Y', and store, for convenience. Y' goes
// into P0:P1, while -Y' goes into P2:P3.
P0 = R2;
P1 = R3;
R2 = -R2;
CC = CARRY;
CC = !CC;
R4 = CC;
R3 = -R3;
R3 = R3 - R4;
R6 = 0; // remainder = 0
R7 = R6;
[--SP] = R2; P2 = SP;
[--SP] = R3; P3 = SP;
[--SP] = R6; P5 = SP; // AQ = 0
[--SP] = P1;
/* In the loop that follows, we use the following
** register assignments:
** R0,R1 X, workspace
** R2,R3 Y, workspace
** R4,R5 partial Div
** R6,R7 partial remainder
** P5 AQ
** The remainder and div form a 128-bit number, with
** the remainder in the high 64-bits.
*/
R4 = R0; // Div = X'
R5 = R1;
R3 = 0;
P4 = 64; // Iterate once per bit
LSETUP(.LULST,.LULEND) LC0 = P4;
.LULST:
/* Shift Div and remainder up by one. The bit shifted
** out of the top of the quotient is shifted into the bottom
** of the remainder.
*/
CC = R3;
R4 = ROT R4 BY 1;
R5 = ROT R5 BY 1 || // low q to high q
R2 = [P5]; // load saved AQ
R6 = ROT R6 BY 1 || // high q to low r
R0 = [P2]; // load -Y'
R7 = ROT R7 BY 1 || // low r to high r
R1 = [P3];
// Assume add -Y'
CC = R2 < 0; // But if AQ is set...
IF CC R0 = P0; // then add Y' instead
IF CC R1 = P1;
R6 = R6 + R0; // Rem += (Y' or -Y')
CC = CARRY;
R0 = CC;
R7 = R7 + R1;
R7 = R7 + R0 (NS) ||
R1 = [SP];
// Set the next AQ bit
R1 = R7 ^ R1; // from Remainder and Y'
R1 = R1 >> 31 || // Negate AQ's value, and
[P5] = R1; // save next AQ
BITTGL(R1, 0); // add neg AQ to the Div
.LULEND: R4 = R4 + R1;
R6 = [SP + 16];
R0 = R4;
R1 = R5;
CC = BITTST(R6,30); // Just set CC=0
R4 = ROT R0 BY 1; // but if we had to shift X,
R5 = ROT R1 BY 1; // and didn't shift any bits out,
CC = BITTST(R6,31); // then the result will be half as
IF CC R0 = R4; // much as required, so shift left
IF CC R1 = R5; // one space.
SP += 20;
(R7:4, P5:3) = [SP++];
RTS;
.Lpower_of_two:
/* Y has a single bit set, which means it's a power of two.
** That means we can perform the division just by shifting
** X to the right the appropriate number of bits
*/
/* signbits returns the number of sign bits, minus one.
** 1=>30, 2=>29, ..., 0x40000000=>0. Which means we need
** to shift right n-signbits spaces. It also means 0x80000000
** is a special case, because that *also* gives a signbits of 0
*/
.Lpower_of_two_lower_zero:
R7 = 0;
R6 = R1 >> 31;
CC = R3 < 0;
IF CC JUMP .LRETURN_IDENT;
R2.L = SIGNBITS R3;
R2 = R2.L (Z);
R2 += -62;
(R7:4, P5:3) = [SP++];
JUMP ___lshftli;
.Lpower_of_two_upper_zero:
CC = R2 < 0;
IF CC JUMP .Lmaxint_shift;
R2.L = SIGNBITS R2;
R2 = R2.L (Z);
R2 += -30;
(R7:4, P5:3) = [SP++];
JUMP ___lshftli;
.Lmaxint_shift:
R2 = -31;
(R7:4, P5:3) = [SP++];
JUMP ___lshftli;
.LRETURN_IDENT:
R0 = R6;
R1 = R7;
.LRETURN_R0:
(R7:4, P5:3) = [SP++];
RTS;
.LDIV_BY_ZERO:
R0 = ~R2;
R1 = R0;
(R7:4, P5:3) = [SP++];
RTS;
ENDPROC(___udivdi3)
ENTRY(___lshftli)
CC = R2 == 0;
IF CC JUMP .Lfinished; // nothing to do
CC = R2 < 0;
IF CC JUMP .Lrshift;
R3 = 64;
CC = R2 < R3;
IF !CC JUMP .Lretzero;
// We're shifting left, and it's less than 64 bits, so
// a valid result will be returned.
R3 >>= 1; // R3 now 32
CC = R2 < R3;
IF !CC JUMP .Lzerohalf;
// We're shifting left, between 1 and 31 bits, which means
// some of the low half will be shifted into the high half.
// Work out how much.
R3 = R3 - R2;
// Save that much data from the bottom half.
P1 = R7;
R7 = R0;
R7 >>= R3;
// Adjust both parts of the parameter.
R0 <<= R2;
R1 <<= R2;
// And include the bits moved across.
R1 = R1 | R7;
R7 = P1;
RTS;
.Lzerohalf:
// We're shifting left, between 32 and 63 bits, so the
// bottom half will become zero, and the top half will
// lose some bits. How many?
R2 = R2 - R3; // N - 32
R1 = LSHIFT R0 BY R2.L;
R0 = R0 - R0;
RTS;
.Lretzero:
R0 = R0 - R0;
R1 = R0;
.Lfinished:
RTS;
.Lrshift:
// We're shifting right, but by how much?
R2 = -R2;
R3 = 64;
CC = R2 < R3;
IF !CC JUMP .Lretzero;
// Shifting right less than 64 bits, so some result bits will
// be retained.
R3 >>= 1; // R3 now 32
CC = R2 < R3;
IF !CC JUMP .Lsignhalf;
// Shifting right between 1 and 31 bits, so need to copy
// data across words.
P1 = R7;
R3 = R3 - R2;
R7 = R1;
R7 <<= R3;
R1 >>= R2;
R0 >>= R2;
R0 = R7 | R0;
R7 = P1;
RTS;
.Lsignhalf:
// Shifting right between 32 and 63 bits, so the top half
// will become all zero-bits, and the bottom half is some
// of the top half. But how much?
R2 = R2 - R3;
R0 = R1;
R0 >>= R2;
R1 = 0;
RTS;
ENDPROC(___lshftli)
arch/blackfin/mach-bf527/Kconfig 0 → 100644
浏览文件 @ 7efb35af
if (BF52x)
menu "BF527 Specific Configuration"
comment "Alternative Multiplexing Scheme"
choice
prompt "SPORT0"
default BF527_SPORT0_PORTG
help
Select PORT used for SPORT0. See Hardware Reference Manual
config BF527_SPORT0_PORTF
bool "PORT F"
help
PORT F
config BF527_SPORT0_PORTG
bool "PORT G"
help
PORT G
endchoice
choice
prompt "SPORT0 TSCLK Location"
depends on BF527_SPORT0_PORTG
default BF527_SPORT0_TSCLK_PG10
help
Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual
config BF527_SPORT0_TSCLK_PG10
bool "PORT PG10"
help
PORT PG10
config BF527_SPORT0_TSCLK_PG14
bool "PORT PG14"
help
PORT PG14
endchoice
choice
prompt "UART1"
default BF527_UART1_PORTG
help
Select PORT used for UART1. See Hardware Reference Manual
config BF527_UART1_PORTF
bool "PORT F"
help
PORT F
config BF527_UART1_PORTG
bool "PORT G"
help
PORT G
endchoice
choice
prompt "NAND (NFC) Data"
default BF527_NAND_D_PORTH
help
Select PORT used for NAND Data Bus. See Hardware Reference Manual
config BF527_NAND_D_PORTF
bool "PORT F"
help
PORT F
config BF527_NAND_D_PORTH
bool "PORT H"
help
PORT H
endchoice
comment "Interrupt Priority Assignment"
menu "Priority"
config IRQ_PLL_WAKEUP
int "IRQ_PLL_WAKEUP"
default 7
config IRQ_DMA0_ERROR
int "IRQ_DMA0_ERROR"
default 7
config IRQ_DMAR0_BLK
int "IRQ_DMAR0_BLK"
default 7
config IRQ_DMAR1_BLK
int "IRQ_DMAR1_BLK"
default 7
config IRQ_DMAR0_OVR
int "IRQ_DMAR0_OVR"
default 7
config IRQ_DMAR1_OVR
int "IRQ_DMAR1_OVR"
default 7
config IRQ_PPI_ERROR
int "IRQ_PPI_ERROR"
default 7
config IRQ_MAC_ERROR
int "IRQ_MAC_ERROR"
default 7
config IRQ_SPORT0_ERROR
int "IRQ_SPORT0_ERROR"
default 7
config IRQ_SPORT1_ERROR
int "IRQ_SPORT1_ERROR"
default 7
config IRQ_UART0_ERROR
int "IRQ_UART0_ERROR"
default 7
config IRQ_UART1_ERROR
int "IRQ_UART1_ERROR"
default 7
config IRQ_RTC
int "IRQ_RTC"
default 8
config IRQ_PPI
int "IRQ_PPI"
default 8
config IRQ_SPORT0_RX
int "IRQ_SPORT0_RX"
default 9
config IRQ_SPORT0_TX
int "IRQ_SPORT0_TX"
default 9
config IRQ_SPORT1_RX
int "IRQ_SPORT1_RX"
default 9
config IRQ_SPORT1_TX
int "IRQ_SPORT1_TX"
default 9
config IRQ_TWI
int "IRQ_TWI"
default 10
config IRQ_SPI
int "IRQ_SPI"
default 10
config IRQ_UART0_RX
int "IRQ_UART0_RX"
default 10
config IRQ_UART0_TX
int "IRQ_UART0_TX"
default 10
config IRQ_UART1_RX
int "IRQ_UART1_RX"
default 10
config IRQ_UART1_TX
int "IRQ_UART1_TX"
default 10
config IRQ_OPTSEC
int "IRQ_OPTSEC"
default 11
config IRQ_CNT
int "IRQ_CNT"
default 11
config IRQ_MAC_RX
int "IRQ_MAC_RX"
default 11
config IRQ_PORTH_INTA
int "IRQ_PORTH_INTA"
default 11
config IRQ_MAC_TX
int "IRQ_MAC_TX/NFC"
default 11
config IRQ_PORTH_INTB
int "IRQ_PORTH_INTB"
default 11
config IRQ_TMR0
int "IRQ_TMR0"
default 12
config IRQ_TMR1
int "IRQ_TMR1"
default 12
config IRQ_TMR2
int "IRQ_TMR2"
default 12
config IRQ_TMR3
int "IRQ_TMR3"
default 12
config IRQ_TMR4
int "IRQ_TMR4"
default 12
config IRQ_TMR5
int "IRQ_TMR5"
default 12
config IRQ_TMR6
int "IRQ_TMR6"
default 12
config IRQ_TMR7
int "IRQ_TMR7"
default 12
config IRQ_PORTG_INTA
int "IRQ_PORTG_INTA"
default 12
config IRQ_PORTG_INTB
int "IRQ_PORTG_INTB"
default 12
config IRQ_MEM_DMA0
int "IRQ_MEM_DMA0"
default 13
config IRQ_MEM_DMA1
int "IRQ_MEM_DMA1"
default 13
config IRQ_WATCH
int "IRQ_WATCH"
default 13
config IRQ_PORTF_INTA
int "IRQ_PORTF_INTA"
default 13
config IRQ_PORTF_INTB
int "IRQ_PORTF_INTB"
default 13
config IRQ_SPI_ERROR
int "IRQ_SPI_ERROR"
default 7
config IRQ_NFC_ERROR
int "IRQ_NFC_ERROR"
default 7
config IRQ_HDMA_ERROR
int "IRQ_HDMA_ERROR"
default 7
config IRQ_HDMA
int "IRQ_HDMA"
default 7
config IRQ_USB_EINT
int "IRQ_USB_EINT"
default 10
config IRQ_USB_INT0
int "IRQ_USB_INT0"
default 10
config IRQ_USB_INT1
int "IRQ_USB_INT1"
default 10
config IRQ_USB_INT2
int "IRQ_USB_INT2"
default 10
config IRQ_USB_DMA
int "IRQ_USB_DMA"
default 10
help
Enter the priority numbers between 7-13 ONLY. Others are Reserved.
This applies to all the above. It is not recommended to assign the
highest priority number 7 to UART or any other device.
endmenu
endmenu
endif
arch/blackfin/mach-bf527/Makefile 0 → 100644
浏览文件 @ 7efb35af
#
# arch/blackfin/mach-bf527/Makefile
#
extra-y := head.o
obj-y := ints-priority.o dma.o
obj-$(CONFIG_CPU_FREQ) += cpu.o
arch/blackfin/mach-bf527/boards/Makefile 0 → 100644
浏览文件 @ 7efb35af
#
# arch/blackfin/mach-bf532/boards/Makefile
#
obj-y += eth_mac.o
obj-$(CONFIG_BFIN527_EZKIT) += ezkit.o
arch/blackfin/mach-bf527/boards/eth_mac.c 0 → 100644
浏览文件 @ 7efb35af
/*
* arch/blackfin/mach-bf537/board/eth_mac.c
*
* Copyright (C) 2007 Analog Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/module.h>
#include <asm/blackfin.h>
#if defined(CONFIG_GENERIC_BOARD) || defined(CONFIG_BFIN537_STAMP)
/*
* Currently the MAC address is saved in Flash by U-Boot
*/
#define FLASH_MAC 0x203f0000
void get_bf537_ether_addr(char *addr)
{
unsigned int flash_mac = (unsigned int) FLASH_MAC;
*(u32 *)(&(addr[0])) = bfin_read32(flash_mac);
flash_mac += 4;
*(u16 *)(&(addr[4])) = bfin_read16(flash_mac);
}
#else
/*
* Provide MAC address function for other specific board setting
*/
void get_bf537_ether_addr(char *addr)
{
printk(KERN_WARNING "%s: No valid Ethernet MAC address found\n", __FILE__);
}
#endif
EXPORT_SYMBOL(get_bf537_ether_addr);
arch/blackfin/mach-bf527/boards/ezkit.c 0 → 100644
浏览文件 @ 7efb35af
/*
* File: arch/blackfin/mach-bf527/boards/ezkit.c
* Based on: arch/blackfin/mach-bf537/boards/stamp.c
* Author: Aidan Williams <aidan@nicta.com.au>
*
* Created:
* Description:
*
* Modified:
* Copyright 2005 National ICT Australia (NICTA)
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb_isp1362.h>
#endif
#include <linux/pata_platform.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/usb_sl811.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <linux/spi/ad7877.h>
/*
* Name the Board for the /proc/cpuinfo
*/
const char bfin_board_name[] = "ADDS-BF527-EZKIT";
/*
* Driver needs to know address, irq and flag pin.
*/
#define ISP1761_BASE 0x203C0000
#define ISP1761_IRQ IRQ_PF7
#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
static struct resource bfin_isp1761_resources[] = {
[0] = {
.name = "isp1761-regs",
.start = ISP1761_BASE + 0x00000000,
.end = ISP1761_BASE + 0x000fffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = ISP1761_IRQ,
.end = ISP1761_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device bfin_isp1761_device = {
.name = "isp1761",
.id = 0,
.num_resources = ARRAY_SIZE(bfin_isp1761_resources),
.resource = bfin_isp1761_resources,
};
static struct platform_device *bfin_isp1761_devices[] = {
&bfin_isp1761_device,
};
int __init bfin_isp1761_init(void)
{
unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
return platform_add_devices(bfin_isp1761_devices, num_devices);
}
void __exit bfin_isp1761_exit(void)
{
platform_device_unregister(&bfin_isp1761_device);
}
arch_initcall(bfin_isp1761_init);
#endif
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
static struct resource bfin_pcmcia_cf_resources[] = {
{
.start = 0x20310000, /* IO PORT */
.end = 0x20312000,
.flags = IORESOURCE_MEM,
}, {
.start = 0x20311000, /* Attribute Memory */
.end = 0x20311FFF,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_PF4,
.end = IRQ_PF4,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
}, {
.start = 6, /* Card Detect PF6 */
.end = 6,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device bfin_pcmcia_cf_device = {
.name = "bfin_cf_pcmcia",
.id = -1,
.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
.resource = bfin_pcmcia_cf_resources,
};
#endif
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
.name = "rtc-bfin",
.id = -1,
};
#endif
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
{
.name = "smc91x-regs",
.start = 0x20300300,
.end = 0x20300300 + 16,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_PF7,
.end = IRQ_PF7,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
#endif
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource dm9000_resources[] = {
[0] = {
.start = 0x203FB800,
.end = 0x203FB800 + 8,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_PF9,
.end = IRQ_PF9,
.flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
},
};
static struct platform_device dm9000_device = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(dm9000_resources),
.resource = dm9000_resources,
};
#endif
#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
static struct resource sl811_hcd_resources[] = {
{
.start = 0x20340000,
.end = 0x20340000,
.flags = IORESOURCE_MEM,
}, {
.start = 0x20340004,
.end = 0x20340004,
.flags = IORESOURCE_MEM,
}, {
.start = CONFIG_USB_SL811_BFIN_IRQ,
.end = CONFIG_USB_SL811_BFIN_IRQ,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
void sl811_port_power(struct device *dev, int is_on)
{
gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
if (is_on)
gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
else
gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
}
#endif
static struct sl811_platform_data sl811_priv = {
.potpg = 10,
.power = 250, /* == 500mA */
#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
.port_power = &sl811_port_power,
#endif
};
static struct platform_device sl811_hcd_device = {
.name = "sl811-hcd",
.id = 0,
.dev = {
.platform_data = &sl811_priv,
},
.num_resources = ARRAY_SIZE(sl811_hcd_resources),
.resource = sl811_hcd_resources,
};
#endif
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
{
.start = 0x20360000,
.end = 0x20360000,
.flags = IORESOURCE_MEM,
}, {
.start = 0x20360004,
.end = 0x20360004,
.flags = IORESOURCE_MEM,
}, {
.start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
.end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct isp1362_platform_data isp1362_priv = {
.sel15Kres = 1,
.clknotstop = 0,
.oc_enable = 0,
.int_act_high = 0,
.int_edge_triggered = 0,
.remote_wakeup_connected = 0,
.no_power_switching = 1,
.power_switching_mode = 0,
};
static struct platform_device isp1362_hcd_device = {
.name = "isp1362-hcd",
.id = 0,
.dev = {
.platform_data = &isp1362_priv,
},
.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
.resource = isp1362_hcd_resources,
};
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
};
#endif
#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
{
.start = 0x20300000,
.end = 0x20300000 + 0x100,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_PF7,
.end = IRQ_PF7,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
static struct platform_device net2272_bfin_device = {
.name = "net2272",
.id = -1,
.num_resources = ARRAY_SIZE(net2272_bfin_resources),
.resource = net2272_bfin_resources,
};
#endif
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */
#if defined(CONFIG_MTD_M25P80) \
|| defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
{
.name = "bootloader",
.size = 0x00020000,
.offset = 0,
.mask_flags = MTD_CAP_ROM
}, {
.name = "kernel",
.size = 0xe0000,
.offset = 0x20000
}, {
.name = "file system",
.size = 0x700000,
.offset = 0x00100000,
}
};
static struct flash_platform_data bfin_spi_flash_data = {
.name = "m25p80",
.parts = bfin_spi_flash_partitions,
.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
.type = "m25p64",
};
/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
.enable_dma = 0, /* use dma transfer with this chip*/
.bits_per_word = 8,
};
#endif
#if defined(CONFIG_SPI_ADC_BF533) \
|| defined(CONFIG_SPI_ADC_BF533_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
.enable_dma = 1, /* use dma transfer with this chip*/
.bits_per_word = 16,
};
#endif
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
.enable_dma = 0,
.bits_per_word = 16,
};
#endif
#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
.enable_dma = 0,
.bits_per_word = 16,
};
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
.enable_dma = 1,
.bits_per_word = 8,
};
#endif
#if defined(CONFIG_PBX)
static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
.ctl_reg = 0x4, /* send zero */
.enable_dma = 0,
.bits_per_word = 8,
.cs_change_per_word = 1,
};
#endif
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
static struct bfin5xx_spi_chip ad5304_chip_info = {
.enable_dma = 0,
.bits_per_word = 16,
};
#endif
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
.enable_dma = 0,
.bits_per_word = 16,
};
static const struct ad7877_platform_data bfin_ad7877_ts_info = {
.model = 7877,
.vref_delay_usecs = 50, /* internal, no capacitor */
.x_plate_ohms = 419,
.y_plate_ohms = 486,
.pressure_max = 1000,
.pressure_min = 0,
.stopacq_polarity = 1,
.first_conversion_delay = 3,
.acquisition_time = 1,
.averaging = 1,
.pen_down_acc_interval = 1,
};
#endif
static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) \
|| defined(CONFIG_MTD_M25P80_MODULE)
{
/* the modalias must be the same as spi device driver name */
.modalias = "m25p80", /* Name of spi_driver for this device */
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, /* Framework bus number */
.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
.platform_data = &bfin_spi_flash_data,
.controller_data = &spi_flash_chip_info,
.mode = SPI_MODE_3,
},
#endif
#if defined(CONFIG_SPI_ADC_BF533) \
|| defined(CONFIG_SPI_ADC_BF533_MODULE)
{
.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, /* Framework bus number */
.chip_select = 1, /* Framework chip select. */
.platform_data = NULL, /* No spi_driver specific config */
.controller_data = &spi_adc_chip_info,
},
#endif
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
{
.modalias = "ad1836-spi",
.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
.controller_data = &ad1836_spi_chip_info,
},
#endif
#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
{
.modalias = "ad9960-spi",
.max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 1,
.controller_data = &ad9960_spi_chip_info,
},
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
{
.modalias = "spi_mmc_dummy",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 0,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
{
.modalias = "spi_mmc",
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = CONFIG_SPI_MMC_CS_CHAN,
.platform_data = NULL,
.controller_data = &spi_mmc_chip_info,
.mode = SPI_MODE_3,
},
#endif
#if defined(CONFIG_PBX)
{
.modalias = "fxs-spi",
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 8 - CONFIG_J11_JUMPER,
.controller_data = &spi_si3xxx_chip_info,
.mode = SPI_MODE_3,
},
{
.modalias = "fxo-spi",
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 8 - CONFIG_J19_JUMPER,
.controller_data = &spi_si3xxx_chip_info,
.mode = SPI_MODE_3,
},
#endif
#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
{
.modalias = "ad5304_spi",
.max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 2,
.platform_data = NULL,
.controller_data = &ad5304_chip_info,
.mode = SPI_MODE_2,
},
#endif
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
{
.modalias = "ad7877",
.platform_data = &bfin_ad7877_ts_info,
.irq = IRQ_PF6,
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
.bus_num = 1,
.chip_select = 1,
.controller_data = &spi_ad7877_chip_info,
},
#endif
};
/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
.num_chipselect = 8,
.enable_dma = 1, /* master has the ability to do dma transfer */
};
/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
[0] = {
.start = SPI0_REGBASE,
.end = SPI0_REGBASE + 0xFF,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = CH_SPI,
.end = CH_SPI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device bfin_spi0_device = {
.name = "bfin-spi",
.id = 0, /* Bus number */
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
.resource = bfin_spi0_resource,
.dev = {
.platform_data = &bfin_spi0_info, /* Passed to driver */
},
};
#endif /* spi master and devices */
#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
.name = "bf537-lq035",
};
#endif
#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
static struct platform_device bfin_fb_adv7393_device = {
.name = "bfin-adv7393",
};
#endif
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
#ifdef CONFIG_SERIAL_BFIN_UART0
{
.start = 0xFFC00400,
.end = 0xFFC004FF,
.flags = IORESOURCE_MEM,
},
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
{
.start = 0xFFC02000,
.end = 0xFFC020FF,
.flags = IORESOURCE_MEM,
},
#endif
};
static struct platform_device bfin_uart_device = {
.name = "bfin-uart",
.id = 1,
.num_resources = ARRAY_SIZE(bfin_uart_resources),
.resource = bfin_uart_resources,
};
#endif
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
static struct resource bfin_twi0_resource[] = {
[0] = {
.start = TWI0_REGBASE,
.end = TWI0_REGBASE,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_TWI,
.end = IRQ_TWI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device i2c_bfin_twi_device = {
.name = "i2c-bfin-twi",
.id = 0,
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
.resource = bfin_twi0_resource,
};
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
.name = "bfin-sport-uart",
.id = 0,
};
static struct platform_device bfin_sport1_uart_device = {
.name = "bfin-sport-uart",
.id = 1,
};
#endif
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT 55
static struct pata_platform_info bfin_pata_platform_data = {
.ioport_shift = 1,
.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};
static struct resource bfin_pata_resources[] = {
{
.start = 0x20314020,
.end = 0x2031403F,
.flags = IORESOURCE_MEM,
},
{
.start = 0x2031401C,
.end = 0x2031401F,
.flags = IORESOURCE_MEM,
},
{
.start = PATA_INT,
.end = PATA_INT,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device bfin_pata_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(bfin_pata_resources),
.resource = bfin_pata_resources,
.dev = {
.platform_data = &bfin_pata_platform_data,
}
};
#endif
static struct platform_device *stamp_devices[] __initdata = {
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
&bfin_pcmcia_cf_device,
#endif
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
&rtc_device,
#endif
#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
&sl811_hcd_device,
#endif
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
&isp1362_hcd_device,
#endif
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
&smc91x_device,
#endif
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
&dm9000_device,
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mac_device,
#endif
#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
&net2272_bfin_device,
#endif
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
&bfin_spi0_device,
#endif
#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
&bfin_fb_device,
#endif
#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
&bfin_fb_adv7393_device,
#endif
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
&bfin_uart_device,
#endif
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
&i2c_bfin_twi_device,
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
&bfin_sport0_uart_device,
&bfin_sport1_uart_device,
#endif
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
&bfin_pata_device,
#endif
};
static int __init stamp_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
spi_register_board_info(bfin_spi_board_info,
ARRAY_SIZE(bfin_spi_board_info));
#endif
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
return 0;
}
arch_initcall(stamp_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1();
}
arch/blackfin/mach-bf527/cpu.c 0 → 100644
浏览文件 @ 7efb35af
/*
* File: arch/blackfin/mach-bf527/cpu.c
* Based on: arch/blackfin/mach-bf537/cpu.c
* Author: michael.kang@analog.com
*
* Created:
* Description: clock scaling for the bf527
*
* Modified:
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <asm/dpmc.h>
#include <linux/fs.h>
#include <asm/bfin-global.h>
/* CONFIG_CLKIN_HZ=11059200 */
#define VCO5 (CONFIG_CLKIN_HZ*45) /*497664000 */
#define VCO4 (CONFIG_CLKIN_HZ*36) /*398131200 */
#define VCO3 (CONFIG_CLKIN_HZ*27) /*298598400 */
#define VCO2 (CONFIG_CLKIN_HZ*18) /*199065600 */
#define VCO1 (CONFIG_CLKIN_HZ*9) /*99532800 */
#define VCO(x) VCO##x
#define MFREQ(x) {VCO(x), VCO(x)/4}, {VCO(x), VCO(x)/2}, {VCO(x), VCO(x)}
/* frequency */
static struct cpufreq_frequency_table bf527_freq_table[] = {
MFREQ(1),
MFREQ(3),
{VCO4, VCO4 / 2}, {VCO4, VCO4},
MFREQ(5),
{0, CPUFREQ_TABLE_END},
};
/*
* dpmc_fops->ioctl()
* static int dpmc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
*/
static int bf527_getfreq(unsigned int cpu)
{
unsigned long cclk_mhz;
/* The driver only support single cpu */
if (cpu == 0)
dpmc_fops.ioctl(NULL, NULL, IOCTL_GET_CORECLOCK, &cclk_mhz);
else
cclk_mhz = -1;
return cclk_mhz;
}
static int bf527_target(struct cpufreq_policy *policy,
unsigned int target_freq, unsigned int relation)
{
unsigned long cclk_mhz;
unsigned long vco_mhz;
unsigned long flags;
unsigned int index;
struct cpufreq_freqs freqs;
if (cpufreq_frequency_table_target
(policy, bf527_freq_table, target_freq, relation, &index))
return -EINVAL;
cclk_mhz = bf527_freq_table[index].frequency;
vco_mhz = bf527_freq_table[index].index;
dpmc_fops.ioctl(NULL, NULL, IOCTL_CHANGE_FREQUENCY, &vco_mhz);
freqs.old = bf527_getfreq(0);
freqs.new = cclk_mhz;
freqs.cpu = 0;
pr_debug
("cclk begin change to cclk %d,vco=%d,index=%d,target=%d,oldfreq=%d\n",
cclk_mhz, vco_mhz, index, target_freq, freqs.old);
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
local_irq_save(flags);
dpmc_fops.ioctl(NULL, NULL, IOCTL_SET_CCLK, &cclk_mhz);
local_irq_restore(flags);
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
vco_mhz = get_vco();
cclk_mhz = get_cclk();
return 0;
}
/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
* this platform, anyway.
*/
static int bf527_verify_speed(struct cpufreq_policy *policy)
{
return cpufreq_frequency_table_verify(policy, &bf527_freq_table);
}
static int __init __bf527_cpu_init(struct cpufreq_policy *policy)
{
if (policy->cpu != 0)
return -EINVAL;
policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
/*Now ,only support one cpu */
policy->cur = bf527_getfreq(0);
cpufreq_frequency_table_get_attr(bf527_freq_table, policy->cpu);
return cpufreq_frequency_table_cpuinfo(policy, bf527_freq_table);
}
static struct freq_attr *bf527_freq_attr[] = {
&cpufreq_freq_attr_scaling_available_freqs,
NULL,
};
static struct cpufreq_driver bf527_driver = {
.verify = bf527_verify_speed,
.target = bf527_target,
.get = bf527_getfreq,
.init = __bf527_cpu_init,
.name = "bf527",
.owner = THIS_MODULE,
.attr = bf527_freq_attr,
};
static int __init bf527_cpu_init(void)
{
return cpufreq_register_driver(&bf527_driver);
}
static void __exit bf527_cpu_exit(void)
{
cpufreq_unregister_driver(&bf527_driver);
}
MODULE_AUTHOR("Mickael Kang");
MODULE_DESCRIPTION("cpufreq driver for bf527 CPU");
MODULE_LICENSE("GPL");
module_init(bf527_cpu_init);
module_exit(bf527_cpu_exit);
arch/blackfin/mach-bf527/dma.c 0 → 100644
浏览文件 @ 7efb35af
/*
* File: arch/blackfin/mach-bf527/dma.c
* Based on:
* Author:
*
* Created:
* Description: This file contains the simple DMA Implementation for Blackfin
*
* Modified:
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <asm/blackfin.h>
#include <asm/dma.h>
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR,
(struct dma_register *) DMA3_NEXT_DESC_PTR,
(struct dma_register *) DMA4_NEXT_DESC_PTR,
(struct dma_register *) DMA5_NEXT_DESC_PTR,
(struct dma_register *) DMA6_NEXT_DESC_PTR,
(struct dma_register *) DMA7_NEXT_DESC_PTR,
(struct dma_register *) DMA8_NEXT_DESC_PTR,
(struct dma_register *) DMA9_NEXT_DESC_PTR,
(struct dma_register *) DMA10_NEXT_DESC_PTR,
(struct dma_register *) DMA11_NEXT_DESC_PTR,
(struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
(struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
};
int channel2irq(unsigned int channel)
{
int ret_irq = -1;
switch (channel) {
case CH_PPI:
ret_irq = IRQ_PPI;
break;
case CH_EMAC_RX:
ret_irq = IRQ_MAC_RX;
break;
case CH_EMAC_TX:
ret_irq = IRQ_MAC_TX;
break;
case CH_UART1_RX:
ret_irq = IRQ_UART1_RX;
break;
case CH_UART1_TX:
ret_irq = IRQ_UART1_TX;
break;
case CH_SPORT0_RX:
ret_irq = IRQ_SPORT0_RX;
break;
case CH_SPORT0_TX:
ret_irq = IRQ_SPORT0_TX;
break;
case CH_SPORT1_RX:
ret_irq = IRQ_SPORT1_RX;
break;
case CH_SPORT1_TX:
ret_irq = IRQ_SPORT1_TX;
break;
case CH_SPI:
ret_irq = IRQ_SPI;
break;
case CH_UART0_RX:
ret_irq = IRQ_UART0_RX;
break;
case CH_UART0_TX:
ret_irq = IRQ_UART0_TX;
break;
case CH_MEM_STREAM0_SRC:
case CH_MEM_STREAM0_DEST:
ret_irq = IRQ_MEM_DMA0;
break;
case CH_MEM_STREAM1_SRC:
case CH_MEM_STREAM1_DEST:
ret_irq = IRQ_MEM_DMA1;
break;
}
return ret_irq;
}
arch/blackfin/mach-bf527/head.S 0 → 100644
浏览文件 @ 7efb35af
/*
* File: arch/blackfin/mach-bf527/head.S
* Based on: arch/blackfin/mach-bf533/head.S
* Author: Jeff Dionne <jeff@uclinux.org> COPYRIGHT 1998 D. Jeff Dionne
*
* Created: 1998
* Description: Startup code for Blackfin BF537
*
* Modified:
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/blackfin.h>
#include <asm/trace.h>
#if CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach-common/clocks.h>
#include <asm/mach/mem_init.h>
#endif
.global __rambase
.global __ramstart
.global __ramend
.extern ___bss_stop
.extern ___bss_start
.extern _bf53x_relocate_l1_mem
#define INITIAL_STACK 0xFFB01000
__INIT
ENTRY(__start)
/* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
/* Enable Cycle Counter and Nesting Of Interrupts */
#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
R0 = SYSCFG_SNEN;
#else
R0 = SYSCFG_SNEN | SYSCFG_CCEN;
#endif
SYSCFG = R0;
R0 = 0;
/* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
R4 = R0;
R5 = R0;
R6 = R0;
P0 = R0;
P1 = R0;
P2 = R0;
P3 = R0;
P4 = R0;
P5 = R0;
LC0 = r0;
LC1 = r0;
L0 = r0;
L1 = r0;
L2 = r0;
L3 = r0;
/* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
B3 = r0;
I0 = r0;
I1 = r0;
I2 = r0;
I3 = r0;
M0 = r0;
M1 = r0;
M2 = r0;
M3 = r0;
trace_buffer_init(p0,r0);
P0 = R1;
R0 = R1;
/* Turn off the icache */
p0.l = LO(IMEM_CONTROL);
p0.h = HI(IMEM_CONTROL);
R1 = [p0];
R0 = ~ENICPLB;
R0 = R0 & R1;
/* Anomaly 05000125 */
#if ANOMALY_05000125
CLI R2;
SSYNC;
#endif
[p0] = R0;
SSYNC;
#if ANOMALY_05000125
STI R2;
#endif
/* Turn off the dcache */
p0.l = LO(DMEM_CONTROL);
p0.h = HI(DMEM_CONTROL);
R1 = [p0];
R0 = ~ENDCPLB;
R0 = R0 & R1;
/* Anomaly 05000125 */
#if ANOMALY_05000125
CLI R2;
SSYNC;
#endif
[p0] = R0;
SSYNC;
#if ANOMALY_05000125
STI R2;
#endif
#if defined(CONFIG_BF527)
p0.h = hi(EMAC_SYSTAT);
p0.l = lo(EMAC_SYSTAT);
R0.h = 0xFFFF; /* Clear EMAC Interrupt Status bits */
R0.l = 0xFFFF;
[P0] = R0;
SSYNC;
#endif
/* Initialise UART - when booting from u-boot, the UART is not disabled
* so if we dont initalize here, our serial console gets hosed */
p0.h = hi(UART1_LCR);
p0.l = lo(UART1_LCR);
r0 = 0x0(Z);
w[p0] = r0.L; /* To enable DLL writes */
ssync;
p0.h = hi(UART1_DLL);
p0.l = lo(UART1_DLL);
r0 = 0x0(Z);
w[p0] = r0.L;
ssync;
p0.h = hi(UART1_DLH);
p0.l = lo(UART1_DLH);
r0 = 0x00(Z);
w[p0] = r0.L;
ssync;
p0.h = hi(UART1_GCTL);
p0.l = lo(UART1_GCTL);
r0 = 0x0(Z);
w[p0] = r0.L; /* To enable UART clock */
ssync;
/* Initialize stack pointer */
sp.l = lo(INITIAL_STACK);
sp.h = hi(INITIAL_STACK);
fp = sp;
usp = sp;
#ifdef CONFIG_EARLY_PRINTK
SP += -12;
call _init_early_exception_vectors;
SP += 12;
#endif
/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
call _bf53x_relocate_l1_mem;
#if CONFIG_BFIN_KERNEL_CLOCK
call _start_dma_code;
#endif
/* Code for initializing Async memory banks */
p2.h = hi(EBIU_AMBCTL1);
p2.l = lo(EBIU_AMBCTL1);
r0.h = hi(AMBCTL1VAL);
r0.l = lo(AMBCTL1VAL);
[p2] = r0;
ssync;
p2.h = hi(EBIU_AMBCTL0);
p2.l = lo(EBIU_AMBCTL0);
r0.h = hi(AMBCTL0VAL);
r0.l = lo(AMBCTL0VAL);
[p2] = r0;
ssync;
p2.h = hi(EBIU_AMGCTL);
p2.l = lo(EBIU_AMGCTL);
r0 = AMGCTLVAL;
w[p2] = r0;
ssync;
/* This section keeps the processor in supervisor mode
* during kernel boot. Switches to user mode at end of boot.
* See page 3-9 of Hardware Reference manual for documentation.
*/
/* EVT15 = _real_start */
p0.l = lo(EVT15);
p0.h = hi(EVT15);
p1.l = _real_start;
p1.h = _real_start;
[p0] = p1;
csync;
p0.l = lo(IMASK);
p0.h = hi(IMASK);
p1.l = IMASK_IVG15;
p1.h = 0x0;
[p0] = p1;
csync;
raise 15;
p0.l = .LWAIT_HERE;
p0.h = .LWAIT_HERE;
reti = p0;
#if ANOMALY_05000281
nop; nop; nop;
#endif
rti;
.LWAIT_HERE:
jump .LWAIT_HERE;
ENDPROC(__start)
ENTRY(_real_start)
[ -- sp ] = reti;
p0.l = lo(WDOG_CTL);
p0.h = hi(WDOG_CTL);
r0 = 0xAD6(z);
w[p0] = r0; /* watchdog off for now */
ssync;
/* Code update for BSS size == 0
* Zero out the bss region.
*/
p1.l = ___bss_start;
p1.h = ___bss_start;
p2.l = ___bss_stop;
p2.h = ___bss_stop;
r0 = 0;
p2 -= p1;
lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
.L_clear_bss:
B[p1++] = r0;
/* In case there is a NULL pointer reference
* Zero out region before stext
*/
p1.l = 0x0;
p1.h = 0x0;
r0.l = __stext;
r0.h = __stext;
r0 = r0 >> 1;
p2 = r0;
r0 = 0;
lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
.L_clear_zero:
W[p1++] = r0;
/* pass the uboot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
p1.l = __rambase;
p1.h = __rambase;
r0.l = __sdata;
r0.h = __sdata;
[p1] = r0;
p1.l = __ramstart;
p1.h = __ramstart;
p3.l = ___bss_stop;
p3.h = ___bss_stop;
r1 = p3;
[p1] = r1;
/*
* load the current thread pointer and stack
*/
r1.l = _init_thread_union;
r1.h = _init_thread_union;
r2.l = 0x2000;
r2.h = 0x0000;
r1 = r1 + r2;
sp = r1;
usp = sp;
fp = sp;
jump.l _start_kernel;
ENDPROC(_real_start)
__FINIT
.section .l1.text
#if CONFIG_BFIN_KERNEL_CLOCK
ENTRY(_start_dma_code)
/* Enable PHY CLK buffer output */
p0.h = hi(VR_CTL);
p0.l = lo(VR_CTL);
r0.l = w[p0];
bitset(r0, 14);
w[p0] = r0.l;
ssync;
p0.h = hi(SIC_IWR0);
p0.l = lo(SIC_IWR0);
r0.l = 0x1;
r0.h = 0x0;
[p0] = r0;
SSYNC;
/*
* Set PLL_CTL
* - [14:09] = MSEL[5:0] : CLKIN / VCO multiplication factors
* - [8] = BYPASS : BYPASS the PLL, run CLKIN into CCLK/SCLK
* - [7] = output delay (add 200ps of delay to mem signals)
* - [6] = input delay (add 200ps of input delay to mem signals)
* - [5] = PDWN : 1=All Clocks off
* - [3] = STOPCK : 1=Core Clock off
* - [1] = PLL_OFF : 1=Disable Power to PLL
* - [0] = DF : 1=Pass CLKIN/2 to PLL / 0=Pass CLKIN to PLL
* all other bits set to zero
*/
p0.h = hi(PLL_LOCKCNT);
p0.l = lo(PLL_LOCKCNT);
r0 = 0x300(Z);
w[p0] = r0.l;
ssync;
P2.H = hi(EBIU_SDGCTL);
P2.L = lo(EBIU_SDGCTL);
R0 = [P2];
BITSET (R0, 24);
[P2] = R0;
SSYNC;
r0 = CONFIG_VCO_MULT & 63; /* Load the VCO multiplier */
r0 = r0 << 9; /* Shift it over, */
r1 = CLKIN_HALF; /* Do we need to divide CLKIN by 2?*/
r0 = r1 | r0;
r1 = PLL_BYPASS; /* Bypass the PLL? */
r1 = r1 << 8; /* Shift it over */
r0 = r1 | r0; /* add them all together */
p0.h = hi(PLL_CTL);
p0.l = lo(PLL_CTL); /* Load the address */
cli r2; /* Disable interrupts */
ssync;
w[p0] = r0.l; /* Set the value */
idle; /* Wait for the PLL to stablize */
sti r2; /* Enable interrupts */
.Lcheck_again:
p0.h = hi(PLL_STAT);
p0.l = lo(PLL_STAT);
R0 = W[P0](Z);
CC = BITTST(R0,5);
if ! CC jump .Lcheck_again;
/* Configure SCLK & CCLK Dividers */
r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
p0.h = hi(PLL_DIV);
p0.l = lo(PLL_DIV);
w[p0] = r0.l;
ssync;
p0.l = lo(EBIU_SDRRC);
p0.h = hi(EBIU_SDRRC);
r0 = mem_SDRRC;
w[p0] = r0.l;
ssync;
p0.l = LO(EBIU_SDBCTL);
p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
r0 = mem_SDBCTL;
w[p0] = r0.l;
ssync;
P2.H = hi(EBIU_SDGCTL);
P2.L = lo(EBIU_SDGCTL);
R0 = [P2];
BITCLR (R0, 24);
p0.h = hi(EBIU_SDSTAT);
p0.l = lo(EBIU_SDSTAT);
r2.l = w[p0];
cc = bittst(r2,3);
if !cc jump .Lskip;
NOP;
BITSET (R0, 23);
.Lskip:
[P2] = R0;
SSYNC;
R0.L = lo(mem_SDGCTL);
R0.H = hi(mem_SDGCTL);
R1 = [p2];
R1 = R1 | R0;
[P2] = R1;
SSYNC;
p0.h = hi(SIC_IWR0);
p0.l = lo(SIC_IWR0);
r0.l = lo(IWR_ENABLE_ALL);
r0.h = hi(IWR_ENABLE_ALL);
[p0] = r0;
SSYNC;
RTS;
ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
.data
/*
* Set up the usable of RAM stuff. Size of RAM is determined then
* an initial stack set up at the end.
*/
.align 4
__rambase:
.long 0
__ramstart:
.long 0
__ramend:
.long 0
arch/blackfin/mach-bf527/ints-priority.c 0 → 100644
浏览文件 @ 7efb35af
/*
* File: arch/blackfin/mach-bf537/ints-priority.c
* Based on: arch/blackfin/mach-bf533/ints-priority.c
* Author: Michael Hennerich (michael.hennerich@analog.com)
*
* Created:
* Description: Set up the interrupt priorities
*
* Modified:
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/module.h>
#include <linux/irq.h>
#include <asm/blackfin.h>
void program_IAR(void)
{
/* Program the IAR0 Register with the configured priority */
bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |
((CONFIG_IRQ_DMA0_ERROR - 7) << IRQ_DMA0_ERROR_POS) |
((CONFIG_IRQ_DMAR0_BLK - 7) << IRQ_DMAR0_BLK_POS) |
((CONFIG_IRQ_DMAR1_BLK - 7) << IRQ_DMAR1_BLK_POS) |
((CONFIG_IRQ_DMAR0_OVR - 7) << IRQ_DMAR0_OVR_POS) |
((CONFIG_IRQ_DMAR1_OVR - 7) << IRQ_DMAR1_OVR_POS) |
((CONFIG_IRQ_PPI_ERROR - 7) << IRQ_PPI_ERROR_POS) |
((CONFIG_IRQ_MAC_ERROR - 7) << IRQ_MAC_ERROR_POS));
bfin_write_SIC_IAR1(((CONFIG_IRQ_SPORT0_ERROR - 7) << IRQ_SPORT0_ERROR_POS) |
((CONFIG_IRQ_SPORT1_ERROR - 7) << IRQ_SPORT1_ERROR_POS) |
((CONFIG_IRQ_UART0_ERROR - 7) << IRQ_UART0_ERROR_POS) |
((CONFIG_IRQ_UART1_ERROR - 7) << IRQ_UART1_ERROR_POS) |
((CONFIG_IRQ_RTC - 7) << IRQ_RTC_POS) |
((CONFIG_IRQ_PPI - 7) << IRQ_PPI_POS));
bfin_write_SIC_IAR2(((CONFIG_IRQ_SPORT0_RX - 7) << IRQ_SPORT0_RX_POS) |
((CONFIG_IRQ_SPORT0_TX - 7) << IRQ_SPORT0_TX_POS) |
((CONFIG_IRQ_SPORT1_RX - 7) << IRQ_SPORT1_RX_POS) |
((CONFIG_IRQ_SPORT1_TX - 7) << IRQ_SPORT1_TX_POS) |
((CONFIG_IRQ_TWI - 7) << IRQ_TWI_POS) |
((CONFIG_IRQ_SPI - 7) << IRQ_SPI_POS) |
((CONFIG_IRQ_UART0_RX - 7) << IRQ_UART0_RX_POS) |
((CONFIG_IRQ_UART0_TX - 7) << IRQ_UART0_TX_POS));
bfin_write_SIC_IAR3(((CONFIG_IRQ_UART1_RX - 7) << IRQ_UART1_RX_POS) |
((CONFIG_IRQ_UART1_TX - 7) << IRQ_UART1_TX_POS) |
((CONFIG_IRQ_OPTSEC - 7) << IRQ_OPTSEC_POS) |
((CONFIG_IRQ_CNT - 7) << IRQ_CNT_POS) |
((CONFIG_IRQ_MAC_RX - 7) << IRQ_MAC_RX_POS) |
((CONFIG_IRQ_PORTH_INTA - 7) << IRQ_PORTH_INTA_POS) |
((CONFIG_IRQ_MAC_TX - 7) << IRQ_MAC_TX_POS) |
((CONFIG_IRQ_PORTH_INTB - 7) << IRQ_PORTH_INTB_POS));
bfin_write_SIC_IAR4(((CONFIG_IRQ_TMR0 - 7) << IRQ_TMR0_POS) |
((CONFIG_IRQ_TMR1 - 7) << IRQ_TMR1_POS) |
((CONFIG_IRQ_TMR2 - 7) << IRQ_TMR2_POS) |
((CONFIG_IRQ_TMR3 - 7) << IRQ_TMR3_POS) |
((CONFIG_IRQ_TMR4 - 7) << IRQ_TMR4_POS) |
((CONFIG_IRQ_TMR5 - 7) << IRQ_TMR5_POS) |
((CONFIG_IRQ_TMR6 - 7) << IRQ_TMR6_POS) |
((CONFIG_IRQ_TMR7 - 7) << IRQ_TMR7_POS));
bfin_write_SIC_IAR5(((CONFIG_IRQ_PORTG_INTA - 7) << IRQ_PORTG_INTA_POS) |
((CONFIG_IRQ_PORTG_INTB - 7) << IRQ_PORTG_INTB_POS) |
((CONFIG_IRQ_MEM_DMA0 - 7) << IRQ_MEM_DMA0_POS) |
((CONFIG_IRQ_MEM_DMA1 - 7) << IRQ_MEM_DMA1_POS) |
((CONFIG_IRQ_WATCH - 7) << IRQ_WATCH_POS) |
((CONFIG_IRQ_PORTF_INTA - 7) << IRQ_PORTF_INTA_POS) |
((CONFIG_IRQ_PORTF_INTB - 7) << IRQ_PORTF_INTB_POS) |
((CONFIG_IRQ_SPI_ERROR - 7) << IRQ_SPI_ERROR_POS));
bfin_write_SIC_IAR6(((CONFIG_IRQ_NFC_ERROR - 7) << IRQ_NFC_ERROR_POS) |
((CONFIG_IRQ_HDMA_ERROR - 7) << IRQ_HDMA_ERROR_POS) |
((CONFIG_IRQ_HDMA - 7) << IRQ_HDMA_POS) |
((CONFIG_IRQ_USB_EINT - 7) << IRQ_USB_EINT_POS) |
((CONFIG_IRQ_USB_INT0 - 7) << IRQ_USB_INT0_POS) |
((CONFIG_IRQ_USB_INT1 - 7) << IRQ_USB_INT1_POS) |
((CONFIG_IRQ_USB_INT2 - 7) << IRQ_USB_INT2_POS) |
((CONFIG_IRQ_USB_DMA - 7) << IRQ_USB_DMA_POS));
SSYNC();
}
arch/blackfin/mach-bf533/boards/cm_bf533.c
浏览文件 @ 7efb35af
......@@ -42,7 +42,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "Bluetechnix CM BF533";
const char bfin_board_name[] = "Bluetechnix CM BF533";
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */
......
arch/blackfin/mach-bf533/boards/ezkit.c
浏览文件 @ 7efb35af
......@@ -43,7 +43,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "ADDS-BF533-EZKIT";
const char bfin_board_name[] = "ADDS-BF533-EZKIT";
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
......
arch/blackfin/mach-bf533/boards/generic_board.c
浏览文件 @ 7efb35af
......@@ -35,7 +35,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "UNKNOWN BOARD";
const char bfin_board_name[] = "UNKNOWN BOARD";
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
......
arch/blackfin/mach-bf533/boards/stamp.c
浏览文件 @ 7efb35af
......@@ -46,7 +46,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "ADDS-BF533-STAMP";
const char bfin_board_name[] = "ADDS-BF533-STAMP";
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
......
arch/blackfin/mach-bf537/boards/cm_bf537.c
浏览文件 @ 7efb35af
......@@ -43,7 +43,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "Bluetechnix CM BF537";
const char bfin_board_name[] = "Bluetechnix CM BF537";
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */
......
arch/blackfin/mach-bf537/boards/generic_board.c
浏览文件 @ 7efb35af
......@@ -49,7 +49,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "GENERIC Board";
const char bfin_board_name[] = "GENERIC Board";
/*
* Driver needs to know address, irq and flag pin.
......
arch/blackfin/mach-bf537/boards/pnav10.c
浏览文件 @ 7efb35af
......@@ -47,7 +47,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "PNAV-1.0";
const char bfin_board_name[] = "PNAV-1.0";
/*
* Driver needs to know address, irq and flag pin.
......
arch/blackfin/mach-bf537/boards/stamp.c
浏览文件 @ 7efb35af
......@@ -49,7 +49,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "ADDS-BF537-STAMP";
const char bfin_board_name[] = "ADDS-BF537-STAMP";
/*
* Driver needs to know address, irq and flag pin.
......
arch/blackfin/mach-bf548/boards/ezkit.c
浏览文件 @ 7efb35af
......@@ -49,7 +49,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "ADSP-BF548-EZKIT";
const char bfin_board_name[] = "ADSP-BF548-EZKIT";
/*
* Driver needs to know address, irq and flag pin.
......@@ -560,7 +560,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
&bf54x_spi_master0,
/* &bf54x_spi_master1,*/
&bf54x_spi_master1,
#endif
#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
......
arch/blackfin/mach-bf548/dma.c
浏览文件 @ 7efb35af
......@@ -64,6 +64,7 @@
(struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
(struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
};
EXPORT_SYMBOL(base_addr);
int channel2irq(unsigned int channel)
{
......
arch/blackfin/mach-bf561/boards/cm_bf561.c
浏览文件 @ 7efb35af
......@@ -42,7 +42,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "Bluetechnix CM BF561";
const char bfin_board_name[] = "Bluetechnix CM BF561";
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */
......
arch/blackfin/mach-bf561/boards/ezkit.c
浏览文件 @ 7efb35af
......@@ -39,7 +39,7 @@
/*
* Name the Board for the /proc/cpuinfo
*/
char *bfin_board_name = "ADDS-BF561-EZKIT";
const char bfin_board_name[] = "ADDS-BF561-EZKIT";
#define ISP1761_BASE 0x2C0F0000
#define ISP1761_IRQ IRQ_PF10
......
arch/blackfin/mach-bf561/boards/generic_board.c
浏览文件 @ 7efb35af
......@@ -32,7 +32,7 @@
#include <linux/platform_device.h>
#include <linux/irq.h>
char *bfin_board_name = "UNKNOWN BOARD";
const char bfin_board_name[] = "UNKNOWN BOARD";
/*
* Driver needs to know address, irq and flag pin.
......
arch/blackfin/mach-bf561/boards/tepla.c
浏览文件 @ 7efb35af
......@@ -16,7 +16,7 @@
#include <linux/platform_device.h>
#include <linux/irq.h>
char *bfin_board_name = "Tepla-BF561";
const char bfin_board_name[] = "Tepla-BF561";
/*
* Driver needs to know address, irq and flag pin.
......
arch/blackfin/mach-common/ints-priority-dc.c
浏览文件 @ 7efb35af
......@@ -52,7 +52,13 @@
* -
*/
unsigned long irq_flags = 0;
/* Initialize this to an actual value to force it into the .data
* section so that we know it is properly initialized at entry into
* the kernel but before bss is initialized to zero (which is where
* it would live otherwise). The 0x1f magic represents the IRQs we
* cannot actually mask out in hardware.
*/
unsigned long irq_flags = 0x1f;
/* The number of spurious interrupts */
atomic_t num_spurious;
......
arch/blackfin/mach-common/ints-priority-sc.c
浏览文件 @ 7efb35af
......@@ -58,7 +58,13 @@
* -
*/
unsigned long irq_flags = 0;
/* Initialize this to an actual value to force it into the .data
* section so that we know it is properly initialized at entry into
* the kernel but before bss is initialized to zero (which is where
* it would live otherwise). The 0x1f magic represents the IRQs we
* cannot actually mask out in hardware.
*/
unsigned long irq_flags = 0x1f;
/* The number of spurious interrupts */
atomic_t num_spurious;
......@@ -92,10 +98,15 @@ static void __init search_IAR(void)
for (irqn = 0; irqn < NR_PERI_INTS; irqn++) {
int iar_shift = (irqn & 7) * 4;
if (ivg ==
if (ivg ==
(0xf &
#ifndef CONFIG_BF52x
bfin_read32((unsigned long *)SIC_IAR0 +
(irqn >> 3)) >> iar_shift)) {
#else
bfin_read32((unsigned long *)SIC_IAR0 +
((irqn%32) >> 3) + ((irqn / 32) * 16)) >> iar_shift)) {
#endif
ivg_table[irq_pos].irqno = IVG7 + irqn;
ivg_table[irq_pos].isrflag = 1 << (irqn % 32);
ivg7_13[ivg].istop++;
......@@ -140,7 +151,7 @@ static void bfin_core_unmask_irq(unsigned int irq)
static void bfin_internal_mask_irq(unsigned int irq)
{
#ifndef CONFIG_BF54x
#ifdef CONFIG_BF53x
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
~(1 << (irq - (IRQ_CORETMR + 1))));
#else
......@@ -155,7 +166,7 @@ static void bfin_internal_mask_irq(unsigned int irq)
static void bfin_internal_unmask_irq(unsigned int irq)
{
#ifndef CONFIG_BF54x
#ifdef CONFIG_BF53x
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
(1 << (irq - (IRQ_CORETMR + 1))));
#else
......@@ -750,13 +761,15 @@ int __init init_arch_irq(void)
int irq;
unsigned long ilat = 0;
/* Disable all the peripheral intrs - page 4-29 HW Ref manual */
#ifdef CONFIG_BF54x
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
bfin_write_SIC_IMASK0(SIC_UNMASK_ALL);
bfin_write_SIC_IMASK1(SIC_UNMASK_ALL);
bfin_write_SIC_IMASK2(SIC_UNMASK_ALL);
bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
#ifdef CONFIG_BF54x
bfin_write_SIC_IMASK2(SIC_UNMASK_ALL);
bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
#endif
#else
bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
bfin_write_SIC_IWR(IWR_ENABLE_ALL);
......@@ -787,7 +800,7 @@ int __init init_arch_irq(void)
switch (irq) {
#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
#ifndef CONFIG_BF54x
#if defined(CONFIG_BF53x)
case IRQ_PROG_INTA:
set_irq_chained_handler(irq,
bfin_demux_gpio_irq);
......@@ -798,7 +811,7 @@ int __init init_arch_irq(void)
bfin_demux_gpio_irq);
break;
#endif
#else
#elif defined(CONFIG_BF54x)
case IRQ_PINT0:
set_irq_chained_handler(irq,
bfin_demux_gpio_irq);
......@@ -815,7 +828,20 @@ int __init init_arch_irq(void)
set_irq_chained_handler(irq,
bfin_demux_gpio_irq);
break;
#endif /*CONFIG_BF54x */
#elif defined(CONFIG_BF52x)
case IRQ_PORTF_INTA:
set_irq_chained_handler(irq,
bfin_demux_gpio_irq);
break;
case IRQ_PORTG_INTA:
set_irq_chained_handler(irq,
bfin_demux_gpio_irq);
break;
case IRQ_PORTH_INTA:
set_irq_chained_handler(irq,
bfin_demux_gpio_irq);
break;
#endif
#endif
default:
set_irq_handler(irq, handle_simple_irq);
......@@ -880,14 +906,15 @@ void do_irq(int vec, struct pt_regs *fp)
} else {
struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst;
struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop;
#ifdef CONFIG_BF54x
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
unsigned long sic_status[3];
SSYNC();
sic_status[0] = bfin_read_SIC_ISR(0) & bfin_read_SIC_IMASK(0);
sic_status[1] = bfin_read_SIC_ISR(1) & bfin_read_SIC_IMASK(1);
sic_status[2] = bfin_read_SIC_ISR(2) & bfin_read_SIC_IMASK(2);
sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
#ifdef CONFIG_BF54x
sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2();
#endif
for (;; ivg++) {
if (ivg >= ivg_stop) {
atomic_inc(&num_spurious);
......
arch/parisc/Makefile
浏览文件 @ 7efb35af
......@@ -19,26 +19,27 @@
NM = sh $(srctree)/arch/parisc/nm
CHECKFLAGS += -D__hppa__=1
MACHINE := $(shell uname -m)
ifeq ($(MACHINE),parisc*)
NATIVE := 1
endif
ifdef CONFIG_64BIT
CROSS_COMPILE := $(shell if [ -x /usr/bin/hppa64-linux-gnu-gcc ]; then \
echo hppa64-linux-gnu-; else echo hppa64-linux-; fi)
UTS_MACHINE := parisc64
CHECKFLAGS += -D__LP64__=1 -m64
else
MACHINE := $(subst 64,,$(shell uname -m))
ifneq ($(MACHINE),parisc)
CROSS_COMPILE := hppa-linux-
endif
WIDTH := 64
CROSS_COMPILE := hppa64-linux-gnu-
else # 32-bit
WIDTH :=
endif
FINAL_LD=$(CROSS_COMPILE)ld --warn-common --warn-section-align
# attempt to help out folks who are cross-compiling
ifeq ($(NATIVE),1)
CROSS_COMPILE := hppa$(WIDTH)-linux-
endif
OBJCOPY_FLAGS =-O binary -R .note -R .comment -S
ifneq ($(call cc-ifversion, -lt, 0303, "bad"),)
$(error Sorry, GCC v3.3 or above is required.)
endif
cflags-y := -pipe
# These flags should be implied by an hppa-linux configuration, but they
......@@ -69,7 +70,7 @@ kernel-y := mm/ kernel/ math-emu/ kernel/init_task.o
kernel-$(CONFIG_HPUX) += hpux/
core-y += $(addprefix arch/parisc/, $(kernel-y))
libs-y += arch/parisc/lib/ `$(CC) -print-libgcc-file-name`
libs-y += arch/parisc/lib/
drivers-$(CONFIG_OPROFILE) += arch/parisc/oprofile/
......@@ -77,27 +78,27 @@ PALO := $(shell if which palo; then : ; \
elif [ -x /sbin/palo ]; then echo /sbin/palo; \
fi)
PALOCONF := $(shell if [ -f $(src)/palo.conf ]; then echo $(src)/palo.conf; \
else echo $(obj)/palo.conf; \
fi)
palo: vmlinux
@if [ -x $PALO ]; then \
@if test ! -x "$(PALO)"; then \
echo 'ERROR: Please install palo first (apt-get install palo)';\
echo 'or build it from source and install it somewhere in your $$PATH';\
false; \
fi
@if [ ! -f ./palo.conf ]; then \
cp arch/parisc/defpalo.conf palo.conf; \
echo 'A generic palo config file (./palo.conf) has been created for you.'; \
@if test ! -f "$(PALOCONF)"; then \
cp $(src)/arch/parisc/defpalo.conf $(obj)/palo.conf; \
echo 'A generic palo config file ($(obj)/palo.conf) has been created for you.'; \
echo 'You should check it and re-run "make palo".'; \
echo 'WARNING: the "lifimage" file is now placed in this directory by default!'; \
false; \
fi
$(PALO) -f ./palo.conf
oldpalo: vmlinux
export TOPDIR=`pwd`; \
unset STRIP LDFLAGS CPP CPPFLAGS AFLAGS CFLAGS CC LD; cd ../palo && make lifimage
$(PALO) -f $(PALOCONF)
# Shorthands for known targets not supported by parisc, use palo as default
Image zImage bzImage: palo
# Shorthands for known targets not supported by parisc, use vmlinux as default
Image zImage bzImage: vmlinux
kernel_install: vmlinux
sh $(src)/arch/parisc/install.sh \
......@@ -116,3 +117,12 @@ define archhelp
@echo ' (distribution) /sbin/installkernel or'
@echo ' copy to $$(INSTALL_PATH)'
endef
# we require gcc 3.3 or above to compile the kernel
archprepare: checkbin
checkbin:
@if test "$(call cc-version)" -lt "0303"; then \
echo -n "Sorry, GCC v3.3 or above is required to build " ; \
echo "the kernel." ; \
false ; \
fi
arch/parisc/configs/712_defconfig
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/configs/a500_defconfig
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/configs/b180_defconfig
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/configs/c3000_defconfig
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/defconfig
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/hpux/gate.S
浏览文件 @ 7efb35af
......@@ -20,7 +20,7 @@
.import hpux_call_table
.import hpux_syscall_exit,code
.align 4096
.align PAGE_SIZE
ENTRY(hpux_gateway_page)
nop
#ifdef CONFIG_64BIT
......@@ -103,5 +103,5 @@ syscall_nosys:
ldo -ENOSYS(%r0),%r28
ENDPROC(hpux_gateway_page)
.align 4096
.align PAGE_SIZE
ENTRY(end_hpux_gateway_page)
arch/parisc/kernel/asm-offsets.c
浏览文件 @ 7efb35af
......@@ -290,9 +290,6 @@ int main(void)
DEFINE(ASM_PTE_ENTRY_SIZE, PTE_ENTRY_SIZE);
DEFINE(ASM_PFN_PTE_SHIFT, PFN_PTE_SHIFT);
DEFINE(ASM_PT_INITIAL, PT_INITIAL);
DEFINE(ASM_PAGE_SIZE, PAGE_SIZE);
DEFINE(ASM_PAGE_SIZE_DIV64, PAGE_SIZE/64);
DEFINE(ASM_PAGE_SIZE_DIV128, PAGE_SIZE/128);
BLANK();
DEFINE(EXCDATA_IP, offsetof(struct exception_data, fault_ip));
DEFINE(EXCDATA_SPACE, offsetof(struct exception_data, fault_space));
......
arch/parisc/kernel/entry.S
浏览文件 @ 7efb35af
......@@ -98,7 +98,6 @@
* The "get_stack" macros are responsible for determining the
* kernel stack value.
*
* For Faults:
* If sr7 == 0
* Already using a kernel stack, so call the
* get_stack_use_r30 macro to push a pt_regs structure
......@@ -110,26 +109,6 @@
* task pointer pointed to by cr30. Set the stack
* pointer to point to the end of the task structure.
*
* For Interrupts:
* If sr7 == 0
* Already using a kernel stack, check to see if r30
* is already pointing to the per processor interrupt
* stack. If it is, call the get_stack_use_r30 macro
* to push a pt_regs structure on the stack, and store
* registers there. Otherwise, call get_stack_use_cr31
* to get a pointer to the base of the interrupt stack
* and push a pt_regs structure on that stack.
* else
* Need to set up a kernel stack, so call the
* get_stack_use_cr30 macro to set up a pointer
* to the pt_regs structure contained within the
* task pointer pointed to by cr30. Set the stack
* pointer to point to the end of the task structure.
* N.B: We don't use the interrupt stack for the
* first interrupt from userland, because signals/
* resched's are processed when returning to userland,
* and we can sleep in those cases.
*
* Note that we use shadowed registers for temps until
* we can save %r26 and %r29. %r26 is used to preserve
* %r8 (a shadowed register) which temporarily contained
......@@ -652,7 +631,7 @@
.text
.align 4096
.align PAGE_SIZE
ENTRY(fault_vector_20)
/* First vector is invalid (0) */
......@@ -904,7 +883,7 @@ ENDPROC(_switch_to)
*
*/
.align 4096
.align PAGE_SIZE
ENTRY(syscall_exit_rfi)
mfctl %cr30,%r16
......@@ -1086,23 +1065,13 @@ intr_do_preempt:
intr_extint:
CMPIB=,n 0,%r16,1f
get_stack_use_cr30
b,n 3f
b,n 2f
1:
#if 0 /* Interrupt Stack support not working yet! */
mfctl %cr31,%r1
copy %r30,%r17
/* FIXME! depi below has hardcoded idea of interrupt stack size (32k)*/
DEPI 0,31,15,%r17
CMPB=,n %r1,%r17,2f
get_stack_use_cr31
b,n 3f
#endif
2:
get_stack_use_r30
3:
2:
save_specials %r29
virt_map
save_general %r29
......
arch/parisc/kernel/head.S
浏览文件 @ 7efb35af
......@@ -95,7 +95,7 @@ $bss_loop:
1:
stw %r3,0(%r4)
ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
ldo (PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
addib,> -1,%r1,1b
#if PT_NLEVELS == 3
ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
......@@ -128,10 +128,6 @@ $pgt_fill_loop:
/* And the stack pointer too */
ldo THREAD_SZ_ALGN(%r6),%sp
/* And the interrupt stack */
load32 interrupt_stack,%r6
mtctl %r6,%cr31
#ifdef CONFIG_SMP
/* Set the smp rendevous address into page zero.
** It would be safer to do this in init_smp_config() but
......
arch/parisc/kernel/hpmc.S
浏览文件 @ 7efb35af
......@@ -55,13 +55,13 @@
* IODC requires 7K byte stack. That leaves 1K byte for os_hpmc.
*/
.align 4096
.align PAGE_SIZE
hpmc_stack:
.block 16384
#define HPMC_IODC_BUF_SIZE 0x8000
.align 4096
.align PAGE_SIZE
hpmc_iodc_buf:
.block HPMC_IODC_BUF_SIZE
......
arch/parisc/kernel/init_task.c
浏览文件 @ 7efb35af
......@@ -49,7 +49,6 @@ EXPORT_SYMBOL(init_mm);
* way process stacks are handled. This is done by having a special
* "init_task" linker map entry..
*/
unsigned char interrupt_stack[ISTACK_SIZE] __attribute__ ((section("init_istack"), aligned(4096)));
union thread_union init_thread_union
__attribute__((aligned(128))) __attribute__((__section__(".data.init_task"))) =
{ INIT_THREAD_INFO(init_task) };
......
arch/parisc/kernel/pacache.S
浏览文件 @ 7efb35af
......@@ -289,7 +289,7 @@ ENTRY(copy_user_page_asm)
*/
ldd 0(%r25), %r19
ldi ASM_PAGE_SIZE_DIV128, %r1
ldi (PAGE_SIZE / 128), %r1
ldw 64(%r25), %r0 /* prefetch 1 cacheline ahead */
ldw 128(%r25), %r0 /* prefetch 2 */
......@@ -355,7 +355,7 @@ ENTRY(copy_user_page_asm)
* use ldd/std on a 32 bit kernel.
*/
ldw 0(%r25), %r19
ldi ASM_PAGE_SIZE_DIV64, %r1
ldi (PAGE_SIZE / 64), %r1
1:
ldw 4(%r25), %r20
......@@ -553,7 +553,7 @@ ENTRY(__clear_user_page_asm)
pdtlb 0(%r28)
#ifdef CONFIG_64BIT
ldi ASM_PAGE_SIZE_DIV128, %r1
ldi (PAGE_SIZE / 128), %r1
/* PREFETCH (Write) has not (yet) been proven to help here */
/* #define PREFETCHW_OP ldd 256(%0), %r0 */
......@@ -578,7 +578,7 @@ ENTRY(__clear_user_page_asm)
ldo 128(%r28), %r28
#else /* ! CONFIG_64BIT */
ldi ASM_PAGE_SIZE_DIV64, %r1
ldi (PAGE_SIZE / 64), %r1
1:
stw %r0, 0(%r28)
......
arch/parisc/kernel/parisc_ksyms.c
浏览文件 @ 7efb35af
......@@ -122,31 +122,9 @@ EXPORT_SYMBOL($$divI_12);
EXPORT_SYMBOL($$divI_14);
EXPORT_SYMBOL($$divI_15);
extern void __ashrdi3(void);
extern void __ashldi3(void);
extern void __lshrdi3(void);
extern void __muldi3(void);
EXPORT_SYMBOL(__ashrdi3);
EXPORT_SYMBOL(__ashldi3);
EXPORT_SYMBOL(__lshrdi3);
EXPORT_SYMBOL(__muldi3);
asmlinkage void * __canonicalize_funcptr_for_compare(void *);
EXPORT_SYMBOL(__canonicalize_funcptr_for_compare);
#ifdef CONFIG_64BIT
extern void __divdi3(void);
extern void __udivdi3(void);
extern void __umoddi3(void);
extern void __moddi3(void);
EXPORT_SYMBOL(__divdi3);
EXPORT_SYMBOL(__udivdi3);
EXPORT_SYMBOL(__umoddi3);
EXPORT_SYMBOL(__moddi3);
#endif
#ifndef CONFIG_64BIT
extern void $$dyncall(void);
EXPORT_SYMBOL($$dyncall);
......
arch/parisc/kernel/pci-dma.c
浏览文件 @ 7efb35af
......@@ -569,11 +569,10 @@ static void *fail_alloc_consistent(struct device *dev, size_t size,
static void *pa11_dma_alloc_noncoherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag)
{
void *addr = NULL;
void *addr;
/* rely on kmalloc to be cacheline aligned */
addr = kmalloc(size, flag);
if(addr)
addr = (void *)__get_free_pages(flag, get_order(size));
if (addr)
*dma_handle = (dma_addr_t)virt_to_phys(addr);
return addr;
......@@ -582,7 +581,7 @@ static void *pa11_dma_alloc_noncoherent(struct device *dev, size_t size,
static void pa11_dma_free_noncoherent(struct device *dev, size_t size,
void *vaddr, dma_addr_t iova)
{
kfree(vaddr);
free_pages((unsigned long)vaddr, get_order(size));
return;
}
......
arch/parisc/kernel/pci.c
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/kernel/processor.c
浏览文件 @ 7efb35af
......@@ -82,7 +82,12 @@ static int __cpuinit processor_probe(struct parisc_device *dev)
unsigned long cpuid;
struct cpuinfo_parisc *p;
#ifndef CONFIG_SMP
#ifdef CONFIG_SMP
if (num_online_cpus() >= NR_CPUS) {
printk(KERN_INFO "num_online_cpus() >= NR_CPUS\n");
return 1;
}
#else
if (boot_cpu_data.cpu_count > 0) {
printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
return 1;
......
arch/parisc/kernel/smp.c
浏览文件 @ 7efb35af
......@@ -432,22 +432,10 @@ smp_cpu_init(int cpunum)
void __init smp_callin(void)
{
int slave_id = cpu_now_booting;
#if 0
void *istack;
#endif
smp_cpu_init(slave_id);
preempt_disable();
#if 0 /* NOT WORKING YET - see entry.S */
istack = (void *)__get_free_pages(GFP_KERNEL,ISTACK_ORDER);
if (istack == NULL) {
printk(KERN_CRIT "Failed to allocate interrupt stack for cpu %d\n",slave_id);
BUG();
}
mtctl(istack,31);
#endif
flush_cache_all_local(); /* start with known state */
flush_tlb_all_local(NULL);
......
arch/parisc/kernel/sys_parisc32.c
浏览文件 @ 7efb35af
......@@ -473,3 +473,10 @@ long sys32_lookup_dcookie(u32 cookie_high, u32 cookie_low, char __user *buf,
return sys_lookup_dcookie((u64)cookie_high << 32 | cookie_low,
buf, len);
}
asmlinkage long compat_sys_fallocate(int fd, int mode, u32 offhi, u32 offlo,
u32 lenhi, u32 lenlo)
{
return sys_fallocate(fd, mode, ((loff_t)offhi << 32) | offlo,
((loff_t)lenhi << 32) | lenlo);
}
arch/parisc/kernel/syscall.S
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/kernel/syscall_table.S
浏览文件 @ 7efb35af
......@@ -403,6 +403,7 @@
ENTRY_COMP(signalfd)
ENTRY_COMP(timerfd)
ENTRY_SAME(eventfd)
ENTRY_COMP(fallocate) /* 305 */
/* Nothing yet */
......
arch/parisc/kernel/time.c
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/kernel/unwind.c
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/kernel/vmlinux.lds.S
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/Makefile
浏览文件 @ 7efb35af
......@@ -4,4 +4,4 @@
lib-y := lusercopy.o bitops.o checksum.o io.o memset.o fixup.o memcpy.o
obj-y := iomap.o
obj-y := libgcc/ milli/ iomap.o
arch/parisc/lib/libgcc/Makefile 0 → 100644
浏览文件 @ 7efb35af
obj-y := __ashldi3.o __ashrdi3.o __clzsi2.o __divdi3.o __divsi3.o \
__lshrdi3.o __moddi3.o __modsi3.o __udivdi3.o \
__udivmoddi4.o __udivmodsi4.o __udivsi3.o \
__umoddi3.o __umodsi3.o __muldi3.o __umulsidi3.o
arch/parisc/lib/libgcc/__ashldi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__ashrdi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__clzsi2.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__divdi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__divsi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__lshrdi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__moddi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__modsi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__muldi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__udivdi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__udivmoddi4.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__udivmodsi4.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__udivsi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__umoddi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__umodsi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/__umulsidi3.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/libgcc/libgcc.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/memcpy.c
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/Makefile 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/divI.S 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/divU.S 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/div_const.S 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/dyncall.S 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/milli.S 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/milli.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/mulI.S 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/remI.S 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/lib/milli/remU.S 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
arch/parisc/mm/init.c
浏览文件 @ 7efb35af
此差异已折叠。
arch/ppc/boot/Makefile
浏览文件 @ 7efb35af
此差异已折叠。
arch/xtensa/boot/Makefile
浏览文件 @ 7efb35af
此差异已折叠。
drivers/parisc/lba_pci.c
浏览文件 @ 7efb35af
此差异已折叠。
drivers/parisc/pdc_stable.c
浏览文件 @ 7efb35af
此差异已折叠。
drivers/parisc/sba_iommu.c
浏览文件 @ 7efb35af
此差异已折叠。
drivers/parisc/superio.c
浏览文件 @ 7efb35af
此差异已折叠。
drivers/sbus/char/vfc_dev.c
浏览文件 @ 7efb35af
此差异已折叠。
drivers/serial/Kconfig
浏览文件 @ 7efb35af
此差异已折叠。
fs/buffer.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/dcache.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/debugfs/inode.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/inotify.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/namei.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/namespace.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/nfs/proc.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/nfs/unlink.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/open.c
浏览文件 @ 7efb35af
此差异已折叠。
fs/pnode.h
浏览文件 @ 7efb35af
此差异已折叠。
fs/xattr.c
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/bfin-global.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/dma.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/gpio.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/mach-bf527/bf527.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/mach-bf527/bfin_serial_5xx.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/mach-bf527/blackfin.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/mach-bf527/dma.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/mach-bf527/irq.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/mach-bf527/mem_init.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/mach-bf527/mem_map.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-blackfin/mach-bf527/portmux.h 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/Kbuild
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/io.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/page.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/pci.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/pdc.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/pgtable.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/prefetch.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/rtc.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/semaphore.h
浏览文件 @ 7efb35af
此差异已折叠。
include/asm-parisc/unistd.h
浏览文件 @ 7efb35af
此差异已折叠。
include/linux/audit.h
浏览文件 @ 7efb35af
此差异已折叠。
include/linux/dcache.h
浏览文件 @ 7efb35af
此差异已折叠。
include/linux/fs.h
浏览文件 @ 7efb35af
此差异已折叠。
include/linux/fsnotify.h
浏览文件 @ 7efb35af
此差异已折叠。
include/linux/inotify.h
浏览文件 @ 7efb35af
此差异已折叠。
init/Kconfig
浏览文件 @ 7efb35af
此差异已折叠。
ipc/mqueue.c
浏览文件 @ 7efb35af
此差异已折叠。
kernel/Makefile
浏览文件 @ 7efb35af
此差异已折叠。
kernel/audit.c
浏览文件 @ 7efb35af
此差异已折叠。
kernel/audit.h
浏览文件 @ 7efb35af
此差异已折叠。
kernel/audit_tree.c 0 → 100644
浏览文件 @ 7efb35af
此差异已折叠。
kernel/auditfilter.c
浏览文件 @ 7efb35af
此差异已折叠。
kernel/auditsc.c
浏览文件 @ 7efb35af
此差异已折叠。
mm/oom_kill.c
浏览文件 @ 7efb35af
此差异已折叠。
scripts/checkstack.pl
浏览文件 @ 7efb35af
此差异已折叠。
scripts/kconfig/qconf.cc
浏览文件 @ 7efb35af
此差异已折叠。
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