提交 7eadd47f 编写于 作者: S Stefan Roese 提交者: Brian Norris

mtd: sunxi_nand: Select the chip in sunxi_nand_chip_init_timings()

nand_scan_ident() leaves the chip deselected. So just issuing some commands
from the sunxi driver does not work. We need to select the chip before
writing the commands to the NAND device. This patch takes care of this.

Set the new timing on all dies implemented as suggested by Boris.

This was detected on the in-circuit ICnova-A20 SoM equipped with the
Micron MT29F32G08CBACAWP (4GiB) ONFI NAND device.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Roy Spliet <r.spliet@ultimaker.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
[Brian: fixup whitespace]
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
上级 a9cadf72
......@@ -978,17 +978,23 @@ static int sunxi_nand_chip_init_timings(struct sunxi_nand_chip *chip,
mode = chip->nand.onfi_timing_mode_default;
} else {
uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {};
int i;
mode = fls(mode) - 1;
if (mode < 0)
mode = 0;
feature[0] = mode;
ret = chip->nand.onfi_set_features(&chip->mtd, &chip->nand,
for (i = 0; i < chip->nsels; i++) {
chip->nand.select_chip(&chip->mtd, i);
ret = chip->nand.onfi_set_features(&chip->mtd,
&chip->nand,
ONFI_FEATURE_ADDR_TIMING_MODE,
feature);
if (ret)
return ret;
chip->nand.select_chip(&chip->mtd, -1);
if (ret)
return ret;
}
}
timings = onfi_async_timing_mode_to_sdr_timings(mode);
......
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