net: enetc: cache accesses to &priv->si->hw
stable inclusion from stable-v5.10.157 commit de4dd4f9b3f648e07a2c3cc7115b655e02ac3672 category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7MU59 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=de4dd4f9b3f648e07a2c3cc7115b655e02ac3672 -------------------------------- [ Upstream commit 715bf261 ] The &priv->si->hw construct dereferences 2 pointers and makes lines longer than they need to be, in turn making the code harder to read. Replace &priv->si->hw accesses with a "hw" variable when there are 2 or more accesses within a function that dereference this. This includes loops, since &priv->si->hw is a loop invariant. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org> Stable-dep-of: 290b5fe0 ("net: enetc: preserve TX ring priority across reconfiguration") Signed-off-by: NSasha Levin <sashal@kernel.org> Signed-off-by: Nsanglipeng <sanglipeng1@jd.com>
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