mt76: add stbc entries to mt76_rate_power

Add stbc tx power eeprom parsing support for mt76x2 driver.
When writing power entries, make a distinction between rates that are
read from the same EEPROM value, but have separate register entries.

No effect on runtime behavior, but preparation for unification with mt76x0
and for placing restrictions on individual rate power limits
Signed-off-by: NFelix Fietkau <nbd@nbd.name>
Signed-off-by: NLorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: NFelix Fietkau <nbd@nbd.name>

drivers/net/wireless/mediatek/mt76/mt76.h

@@ -423,10 +423,11 @@ struct mt76_rate_power {
 		struct {
 			s8 cck[4];
 			s8 ofdm[8];
+			s8 stbc[10];
 			s8 ht[16];
 			s8 vht[10];
 		};
-		s8 all[38];
+		s8 all[48];
 	};
 };
 

drivers/net/wireless/mediatek/mt76/mt76x2_debugfs.c

@@ -59,6 +59,8 @@ static int read_txpower(struct seq_file *file, void *data)
 			    ARRAY_SIZE(dev->rate_power.cck));
 	mt76_seq_puts_array(file, "OFDM", dev->rate_power.ofdm,
 			    ARRAY_SIZE(dev->rate_power.ofdm));
+	mt76_seq_puts_array(file, "STBC", dev->rate_power.stbc,
+			    ARRAY_SIZE(dev->rate_power.stbc));
 	mt76_seq_puts_array(file, "HT", dev->rate_power.ht,
 			    ARRAY_SIZE(dev->rate_power.ht));
 	mt76_seq_puts_array(file, "VHT", dev->rate_power.vht,

drivers/net/wireless/mediatek/mt76/mt76x2_eeprom.c

@@ -482,6 +482,10 @@ void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t,
 	if (!is_5ghz)
 		val >>= 8;
 	t->vht[8] = t->vht[9] = mt76x2_rate_power_val(val >> 8);
+
+	memcpy(t->stbc, t->ht, sizeof(t->stbc[0]) * 8);
+	t->stbc[8] = t->vht[8];
+	t->stbc[9] = t->vht[9];
 }
 EXPORT_SYMBOL_GPL(mt76x2_get_rate_power);
 

drivers/net/wireless/mediatek/mt76/mt76x2_phy_common.c

@@ -227,15 +227,15 @@ void mt76x2_phy_set_txpower(struct mt76x2_dev *dev)
 	mt76_wr(dev, MT_TX_PWR_CFG_2,
 		mt76x2_tx_power_mask(t.ht[4], t.ht[6], t.ht[8], t.ht[10]));
 	mt76_wr(dev, MT_TX_PWR_CFG_3,
-		mt76x2_tx_power_mask(t.ht[12], t.ht[14], t.ht[0], t.ht[2]));
+		mt76x2_tx_power_mask(t.ht[12], t.ht[14], t.stbc[0], t.stbc[2]));
 	mt76_wr(dev, MT_TX_PWR_CFG_4,
-		mt76x2_tx_power_mask(t.ht[4], t.ht[6], 0, 0));
+		mt76x2_tx_power_mask(t.stbc[4], t.stbc[6], 0, 0));
 	mt76_wr(dev, MT_TX_PWR_CFG_7,
-		mt76x2_tx_power_mask(t.ofdm[6], t.vht[8], t.ht[6], t.vht[8]));
+		mt76x2_tx_power_mask(t.ofdm[7], t.vht[8], t.ht[7], t.vht[9]));
 	mt76_wr(dev, MT_TX_PWR_CFG_8,
-		mt76x2_tx_power_mask(t.ht[14], 0, t.vht[8], t.vht[8]));
+		mt76x2_tx_power_mask(t.ht[14], 0, t.vht[8], t.vht[9]));
 	mt76_wr(dev, MT_TX_PWR_CFG_9,
-		mt76x2_tx_power_mask(t.ht[6], 0, t.vht[8], t.vht[8]));
+		mt76x2_tx_power_mask(t.ht[7], 0, t.stbc[8], t.stbc[9]));
 }
 EXPORT_SYMBOL_GPL(mt76x2_phy_set_txpower);