提交 7b44cf2c 编写于 作者: J Jon Hunter

ARM: OMAP: Fix timer posted mode support

Currently the dmtimer posted mode is being enabled when the function
omap_dm_timer_enable_posted() is called. This function is only being called
for OMAP1 timers and OMAP2+ timers that are being used as system timers. Hence,
for OMAP2+ timers that are NOT being used as a system timer, posted mode is
not enabled but the "timer->posted" variable is still set (incorrectly) in
the omap_dm_timer_prepare() function.

This is a regression introduced by commit 3392cdd3 (ARM: OMAP: dmtimer:
switch-over to platform device driver) which was before the
omap_dm_timer_enable_posted() function was introduced. Although this is a
regression from the original code it only impacts performance and so is not
needed for stable.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
上级 bfd6d021
...@@ -121,21 +121,16 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) ...@@ -121,21 +121,16 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
static void omap_dm_timer_reset(struct omap_dm_timer *timer) static void omap_dm_timer_reset(struct omap_dm_timer *timer)
{ {
omap_dm_timer_enable(timer);
if (timer->pdev->id != 1) { if (timer->pdev->id != 1) {
omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
omap_dm_timer_wait_for_reset(timer); omap_dm_timer_wait_for_reset(timer);
} }
__omap_dm_timer_reset(timer, 0, 0); __omap_dm_timer_reset(timer, 0, 0);
__omap_dm_timer_enable_posted(timer);
omap_dm_timer_disable(timer);
} }
int omap_dm_timer_prepare(struct omap_dm_timer *timer) int omap_dm_timer_prepare(struct omap_dm_timer *timer)
{ {
int ret;
/* /*
* FIXME: OMAP1 devices do not use the clock framework for dmtimers so * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
* do not call clk_get() for these devices. * do not call clk_get() for these devices.
...@@ -149,13 +144,15 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer) ...@@ -149,13 +144,15 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer)
} }
} }
omap_dm_timer_enable(timer);
if (timer->capability & OMAP_TIMER_NEEDS_RESET) if (timer->capability & OMAP_TIMER_NEEDS_RESET)
omap_dm_timer_reset(timer); omap_dm_timer_reset(timer);
ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); __omap_dm_timer_enable_posted(timer);
omap_dm_timer_disable(timer);
timer->posted = 1; return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
return ret;
} }
static inline u32 omap_dm_timer_reserved_systimer(int id) static inline u32 omap_dm_timer_reserved_systimer(int id)
......
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