drm/amd/display: Remove DISPCLK Limit Floor for Certain SMU Versions
[WHY] SMU FW previously had an issue with lowering display clock to below 100 MHz, and a workaround was put in to limit it. Newest SMU FW does not have this issue, and no longer needs the 100MHz cap. [HOW] Remove the 100MHz cap based on the SMU FW version. Signed-off-by: NSung Lee <sung.lee@amd.com> Reviewed-by: NYongqiang Sun <yongqiang.sun@amd.com> Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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