提交 77d4ac6d 编写于 作者: M Michael Walle 提交者: Pratyush Yadav

mtd: spi-nor: move SECT_4K_PMC special handling

The SECT_4K_PMC flag will set a device specific opcode for the 4k sector
erase. Instead of handling it in the core, we can move it to a
late_init(). In that late init, loop over all erase types, look for the
4k size and replace the opcode.
Signed-off-by: NMichael Walle <michael@walle.cc>
Signed-off-by: NPratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220418112650.2791459-1-michael@walle.cc
上级 03c765b0
...@@ -2382,12 +2382,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) ...@@ -2382,12 +2382,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
*/ */
erase_mask = 0; erase_mask = 0;
i = 0; i = 0;
if (no_sfdp_flags & SECT_4K_PMC) { if (no_sfdp_flags & SECT_4K) {
erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], 4096u,
SPINOR_OP_BE_4K_PMC);
i++;
} else if (no_sfdp_flags & SECT_4K) {
erase_mask |= BIT(i); erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], 4096u, spi_nor_set_erase_type(&map->erase_type[i], 4096u,
SPINOR_OP_BE_4K); SPINOR_OP_BE_4K);
......
...@@ -457,7 +457,6 @@ struct spi_nor_fixups { ...@@ -457,7 +457,6 @@ struct spi_nor_fixups {
* flags are used together with the SPI_NOR_SKIP_SFDP flag. * flags are used together with the SPI_NOR_SKIP_SFDP flag.
* SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables. * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables.
* SECT_4K: SPINOR_OP_BE_4K works uniformly. * SECT_4K: SPINOR_OP_BE_4K works uniformly.
* SECT_4K_PMC: SPINOR_OP_BE_4K_PMC works uniformly.
* SPI_NOR_DUAL_READ: flash supports Dual Read. * SPI_NOR_DUAL_READ: flash supports Dual Read.
* SPI_NOR_QUAD_READ: flash supports Quad Read. * SPI_NOR_QUAD_READ: flash supports Quad Read.
* SPI_NOR_OCTAL_READ: flash supports Octal Read. * SPI_NOR_OCTAL_READ: flash supports Octal Read.
...@@ -505,7 +504,6 @@ struct flash_info { ...@@ -505,7 +504,6 @@ struct flash_info {
u8 no_sfdp_flags; u8 no_sfdp_flags;
#define SPI_NOR_SKIP_SFDP BIT(0) #define SPI_NOR_SKIP_SFDP BIT(0)
#define SECT_4K BIT(1) #define SECT_4K BIT(1)
#define SECT_4K_PMC BIT(2)
#define SPI_NOR_DUAL_READ BIT(3) #define SPI_NOR_DUAL_READ BIT(3)
#define SPI_NOR_QUAD_READ BIT(4) #define SPI_NOR_QUAD_READ BIT(4)
#define SPI_NOR_OCTAL_READ BIT(5) #define SPI_NOR_OCTAL_READ BIT(5)
......
...@@ -29,6 +29,21 @@ static const struct spi_nor_fixups is25lp256_fixups = { ...@@ -29,6 +29,21 @@ static const struct spi_nor_fixups is25lp256_fixups = {
.post_bfpt = is25lp256_post_bfpt_fixups, .post_bfpt = is25lp256_post_bfpt_fixups,
}; };
static void pm25lv_nor_late_init(struct spi_nor *nor)
{
struct spi_nor_erase_map *map = &nor->params->erase_map;
int i;
/* The PM25LV series has a different 4k sector erase opcode */
for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
if (map->erase_type[i].size == 4096)
map->erase_type[i].opcode = SPINOR_OP_BE_4K_PMC;
}
static const struct spi_nor_fixups pm25lv_nor_fixups = {
.late_init = pm25lv_nor_late_init,
};
static const struct flash_info issi_nor_parts[] = { static const struct flash_info issi_nor_parts[] = {
/* ISSI */ /* ISSI */
{ "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2) { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2)
...@@ -62,9 +77,13 @@ static const struct flash_info issi_nor_parts[] = { ...@@ -62,9 +77,13 @@ static const struct flash_info issi_nor_parts[] = {
/* PMC */ /* PMC */
{ "pm25lv512", INFO(0, 0, 32 * 1024, 2) { "pm25lv512", INFO(0, 0, 32 * 1024, 2)
NO_SFDP_FLAGS(SECT_4K_PMC) }, NO_SFDP_FLAGS(SECT_4K)
.fixups = &pm25lv_nor_fixups
},
{ "pm25lv010", INFO(0, 0, 32 * 1024, 4) { "pm25lv010", INFO(0, 0, 32 * 1024, 4)
NO_SFDP_FLAGS(SECT_4K_PMC) }, NO_SFDP_FLAGS(SECT_4K)
.fixups = &pm25lv_nor_fixups
},
{ "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64) { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64)
NO_SFDP_FLAGS(SECT_4K) }, NO_SFDP_FLAGS(SECT_4K) },
}; };
......
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