提交 760bb977 编写于 作者: H Heiko Stuebner

ARM: dts: rockchip: add usb phys to Cortex-A9 socs

This adds the usbphy nodes to rk3066 and rk3188, which share the usb hosts
in rk3xxx.dtsi and also enables it on boards based around these socs.

The usb-phy itself is the same as used on the rk3288 already.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
上级 ec32bd9f
...@@ -202,6 +202,10 @@ ...@@ -202,6 +202,10 @@
status = "okay"; status = "okay";
}; };
&usbphy {
status = "okay";
};
&wdt { &wdt {
status = "okay"; status = "okay";
}; };
...@@ -460,6 +460,10 @@ ...@@ -460,6 +460,10 @@
status = "okay"; status = "okay";
}; };
&usbphy {
status = "okay";
};
&usb_otg { &usb_otg {
status = "okay"; status = "okay";
}; };
......
...@@ -169,6 +169,28 @@ ...@@ -169,6 +169,28 @@
clock-names = "timer", "pclk"; clock-names = "timer", "pclk";
}; };
usbphy: phy {
compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
usbphy0: usb-phy0 {
#phy-cells = <0>;
reg = <0x17c>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
};
usbphy1: usb-phy1 {
#phy-cells = <0>;
reg = <0x188>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
};
};
pinctrl: pinctrl { pinctrl: pinctrl {
compatible = "rockchip,rk3066a-pinctrl"; compatible = "rockchip,rk3066a-pinctrl";
rockchip,grf = <&grf>; rockchip,grf = <&grf>;
......
...@@ -359,6 +359,10 @@ ...@@ -359,6 +359,10 @@
status = "okay"; status = "okay";
}; };
&usbphy {
status = "okay";
};
&usb_host { &usb_host {
status = "okay"; status = "okay";
}; };
......
...@@ -130,6 +130,28 @@ ...@@ -130,6 +130,28 @@
#reset-cells = <1>; #reset-cells = <1>;
}; };
usbphy: phy {
compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
usbphy0: usb-phy0 {
#phy-cells = <0>;
reg = <0x10c>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
};
usbphy1: usb-phy1 {
#phy-cells = <0>;
reg = <0x11c>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
};
};
pinctrl: pinctrl { pinctrl: pinctrl {
compatible = "rockchip,rk3188-pinctrl"; compatible = "rockchip,rk3188-pinctrl";
rockchip,grf = <&grf>; rockchip,grf = <&grf>;
......
...@@ -177,6 +177,8 @@ ...@@ -177,6 +177,8 @@
g-rx-fifo-size = <275>; g-rx-fifo-size = <275>;
g-tx-fifo-size = <256 128 128 64 64 32>; g-tx-fifo-size = <256 128 128 64 64 32>;
g-use-dma; g-use-dma;
phys = <&usbphy0>;
phy-names = "usb2-phy";
status = "disabled"; status = "disabled";
}; };
...@@ -187,6 +189,8 @@ ...@@ -187,6 +189,8 @@
clocks = <&cru HCLK_OTG1>; clocks = <&cru HCLK_OTG1>;
clock-names = "otg"; clock-names = "otg";
dr_mode = "host"; dr_mode = "host";
phys = <&usbphy1>;
phy-names = "usb2-phy";
status = "disabled"; status = "disabled";
}; };
......
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