提交 75388acd 编写于 作者: L Larry Finger 提交者: David S. Miller

[B43LEGACY]: add mac80211-based driver for legacy BCM43xx devices

Signed-off-by: NLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 e4d6b795
......@@ -804,6 +804,13 @@ L: linux-wireless@vger.kernel.org
W: http://bcm43xx.berlios.de/
S: Maintained
B43LEGACY WIRELESS DRIVER
P: Larry Finger
M: Larry.Finger@lwfinger.net
L: linux-wireless@vger.kernel.org
W: http://bcm43xx.berlios.de/
S: Maintained
BCM43XX WIRELESS DRIVER (SOFTMAC BASED VERSION)
P: Larry Finger
M: Larry.Finger@lwfinger.net
......
......@@ -580,6 +580,7 @@ config ADM8211
source "drivers/net/wireless/hostap/Kconfig"
source "drivers/net/wireless/bcm43xx/Kconfig"
source "drivers/net/wireless/b43/Kconfig"
source "drivers/net/wireless/b43legacy/Kconfig"
source "drivers/net/wireless/zd1211rw/Kconfig"
endmenu
......@@ -37,6 +37,7 @@ obj-$(CONFIG_PRISM54) += prism54/
obj-$(CONFIG_HOSTAP) += hostap/
obj-$(CONFIG_BCM43XX) += bcm43xx/
obj-$(CONFIG_B43) += b43/
obj-$(CONFIG_B43LEGACY) += b43legacy/
obj-$(CONFIG_ZD1211RW) += zd1211rw/
# 16-bit wireless PCMCIA client drivers
......
config B43LEGACY
tristate "Broadcom 43xx-legacy wireless support (mac80211 stack)"
depends on SSB_POSSIBLE && MAC80211 && WLAN_80211
select SSB
select FW_LOADER
select HW_RANDOM
---help---
b43legacy is a driver for 802.11b devices from Broadcom (BCM4301 and
BCM4303) and early model 802.11g chips (BCM4306 Ver. 2) used in the
Linksys WPC54G V1 PCMCIA devices.
Newer 802.11g and 802.11a devices need b43.
It is safe to include both b43 and b43legacy as the underlying glue
layer will automatically load the correct version for your device.
This driver uses V3 firmware, which must be installed separately using
b43-fwcutter.
This driver can be built as a module (recommended) that will be
called "b43legacy". If unsure, say M.
# Auto-select SSB PCI-HOST support, if possible
config B43LEGACY_PCI_AUTOSELECT
bool
depends on B43LEGACY && SSB_PCIHOST_POSSIBLE
select SSB_PCIHOST
default y
# Auto-select SSB PCICORE driver, if possible
config B43LEGACY_PCICORE_AUTOSELECT
bool
depends on B43LEGACY && SSB_DRIVER_PCICORE_POSSIBLE
select SSB_DRIVER_PCICORE
default y
config B43LEGACY_DEBUG
bool "Broadcom 43xx-legacy debugging"
depends on B43LEGACY
default y
---help---
Say Y, because this information will help you get the driver running.
This option generates a minimum of log output.
config B43LEGACY_DMA
bool
depends on B43LEGACY
config B43LEGACY_PIO
bool
depends on B43LEGACY
choice
prompt "Broadcom 43xx-legacy data transfer mode"
depends on B43LEGACY
default B43LEGACY_DMA_AND_PIO_MODE
config B43LEGACY_DMA_AND_PIO_MODE
bool "DMA + PIO"
select B43LEGACY_DMA
select B43LEGACY_PIO
---help---
Include both, Direct Memory Access (DMA) and Programmed I/O (PIO)
data transfer modes. The mode actually used is selectable through
the module parameter "pio". With pio=0 as a module parameter, the
default DMA is used, otherwise PIO is used.
If unsure, choose this option.
config B43LEGACY_DMA_MODE
bool "DMA (Direct Memory Access) only"
select B43LEGACY_DMA
---help---
Only include Direct Memory Access (DMA).
This reduces the size of the driver module, by omitting the PIO code.
config B43LEGACY_PIO_MODE
bool "PIO (Programmed I/O) only"
select B43LEGACY_PIO
---help---
Only include Programmed I/O (PIO).
This reduces the size of the driver module, by omitting the DMA code.
Please note that PIO transfers are slow (compared to DMA).
Also note that not all devices of the b43legacy series support PIO.
You should use PIO only if DMA does not work for you.
endchoice
obj-$(CONFIG_B43LEGACY) += b43legacy.o
b43legacy-obj-$(CONFIG_B43LEGACY_DEBUG) += debugfs.o
b43legacy-obj-$(CONFIG_B43LEGACY_DMA) += dma.o
b43legacy-obj-$(CONFIG_B43LEGACY_PIO) += pio.o
b43legacy-objs := main.o \
ilt.o \
leds.o \
phy.o \
radio.o \
sysfs.o \
xmit.o \
$(b43legacy-obj-y)
此差异已折叠。
/*
Broadcom B43legacy wireless driver
debugfs driver debugging code
Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#include <linux/fs.h>
#include <linux/debugfs.h>
#include <linux/slab.h>
#include <linux/netdevice.h>
#include <linux/pci.h>
#include <linux/mutex.h>
#include "b43legacy.h"
#include "main.h"
#include "debugfs.h"
#include "dma.h"
#include "pio.h"
#include "xmit.h"
/* The root directory. */
static struct dentry *rootdir;
struct b43legacy_debugfs_fops {
ssize_t (*read)(struct b43legacy_wldev *dev, char *buf, size_t bufsize);
int (*write)(struct b43legacy_wldev *dev, const char *buf, size_t count);
struct file_operations fops;
/* Offset of struct b43legacy_dfs_file in struct b43legacy_dfsentry */
size_t file_struct_offset;
/* Take wl->irq_lock before calling read/write? */
bool take_irqlock;
};
static inline
struct b43legacy_dfs_file * fops_to_dfs_file(struct b43legacy_wldev *dev,
const struct b43legacy_debugfs_fops *dfops)
{
void *p;
p = dev->dfsentry;
p += dfops->file_struct_offset;
return p;
}
#define fappend(fmt, x...) \
do { \
if (bufsize - count) \
count += snprintf(buf + count, \
bufsize - count, \
fmt , ##x); \
else \
printk(KERN_ERR "b43legacy: fappend overflow\n"); \
} while (0)
/* wl->irq_lock is locked */
static ssize_t tsf_read_file(struct b43legacy_wldev *dev, char *buf, size_t bufsize)
{
ssize_t count = 0;
u64 tsf;
b43legacy_tsf_read(dev, &tsf);
fappend("0x%08x%08x\n",
(unsigned int)((tsf & 0xFFFFFFFF00000000ULL) >> 32),
(unsigned int)(tsf & 0xFFFFFFFFULL));
return count;
}
/* wl->irq_lock is locked */
static int tsf_write_file(struct b43legacy_wldev *dev, const char *buf, size_t count)
{
u64 tsf;
if (sscanf(buf, "%llu", (unsigned long long *)(&tsf)) != 1)
return -EINVAL;
b43legacy_tsf_write(dev, tsf);
return 0;
}
/* wl->irq_lock is locked */
static ssize_t ucode_regs_read_file(struct b43legacy_wldev *dev, char *buf, size_t bufsize)
{
ssize_t count = 0;
int i;
for (i = 0; i < 64; i++) {
fappend("r%d = 0x%04x\n", i,
b43legacy_shm_read16(dev, B43legacy_SHM_WIRELESS, i));
}
return count;
}
/* wl->irq_lock is locked */
static ssize_t shm_read_file(struct b43legacy_wldev *dev, char *buf, size_t bufsize)
{
ssize_t count = 0;
int i;
u16 tmp;
__le16 *le16buf = (__le16 *)buf;
for (i = 0; i < 0x1000; i++) {
if (bufsize <= 0)
break;
tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2 * i);
le16buf[i] = cpu_to_le16(tmp);
count += sizeof(tmp);
bufsize -= sizeof(tmp);
}
return count;
}
static ssize_t txstat_read_file(struct b43legacy_wldev *dev, char *buf, size_t bufsize)
{
struct b43legacy_txstatus_log *log = &dev->dfsentry->txstatlog;
ssize_t count = 0;
unsigned long flags;
int i, idx;
struct b43legacy_txstatus *stat;
spin_lock_irqsave(&log->lock, flags);
if (log->end < 0) {
fappend("Nothing transmitted, yet\n");
goto out_unlock;
}
fappend("b43legacy TX status reports:\n\n"
"index | cookie | seq | phy_stat | frame_count | "
"rts_count | supp_reason | pm_indicated | "
"intermediate | for_ampdu | acked\n" "---\n");
i = log->end + 1;
idx = 0;
while (1) {
if (i == B43legacy_NR_LOGGED_TXSTATUS)
i = 0;
stat = &(log->log[i]);
if (stat->cookie) {
fappend("%03d | "
"0x%04X | 0x%04X | 0x%02X | "
"0x%X | 0x%X | "
"%u | %u | "
"%u | %u | %u\n",
idx,
stat->cookie, stat->seq, stat->phy_stat,
stat->frame_count, stat->rts_count,
stat->supp_reason, stat->pm_indicated,
stat->intermediate, stat->for_ampdu,
stat->acked);
idx++;
}
if (i == log->end)
break;
i++;
}
out_unlock:
spin_unlock_irqrestore(&log->lock, flags);
return count;
}
/* wl->irq_lock is locked */
static int restart_write_file(struct b43legacy_wldev *dev, const char *buf, size_t count)
{
int err = 0;
if (count > 0 && buf[0] == '1') {
b43legacy_controller_restart(dev, "manually restarted");
} else
err = -EINVAL;
return err;
}
#undef fappend
static int b43legacy_debugfs_open(struct inode *inode, struct file *file)
{
file->private_data = inode->i_private;
return 0;
}
static ssize_t b43legacy_debugfs_read(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
struct b43legacy_wldev *dev;
struct b43legacy_debugfs_fops *dfops;
struct b43legacy_dfs_file *dfile;
ssize_t ret = 0;
char *buf;
const size_t bufsize = 1024 * 128;
const size_t buforder = get_order(bufsize);
int err = 0;
if (!count)
return 0;
dev = file->private_data;
if (!dev)
return -ENODEV;
mutex_lock(&dev->wl->mutex);
if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
err = -ENODEV;
goto out_unlock;
}
dfops = container_of(file->f_op, struct b43legacy_debugfs_fops, fops);
if (!dfops->read) {
err = -ENOSYS;
goto out_unlock;
}
dfile = fops_to_dfs_file(dev, dfops);
if (!dfile->buffer) {
buf = (char *)__get_free_pages(GFP_KERNEL, buforder);
if (!buf) {
err = -ENOMEM;
goto out_unlock;
}
memset(buf, 0, bufsize);
if (dfops->take_irqlock) {
spin_lock_irq(&dev->wl->irq_lock);
ret = dfops->read(dev, buf, bufsize);
spin_unlock_irq(&dev->wl->irq_lock);
} else
ret = dfops->read(dev, buf, bufsize);
if (ret <= 0) {
free_pages((unsigned long)buf, buforder);
err = ret;
goto out_unlock;
}
dfile->data_len = ret;
dfile->buffer = buf;
}
ret = simple_read_from_buffer(userbuf, count, ppos,
dfile->buffer,
dfile->data_len);
if (*ppos >= dfile->data_len) {
free_pages((unsigned long)dfile->buffer, buforder);
dfile->buffer = NULL;
dfile->data_len = 0;
}
out_unlock:
mutex_unlock(&dev->wl->mutex);
return err ? err : ret;
}
static ssize_t b43legacy_debugfs_write(struct file *file,
const char __user *userbuf,
size_t count, loff_t *ppos)
{
struct b43legacy_wldev *dev;
struct b43legacy_debugfs_fops *dfops;
char *buf;
int err = 0;
if (!count)
return 0;
if (count > PAGE_SIZE)
return -E2BIG;
dev = file->private_data;
if (!dev)
return -ENODEV;
mutex_lock(&dev->wl->mutex);
if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
err = -ENODEV;
goto out_unlock;
}
dfops = container_of(file->f_op, struct b43legacy_debugfs_fops, fops);
if (!dfops->write) {
err = -ENOSYS;
goto out_unlock;
}
buf = (char *)get_zeroed_page(GFP_KERNEL);
if (!buf) {
err = -ENOMEM;
goto out_unlock;
}
if (copy_from_user(buf, userbuf, count)) {
err = -EFAULT;
goto out_freepage;
}
if (dfops->take_irqlock) {
spin_lock_irq(&dev->wl->irq_lock);
err = dfops->write(dev, buf, count);
spin_unlock_irq(&dev->wl->irq_lock);
} else
err = dfops->write(dev, buf, count);
if (err)
goto out_freepage;
out_freepage:
free_page((unsigned long)buf);
out_unlock:
mutex_unlock(&dev->wl->mutex);
return err ? err : count;
}
#define B43legacy_DEBUGFS_FOPS(name, _read, _write, _take_irqlock) \
static struct b43legacy_debugfs_fops fops_##name = { \
.read = _read, \
.write = _write, \
.fops = { \
.open = b43legacy_debugfs_open, \
.read = b43legacy_debugfs_read, \
.write = b43legacy_debugfs_write, \
}, \
.file_struct_offset = offsetof(struct b43legacy_dfsentry, \
file_##name), \
.take_irqlock = _take_irqlock, \
}
B43legacy_DEBUGFS_FOPS(tsf, tsf_read_file, tsf_write_file, 1);
B43legacy_DEBUGFS_FOPS(ucode_regs, ucode_regs_read_file, NULL, 1);
B43legacy_DEBUGFS_FOPS(shm, shm_read_file, NULL, 1);
B43legacy_DEBUGFS_FOPS(txstat, txstat_read_file, NULL, 0);
B43legacy_DEBUGFS_FOPS(restart, NULL, restart_write_file, 1);
int b43legacy_debug(struct b43legacy_wldev *dev, enum b43legacy_dyndbg feature)
{
return !!(dev->dfsentry && dev->dfsentry->dyn_debug[feature]);
}
static void b43legacy_remove_dynamic_debug(struct b43legacy_wldev *dev)
{
struct b43legacy_dfsentry *e = dev->dfsentry;
int i;
for (i = 0; i < __B43legacy_NR_DYNDBG; i++)
debugfs_remove(e->dyn_debug_dentries[i]);
}
static void b43legacy_add_dynamic_debug(struct b43legacy_wldev *dev)
{
struct b43legacy_dfsentry *e = dev->dfsentry;
struct dentry *d;
#define add_dyn_dbg(name, id, initstate) do { \
e->dyn_debug[id] = (initstate); \
d = debugfs_create_bool(name, 0600, e->subdir, \
&(e->dyn_debug[id])); \
if (!IS_ERR(d)) \
e->dyn_debug_dentries[id] = d; \
} while (0)
add_dyn_dbg("debug_xmitpower", B43legacy_DBG_XMITPOWER, 0);
add_dyn_dbg("debug_dmaoverflow", B43legacy_DBG_DMAOVERFLOW, 0);
add_dyn_dbg("debug_dmaverbose", B43legacy_DBG_DMAVERBOSE, 0);
add_dyn_dbg("debug_pwork_fast", B43legacy_DBG_PWORK_FAST, 0);
add_dyn_dbg("debug_pwork_stop", B43legacy_DBG_PWORK_STOP, 0);
#undef add_dyn_dbg
}
void b43legacy_debugfs_add_device(struct b43legacy_wldev *dev)
{
struct b43legacy_dfsentry *e;
struct b43legacy_txstatus_log *log;
char devdir[16];
B43legacy_WARN_ON(!dev);
e = kzalloc(sizeof(*e), GFP_KERNEL);
if (!e) {
b43legacyerr(dev->wl, "debugfs: add device OOM\n");
return;
}
e->dev = dev;
log = &e->txstatlog;
log->log = kcalloc(B43legacy_NR_LOGGED_TXSTATUS,
sizeof(struct b43legacy_txstatus), GFP_KERNEL);
if (!log->log) {
b43legacyerr(dev->wl, "debugfs: add device txstatus OOM\n");
kfree(e);
return;
}
log->end = -1;
spin_lock_init(&log->lock);
dev->dfsentry = e;
snprintf(devdir, sizeof(devdir), "%s", wiphy_name(dev->wl->hw->wiphy));
e->subdir = debugfs_create_dir(devdir, rootdir);
if (!e->subdir || IS_ERR(e->subdir)) {
if (e->subdir == ERR_PTR(-ENODEV)) {
b43legacydbg(dev->wl, "DebugFS (CONFIG_DEBUG_FS) not "
"enabled in kernel config\n");
} else {
b43legacyerr(dev->wl, "debugfs: cannot create %s directory\n",
devdir);
}
dev->dfsentry = NULL;
kfree(log->log);
kfree(e);
return;
}
#define ADD_FILE(name, mode) \
do { \
struct dentry *d; \
d = debugfs_create_file(__stringify(name), \
mode, e->subdir, dev, \
&fops_##name.fops); \
e->file_##name.dentry = NULL; \
if (!IS_ERR(d)) \
e->file_##name.dentry = d; \
} while (0)
ADD_FILE(tsf, 0600);
ADD_FILE(ucode_regs, 0400);
ADD_FILE(shm, 0400);
ADD_FILE(txstat, 0400);
ADD_FILE(restart, 0200);
#undef ADD_FILE
b43legacy_add_dynamic_debug(dev);
}
void b43legacy_debugfs_remove_device(struct b43legacy_wldev *dev)
{
struct b43legacy_dfsentry *e;
if (!dev)
return;
e = dev->dfsentry;
if (!e)
return;
b43legacy_remove_dynamic_debug(dev);
debugfs_remove(e->file_tsf.dentry);
debugfs_remove(e->file_ucode_regs.dentry);
debugfs_remove(e->file_shm.dentry);
debugfs_remove(e->file_txstat.dentry);
debugfs_remove(e->file_restart.dentry);
debugfs_remove(e->subdir);
kfree(e->txstatlog.log);
kfree(e);
}
void b43legacy_debugfs_log_txstat(struct b43legacy_wldev *dev,
const struct b43legacy_txstatus *status)
{
struct b43legacy_dfsentry *e = dev->dfsentry;
struct b43legacy_txstatus_log *log;
struct b43legacy_txstatus *cur;
int i;
if (!e)
return;
log = &e->txstatlog;
B43legacy_WARN_ON(!irqs_disabled());
spin_lock(&log->lock);
i = log->end + 1;
if (i == B43legacy_NR_LOGGED_TXSTATUS)
i = 0;
log->end = i;
cur = &(log->log[i]);
memcpy(cur, status, sizeof(*cur));
spin_unlock(&log->lock);
}
void b43legacy_debugfs_init(void)
{
rootdir = debugfs_create_dir(KBUILD_MODNAME, NULL);
if (IS_ERR(rootdir))
rootdir = NULL;
}
void b43legacy_debugfs_exit(void)
{
debugfs_remove(rootdir);
}
#ifndef B43legacy_DEBUGFS_H_
#define B43legacy_DEBUGFS_H_
struct b43legacy_wldev;
struct b43legacy_txstatus;
enum b43legacy_dyndbg { /* Dynamic debugging features */
B43legacy_DBG_XMITPOWER,
B43legacy_DBG_DMAOVERFLOW,
B43legacy_DBG_DMAVERBOSE,
B43legacy_DBG_PWORK_FAST,
B43legacy_DBG_PWORK_STOP,
__B43legacy_NR_DYNDBG,
};
#ifdef CONFIG_B43LEGACY_DEBUG
struct dentry;
#define B43legacy_NR_LOGGED_TXSTATUS 100
struct b43legacy_txstatus_log {
struct b43legacy_txstatus *log;
int end;
spinlock_t lock; /* lock for debugging */
};
struct b43legacy_dfs_file {
struct dentry *dentry;
char *buffer;
size_t data_len;
};
struct b43legacy_dfsentry {
struct b43legacy_wldev *dev;
struct dentry *subdir;
struct b43legacy_dfs_file file_tsf;
struct b43legacy_dfs_file file_ucode_regs;
struct b43legacy_dfs_file file_shm;
struct b43legacy_dfs_file file_txstat;
struct b43legacy_dfs_file file_txpower_g;
struct b43legacy_dfs_file file_restart;
struct b43legacy_dfs_file file_loctls;
struct b43legacy_txstatus_log txstatlog;
/* Enabled/Disabled list for the dynamic debugging features. */
u32 dyn_debug[__B43legacy_NR_DYNDBG];
/* Dentries for the dynamic debugging entries. */
struct dentry *dyn_debug_dentries[__B43legacy_NR_DYNDBG];
};
int b43legacy_debug(struct b43legacy_wldev *dev,
enum b43legacy_dyndbg feature);
void b43legacy_debugfs_init(void);
void b43legacy_debugfs_exit(void);
void b43legacy_debugfs_add_device(struct b43legacy_wldev *dev);
void b43legacy_debugfs_remove_device(struct b43legacy_wldev *dev);
void b43legacy_debugfs_log_txstat(struct b43legacy_wldev *dev,
const struct b43legacy_txstatus *status);
#else /* CONFIG_B43LEGACY_DEBUG*/
static inline
int b43legacy_debug(struct b43legacy_wldev *dev,
enum b43legacy_dyndbg feature)
{
return 0;
}
static inline
void b43legacy_debugfs_init(void) { }
static inline
void b43legacy_debugfs_exit(void) { }
static inline
void b43legacy_debugfs_add_device(struct b43legacy_wldev *dev) { }
static inline
void b43legacy_debugfs_remove_device(struct b43legacy_wldev *dev) { }
static inline
void b43legacy_debugfs_log_txstat(struct b43legacy_wldev *dev,
const struct b43legacy_txstatus *status)
{ }
#endif /* CONFIG_B43LEGACY_DEBUG*/
#endif /* B43legacy_DEBUGFS_H_ */
此差异已折叠。
#ifndef B43legacy_DMA_H_
#define B43legacy_DMA_H_
#include <linux/list.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/linkage.h>
#include <asm/atomic.h>
#include "b43legacy.h"
/* DMA-Interrupt reasons. */
#define B43legacy_DMAIRQ_FATALMASK ((1 << 10) | (1 << 11) | (1 << 12) \
| (1 << 14) | (1 << 15))
#define B43legacy_DMAIRQ_NONFATALMASK (1 << 13)
#define B43legacy_DMAIRQ_RX_DONE (1 << 16)
/*** 32-bit DMA Engine. ***/
/* 32-bit DMA controller registers. */
#define B43legacy_DMA32_TXCTL 0x00
#define B43legacy_DMA32_TXENABLE 0x00000001
#define B43legacy_DMA32_TXSUSPEND 0x00000002
#define B43legacy_DMA32_TXLOOPBACK 0x00000004
#define B43legacy_DMA32_TXFLUSH 0x00000010
#define B43legacy_DMA32_TXADDREXT_MASK 0x00030000
#define B43legacy_DMA32_TXADDREXT_SHIFT 16
#define B43legacy_DMA32_TXRING 0x04
#define B43legacy_DMA32_TXINDEX 0x08
#define B43legacy_DMA32_TXSTATUS 0x0C
#define B43legacy_DMA32_TXDPTR 0x00000FFF
#define B43legacy_DMA32_TXSTATE 0x0000F000
#define B43legacy_DMA32_TXSTAT_DISABLED 0x00000000
#define B43legacy_DMA32_TXSTAT_ACTIVE 0x00001000
#define B43legacy_DMA32_TXSTAT_IDLEWAIT 0x00002000
#define B43legacy_DMA32_TXSTAT_STOPPED 0x00003000
#define B43legacy_DMA32_TXSTAT_SUSP 0x00004000
#define B43legacy_DMA32_TXERROR 0x000F0000
#define B43legacy_DMA32_TXERR_NOERR 0x00000000
#define B43legacy_DMA32_TXERR_PROT 0x00010000
#define B43legacy_DMA32_TXERR_UNDERRUN 0x00020000
#define B43legacy_DMA32_TXERR_BUFREAD 0x00030000
#define B43legacy_DMA32_TXERR_DESCREAD 0x00040000
#define B43legacy_DMA32_TXACTIVE 0xFFF00000
#define B43legacy_DMA32_RXCTL 0x10
#define B43legacy_DMA32_RXENABLE 0x00000001
#define B43legacy_DMA32_RXFROFF_MASK 0x000000FE
#define B43legacy_DMA32_RXFROFF_SHIFT 1
#define B43legacy_DMA32_RXDIRECTFIFO 0x00000100
#define B43legacy_DMA32_RXADDREXT_MASK 0x00030000
#define B43legacy_DMA32_RXADDREXT_SHIFT 16
#define B43legacy_DMA32_RXRING 0x14
#define B43legacy_DMA32_RXINDEX 0x18
#define B43legacy_DMA32_RXSTATUS 0x1C
#define B43legacy_DMA32_RXDPTR 0x00000FFF
#define B43legacy_DMA32_RXSTATE 0x0000F000
#define B43legacy_DMA32_RXSTAT_DISABLED 0x00000000
#define B43legacy_DMA32_RXSTAT_ACTIVE 0x00001000
#define B43legacy_DMA32_RXSTAT_IDLEWAIT 0x00002000
#define B43legacy_DMA32_RXSTAT_STOPPED 0x00003000
#define B43legacy_DMA32_RXERROR 0x000F0000
#define B43legacy_DMA32_RXERR_NOERR 0x00000000
#define B43legacy_DMA32_RXERR_PROT 0x00010000
#define B43legacy_DMA32_RXERR_OVERFLOW 0x00020000
#define B43legacy_DMA32_RXERR_BUFWRITE 0x00030000
#define B43legacy_DMA32_RXERR_DESCREAD 0x00040000
#define B43legacy_DMA32_RXACTIVE 0xFFF00000
/* 32-bit DMA descriptor. */
struct b43legacy_dmadesc32 {
__le32 control;
__le32 address;
} __attribute__((__packed__));
#define B43legacy_DMA32_DCTL_BYTECNT 0x00001FFF
#define B43legacy_DMA32_DCTL_ADDREXT_MASK 0x00030000
#define B43legacy_DMA32_DCTL_ADDREXT_SHIFT 16
#define B43legacy_DMA32_DCTL_DTABLEEND 0x10000000
#define B43legacy_DMA32_DCTL_IRQ 0x20000000
#define B43legacy_DMA32_DCTL_FRAMEEND 0x40000000
#define B43legacy_DMA32_DCTL_FRAMESTART 0x80000000
/*** 64-bit DMA Engine. ***/
/* 64-bit DMA controller registers. */
#define B43legacy_DMA64_TXCTL 0x00
#define B43legacy_DMA64_TXENABLE 0x00000001
#define B43legacy_DMA64_TXSUSPEND 0x00000002
#define B43legacy_DMA64_TXLOOPBACK 0x00000004
#define B43legacy_DMA64_TXFLUSH 0x00000010
#define B43legacy_DMA64_TXADDREXT_MASK 0x00030000
#define B43legacy_DMA64_TXADDREXT_SHIFT 16
#define B43legacy_DMA64_TXINDEX 0x04
#define B43legacy_DMA64_TXRINGLO 0x08
#define B43legacy_DMA64_TXRINGHI 0x0C
#define B43legacy_DMA64_TXSTATUS 0x10
#define B43legacy_DMA64_TXSTATDPTR 0x00001FFF
#define B43legacy_DMA64_TXSTAT 0xF0000000
#define B43legacy_DMA64_TXSTAT_DISABLED 0x00000000
#define B43legacy_DMA64_TXSTAT_ACTIVE 0x10000000
#define B43legacy_DMA64_TXSTAT_IDLEWAIT 0x20000000
#define B43legacy_DMA64_TXSTAT_STOPPED 0x30000000
#define B43legacy_DMA64_TXSTAT_SUSP 0x40000000
#define B43legacy_DMA64_TXERROR 0x14
#define B43legacy_DMA64_TXERRDPTR 0x0001FFFF
#define B43legacy_DMA64_TXERR 0xF0000000
#define B43legacy_DMA64_TXERR_NOERR 0x00000000
#define B43legacy_DMA64_TXERR_PROT 0x10000000
#define B43legacy_DMA64_TXERR_UNDERRUN 0x20000000
#define B43legacy_DMA64_TXERR_TRANSFER 0x30000000
#define B43legacy_DMA64_TXERR_DESCREAD 0x40000000
#define B43legacy_DMA64_TXERR_CORE 0x50000000
#define B43legacy_DMA64_RXCTL 0x20
#define B43legacy_DMA64_RXENABLE 0x00000001
#define B43legacy_DMA64_RXFROFF_MASK 0x000000FE
#define B43legacy_DMA64_RXFROFF_SHIFT 1
#define B43legacy_DMA64_RXDIRECTFIFO 0x00000100
#define B43legacy_DMA64_RXADDREXT_MASK 0x00030000
#define B43legacy_DMA64_RXADDREXT_SHIFT 16
#define B43legacy_DMA64_RXINDEX 0x24
#define B43legacy_DMA64_RXRINGLO 0x28
#define B43legacy_DMA64_RXRINGHI 0x2C
#define B43legacy_DMA64_RXSTATUS 0x30
#define B43legacy_DMA64_RXSTATDPTR 0x00001FFF
#define B43legacy_DMA64_RXSTAT 0xF0000000
#define B43legacy_DMA64_RXSTAT_DISABLED 0x00000000
#define B43legacy_DMA64_RXSTAT_ACTIVE 0x10000000
#define B43legacy_DMA64_RXSTAT_IDLEWAIT 0x20000000
#define B43legacy_DMA64_RXSTAT_STOPPED 0x30000000
#define B43legacy_DMA64_RXSTAT_SUSP 0x40000000
#define B43legacy_DMA64_RXERROR 0x34
#define B43legacy_DMA64_RXERRDPTR 0x0001FFFF
#define B43legacy_DMA64_RXERR 0xF0000000
#define B43legacy_DMA64_RXERR_NOERR 0x00000000
#define B43legacy_DMA64_RXERR_PROT 0x10000000
#define B43legacy_DMA64_RXERR_UNDERRUN 0x20000000
#define B43legacy_DMA64_RXERR_TRANSFER 0x30000000
#define B43legacy_DMA64_RXERR_DESCREAD 0x40000000
#define B43legacy_DMA64_RXERR_CORE 0x50000000
/* 64-bit DMA descriptor. */
struct b43legacy_dmadesc64 {
__le32 control0;
__le32 control1;
__le32 address_low;
__le32 address_high;
} __attribute__((__packed__));
#define B43legacy_DMA64_DCTL0_DTABLEEND 0x10000000
#define B43legacy_DMA64_DCTL0_IRQ 0x20000000
#define B43legacy_DMA64_DCTL0_FRAMEEND 0x40000000
#define B43legacy_DMA64_DCTL0_FRAMESTART 0x80000000
#define B43legacy_DMA64_DCTL1_BYTECNT 0x00001FFF
#define B43legacy_DMA64_DCTL1_ADDREXT_MASK 0x00030000
#define B43legacy_DMA64_DCTL1_ADDREXT_SHIFT 16
struct b43legacy_dmadesc_generic {
union {
struct b43legacy_dmadesc32 dma32;
struct b43legacy_dmadesc64 dma64;
} __attribute__((__packed__));
} __attribute__((__packed__));
/* Misc DMA constants */
#define B43legacy_DMA_RINGMEMSIZE PAGE_SIZE
#define B43legacy_DMA0_RX_FRAMEOFFSET 30
#define B43legacy_DMA3_RX_FRAMEOFFSET 0
/* DMA engine tuning knobs */
#define B43legacy_TXRING_SLOTS 128
#define B43legacy_RXRING_SLOTS 64
#define B43legacy_DMA0_RX_BUFFERSIZE (2304 + 100)
#define B43legacy_DMA3_RX_BUFFERSIZE 16
#ifdef CONFIG_B43LEGACY_DMA
struct sk_buff;
struct b43legacy_private;
struct b43legacy_txstatus;
struct b43legacy_dmadesc_meta {
/* The kernel DMA-able buffer. */
struct sk_buff *skb;
/* DMA base bus-address of the descriptor buffer. */
dma_addr_t dmaaddr;
/* ieee80211 TX status. Only used once per 802.11 frag. */
bool is_last_fragment;
struct ieee80211_tx_status txstat;
};
struct b43legacy_dmaring;
/* Lowlevel DMA operations that differ between 32bit and 64bit DMA. */
struct b43legacy_dma_ops {
struct b43legacy_dmadesc_generic * (*idx2desc)
(struct b43legacy_dmaring *ring,
int slot,
struct b43legacy_dmadesc_meta
**meta);
void (*fill_descriptor)(struct b43legacy_dmaring *ring,
struct b43legacy_dmadesc_generic *desc,
dma_addr_t dmaaddr, u16 bufsize,
int start, int end, int irq);
void (*poke_tx)(struct b43legacy_dmaring *ring, int slot);
void (*tx_suspend)(struct b43legacy_dmaring *ring);
void (*tx_resume)(struct b43legacy_dmaring *ring);
int (*get_current_rxslot)(struct b43legacy_dmaring *ring);
void (*set_current_rxslot)(struct b43legacy_dmaring *ring, int slot);
};
struct b43legacy_dmaring {
/* Lowlevel DMA ops. */
const struct b43legacy_dma_ops *ops;
/* Kernel virtual base address of the ring memory. */
void *descbase;
/* Meta data about all descriptors. */
struct b43legacy_dmadesc_meta *meta;
/* Cache of TX headers for each slot.
* This is to avoid an allocation on each TX.
* This is NULL for an RX ring.
*/
u8 *txhdr_cache;
/* (Unadjusted) DMA base bus-address of the ring memory. */
dma_addr_t dmabase;
/* Number of descriptor slots in the ring. */
int nr_slots;
/* Number of used descriptor slots. */
int used_slots;
/* Currently used slot in the ring. */
int current_slot;
/* Total number of packets sent. Statistics only. */
unsigned int nr_tx_packets;
/* Frameoffset in octets. */
u32 frameoffset;
/* Descriptor buffer size. */
u16 rx_buffersize;
/* The MMIO base register of the DMA controller. */
u16 mmio_base;
/* DMA controller index number (0-5). */
int index;
/* Boolean. Is this a TX ring? */
bool tx;
/* Boolean. 64bit DMA if true, 32bit DMA otherwise. */
bool dma64;
/* Boolean. Is this ring stopped at ieee80211 level? */
bool stopped;
/* Lock, only used for TX. */
spinlock_t lock;
struct b43legacy_wldev *dev;
#ifdef CONFIG_B43LEGACY_DEBUG
/* Maximum number of used slots. */
int max_used_slots;
/* Last time we injected a ring overflow. */
unsigned long last_injected_overflow;
#endif /* CONFIG_B43LEGACY_DEBUG*/
};
static inline
u32 b43legacy_dma_read(struct b43legacy_dmaring *ring,
u16 offset)
{
return b43legacy_read32(ring->dev, ring->mmio_base + offset);
}
static inline
void b43legacy_dma_write(struct b43legacy_dmaring *ring,
u16 offset, u32 value)
{
b43legacy_write32(ring->dev, ring->mmio_base + offset, value);
}
int b43legacy_dma_init(struct b43legacy_wldev *dev);
void b43legacy_dma_free(struct b43legacy_wldev *dev);
int b43legacy_dmacontroller_rx_reset(struct b43legacy_wldev *dev,
u16 dmacontroller_mmio_base,
int dma64);
int b43legacy_dmacontroller_tx_reset(struct b43legacy_wldev *dev,
u16 dmacontroller_mmio_base,
int dma64);
u16 b43legacy_dmacontroller_base(int dma64bit, int dmacontroller_idx);
void b43legacy_dma_tx_suspend(struct b43legacy_wldev *dev);
void b43legacy_dma_tx_resume(struct b43legacy_wldev *dev);
void b43legacy_dma_get_tx_stats(struct b43legacy_wldev *dev,
struct ieee80211_tx_queue_stats *stats);
int b43legacy_dma_tx(struct b43legacy_wldev *dev,
struct sk_buff *skb,
struct ieee80211_tx_control *ctl);
void b43legacy_dma_handle_txstatus(struct b43legacy_wldev *dev,
const struct b43legacy_txstatus *status);
void b43legacy_dma_rx(struct b43legacy_dmaring *ring);
#else /* CONFIG_B43LEGACY_DMA */
static inline
int b43legacy_dma_init(struct b43legacy_wldev *dev)
{
return 0;
}
static inline
void b43legacy_dma_free(struct b43legacy_wldev *dev)
{
}
static inline
int b43legacy_dmacontroller_rx_reset(struct b43legacy_wldev *dev,
u16 dmacontroller_mmio_base,
int dma64)
{
return 0;
}
static inline
int b43legacy_dmacontroller_tx_reset(struct b43legacy_wldev *dev,
u16 dmacontroller_mmio_base,
int dma64)
{
return 0;
}
static inline
void b43legacy_dma_get_tx_stats(struct b43legacy_wldev *dev,
struct ieee80211_tx_queue_stats *stats)
{
}
static inline
int b43legacy_dma_tx(struct b43legacy_wldev *dev,
struct sk_buff *skb,
struct ieee80211_tx_control *ctl)
{
return 0;
}
static inline
void b43legacy_dma_handle_txstatus(struct b43legacy_wldev *dev,
const struct b43legacy_txstatus *status)
{
}
static inline
void b43legacy_dma_rx(struct b43legacy_dmaring *ring)
{
}
static inline
void b43legacy_dma_tx_suspend(struct b43legacy_wldev *dev)
{
}
static inline
void b43legacy_dma_tx_resume(struct b43legacy_wldev *dev)
{
}
#endif /* CONFIG_B43LEGACY_DMA */
#endif /* B43legacy_DMA_H_ */
/*
Broadcom B43legacy wireless driver
Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
Stefano Brivio <st3@riseup.net>
Michael Buesch <mbuesch@freenet.de>
Danny van Dyk <kugelfang@gentoo.org>
Andreas Jaggi <andreas.jaggi@waterwave.ch>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#include "b43legacy.h"
#include "ilt.h"
#include "phy.h"
/**** Initial Internal Lookup Tables ****/
const u32 b43legacy_ilt_rotor[B43legacy_ILT_ROTOR_SIZE] = {
0xFEB93FFD, 0xFEC63FFD, /* 0 */
0xFED23FFD, 0xFEDF3FFD,
0xFEEC3FFE, 0xFEF83FFE,
0xFF053FFE, 0xFF113FFE,
0xFF1E3FFE, 0xFF2A3FFF, /* 8 */
0xFF373FFF, 0xFF443FFF,
0xFF503FFF, 0xFF5D3FFF,
0xFF693FFF, 0xFF763FFF,
0xFF824000, 0xFF8F4000, /* 16 */
0xFF9B4000, 0xFFA84000,
0xFFB54000, 0xFFC14000,
0xFFCE4000, 0xFFDA4000,
0xFFE74000, 0xFFF34000, /* 24 */
0x00004000, 0x000D4000,
0x00194000, 0x00264000,
0x00324000, 0x003F4000,
0x004B4000, 0x00584000, /* 32 */
0x00654000, 0x00714000,
0x007E4000, 0x008A3FFF,
0x00973FFF, 0x00A33FFF,
0x00B03FFF, 0x00BC3FFF, /* 40 */
0x00C93FFF, 0x00D63FFF,
0x00E23FFE, 0x00EF3FFE,
0x00FB3FFE, 0x01083FFE,
0x01143FFE, 0x01213FFD, /* 48 */
0x012E3FFD, 0x013A3FFD,
0x01473FFD,
};
const u32 b43legacy_ilt_retard[B43legacy_ILT_RETARD_SIZE] = {
0xDB93CB87, 0xD666CF64, /* 0 */
0xD1FDD358, 0xCDA6D826,
0xCA38DD9F, 0xC729E2B4,
0xC469E88E, 0xC26AEE2B,
0xC0DEF46C, 0xC073FA62, /* 8 */
0xC01D00D5, 0xC0760743,
0xC1560D1E, 0xC2E51369,
0xC4ED18FF, 0xC7AC1ED7,
0xCB2823B2, 0xCEFA28D9, /* 16 */
0xD2F62D3F, 0xD7BB3197,
0xDCE53568, 0xE1FE3875,
0xE7D13B35, 0xED663D35,
0xF39B3EC4, 0xF98E3FA7, /* 24 */
0x00004000, 0x06723FA7,
0x0C653EC4, 0x129A3D35,
0x182F3B35, 0x1E023875,
0x231B3568, 0x28453197, /* 32 */
0x2D0A2D3F, 0x310628D9,
0x34D823B2, 0x38541ED7,
0x3B1318FF, 0x3D1B1369,
0x3EAA0D1E, 0x3F8A0743, /* 40 */
0x3FE300D5, 0x3F8DFA62,
0x3F22F46C, 0x3D96EE2B,
0x3B97E88E, 0x38D7E2B4,
0x35C8DD9F, 0x325AD826, /* 48 */
0x2E03D358, 0x299ACF64,
0x246DCB87,
};
const u16 b43legacy_ilt_finefreqa[B43legacy_ILT_FINEFREQA_SIZE] = {
0x0082, 0x0082, 0x0102, 0x0182, /* 0 */
0x0202, 0x0282, 0x0302, 0x0382,
0x0402, 0x0482, 0x0502, 0x0582,
0x05E2, 0x0662, 0x06E2, 0x0762,
0x07E2, 0x0842, 0x08C2, 0x0942, /* 16 */
0x09C2, 0x0A22, 0x0AA2, 0x0B02,
0x0B82, 0x0BE2, 0x0C62, 0x0CC2,
0x0D42, 0x0DA2, 0x0E02, 0x0E62,
0x0EE2, 0x0F42, 0x0FA2, 0x1002, /* 32 */
0x1062, 0x10C2, 0x1122, 0x1182,
0x11E2, 0x1242, 0x12A2, 0x12E2,
0x1342, 0x13A2, 0x1402, 0x1442,
0x14A2, 0x14E2, 0x1542, 0x1582, /* 48 */
0x15E2, 0x1622, 0x1662, 0x16C1,
0x1701, 0x1741, 0x1781, 0x17E1,
0x1821, 0x1861, 0x18A1, 0x18E1,
0x1921, 0x1961, 0x19A1, 0x19E1, /* 64 */
0x1A21, 0x1A61, 0x1AA1, 0x1AC1,
0x1B01, 0x1B41, 0x1B81, 0x1BA1,
0x1BE1, 0x1C21, 0x1C41, 0x1C81,
0x1CA1, 0x1CE1, 0x1D01, 0x1D41, /* 80 */
0x1D61, 0x1DA1, 0x1DC1, 0x1E01,
0x1E21, 0x1E61, 0x1E81, 0x1EA1,
0x1EE1, 0x1F01, 0x1F21, 0x1F41,
0x1F81, 0x1FA1, 0x1FC1, 0x1FE1, /* 96 */
0x2001, 0x2041, 0x2061, 0x2081,
0x20A1, 0x20C1, 0x20E1, 0x2101,
0x2121, 0x2141, 0x2161, 0x2181,
0x21A1, 0x21C1, 0x21E1, 0x2201, /* 112 */
0x2221, 0x2241, 0x2261, 0x2281,
0x22A1, 0x22C1, 0x22C1, 0x22E1,
0x2301, 0x2321, 0x2341, 0x2361,
0x2361, 0x2381, 0x23A1, 0x23C1, /* 128 */
0x23E1, 0x23E1, 0x2401, 0x2421,
0x2441, 0x2441, 0x2461, 0x2481,
0x2481, 0x24A1, 0x24C1, 0x24C1,
0x24E1, 0x2501, 0x2501, 0x2521, /* 144 */
0x2541, 0x2541, 0x2561, 0x2561,
0x2581, 0x25A1, 0x25A1, 0x25C1,
0x25C1, 0x25E1, 0x2601, 0x2601,
0x2621, 0x2621, 0x2641, 0x2641, /* 160 */
0x2661, 0x2661, 0x2681, 0x2681,
0x26A1, 0x26A1, 0x26C1, 0x26C1,
0x26E1, 0x26E1, 0x2701, 0x2701,
0x2721, 0x2721, 0x2740, 0x2740, /* 176 */
0x2760, 0x2760, 0x2780, 0x2780,
0x2780, 0x27A0, 0x27A0, 0x27C0,
0x27C0, 0x27E0, 0x27E0, 0x27E0,
0x2800, 0x2800, 0x2820, 0x2820, /* 192 */
0x2820, 0x2840, 0x2840, 0x2840,
0x2860, 0x2860, 0x2880, 0x2880,
0x2880, 0x28A0, 0x28A0, 0x28A0,
0x28C0, 0x28C0, 0x28C0, 0x28E0, /* 208 */
0x28E0, 0x28E0, 0x2900, 0x2900,
0x2900, 0x2920, 0x2920, 0x2920,
0x2940, 0x2940, 0x2940, 0x2960,
0x2960, 0x2960, 0x2960, 0x2980, /* 224 */
0x2980, 0x2980, 0x29A0, 0x29A0,
0x29A0, 0x29A0, 0x29C0, 0x29C0,
0x29C0, 0x29E0, 0x29E0, 0x29E0,
0x29E0, 0x2A00, 0x2A00, 0x2A00, /* 240 */
0x2A00, 0x2A20, 0x2A20, 0x2A20,
0x2A20, 0x2A40, 0x2A40, 0x2A40,
0x2A40, 0x2A60, 0x2A60, 0x2A60,
};
const u16 b43legacy_ilt_finefreqg[B43legacy_ILT_FINEFREQG_SIZE] = {
0x0089, 0x02E9, 0x0409, 0x04E9, /* 0 */
0x05A9, 0x0669, 0x0709, 0x0789,
0x0829, 0x08A9, 0x0929, 0x0989,
0x0A09, 0x0A69, 0x0AC9, 0x0B29,
0x0BA9, 0x0BE9, 0x0C49, 0x0CA9, /* 16 */
0x0D09, 0x0D69, 0x0DA9, 0x0E09,
0x0E69, 0x0EA9, 0x0F09, 0x0F49,
0x0FA9, 0x0FE9, 0x1029, 0x1089,
0x10C9, 0x1109, 0x1169, 0x11A9, /* 32 */
0x11E9, 0x1229, 0x1289, 0x12C9,
0x1309, 0x1349, 0x1389, 0x13C9,
0x1409, 0x1449, 0x14A9, 0x14E9,
0x1529, 0x1569, 0x15A9, 0x15E9, /* 48 */
0x1629, 0x1669, 0x16A9, 0x16E8,
0x1728, 0x1768, 0x17A8, 0x17E8,
0x1828, 0x1868, 0x18A8, 0x18E8,
0x1928, 0x1968, 0x19A8, 0x19E8, /* 64 */
0x1A28, 0x1A68, 0x1AA8, 0x1AE8,
0x1B28, 0x1B68, 0x1BA8, 0x1BE8,
0x1C28, 0x1C68, 0x1CA8, 0x1CE8,
0x1D28, 0x1D68, 0x1DC8, 0x1E08, /* 80 */
0x1E48, 0x1E88, 0x1EC8, 0x1F08,
0x1F48, 0x1F88, 0x1FE8, 0x2028,
0x2068, 0x20A8, 0x2108, 0x2148,
0x2188, 0x21C8, 0x2228, 0x2268, /* 96 */
0x22C8, 0x2308, 0x2348, 0x23A8,
0x23E8, 0x2448, 0x24A8, 0x24E8,
0x2548, 0x25A8, 0x2608, 0x2668,
0x26C8, 0x2728, 0x2787, 0x27E7, /* 112 */
0x2847, 0x28C7, 0x2947, 0x29A7,
0x2A27, 0x2AC7, 0x2B47, 0x2BE7,
0x2CA7, 0x2D67, 0x2E47, 0x2F67,
0x3247, 0x3526, 0x3646, 0x3726, /* 128 */
0x3806, 0x38A6, 0x3946, 0x39E6,
0x3A66, 0x3AE6, 0x3B66, 0x3BC6,
0x3C45, 0x3CA5, 0x3D05, 0x3D85,
0x3DE5, 0x3E45, 0x3EA5, 0x3EE5, /* 144 */
0x3F45, 0x3FA5, 0x4005, 0x4045,
0x40A5, 0x40E5, 0x4145, 0x4185,
0x41E5, 0x4225, 0x4265, 0x42C5,
0x4305, 0x4345, 0x43A5, 0x43E5, /* 160 */
0x4424, 0x4464, 0x44C4, 0x4504,
0x4544, 0x4584, 0x45C4, 0x4604,
0x4644, 0x46A4, 0x46E4, 0x4724,
0x4764, 0x47A4, 0x47E4, 0x4824, /* 176 */
0x4864, 0x48A4, 0x48E4, 0x4924,
0x4964, 0x49A4, 0x49E4, 0x4A24,
0x4A64, 0x4AA4, 0x4AE4, 0x4B23,
0x4B63, 0x4BA3, 0x4BE3, 0x4C23, /* 192 */
0x4C63, 0x4CA3, 0x4CE3, 0x4D23,
0x4D63, 0x4DA3, 0x4DE3, 0x4E23,
0x4E63, 0x4EA3, 0x4EE3, 0x4F23,
0x4F63, 0x4FC3, 0x5003, 0x5043, /* 208 */
0x5083, 0x50C3, 0x5103, 0x5143,
0x5183, 0x51E2, 0x5222, 0x5262,
0x52A2, 0x52E2, 0x5342, 0x5382,
0x53C2, 0x5402, 0x5462, 0x54A2, /* 224 */
0x5502, 0x5542, 0x55A2, 0x55E2,
0x5642, 0x5682, 0x56E2, 0x5722,
0x5782, 0x57E1, 0x5841, 0x58A1,
0x5901, 0x5961, 0x59C1, 0x5A21, /* 240 */
0x5AA1, 0x5B01, 0x5B81, 0x5BE1,
0x5C61, 0x5D01, 0x5D80, 0x5E20,
0x5EE0, 0x5FA0, 0x6080, 0x61C0,
};
const u16 b43legacy_ilt_noisea2[B43legacy_ILT_NOISEA2_SIZE] = {
0x0001, 0x0001, 0x0001, 0xFFFE,
0xFFFE, 0x3FFF, 0x1000, 0x0393,
};
const u16 b43legacy_ilt_noisea3[B43legacy_ILT_NOISEA3_SIZE] = {
0x4C4C, 0x4C4C, 0x4C4C, 0x2D36,
0x4C4C, 0x4C4C, 0x4C4C, 0x2D36,
};
const u16 b43legacy_ilt_noiseg1[B43legacy_ILT_NOISEG1_SIZE] = {
0x013C, 0x01F5, 0x031A, 0x0631,
0x0001, 0x0001, 0x0001, 0x0001,
};
const u16 b43legacy_ilt_noiseg2[B43legacy_ILT_NOISEG2_SIZE] = {
0x5484, 0x3C40, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000,
};
const u16 b43legacy_ilt_noisescaleg1[B43legacy_ILT_NOISESCALEG_SIZE] = {
0x6C77, 0x5162, 0x3B40, 0x3335, /* 0 */
0x2F2D, 0x2A2A, 0x2527, 0x1F21,
0x1A1D, 0x1719, 0x1616, 0x1414,
0x1414, 0x1400, 0x1414, 0x1614,
0x1716, 0x1A19, 0x1F1D, 0x2521, /* 16 */
0x2A27, 0x2F2A, 0x332D, 0x3B35,
0x5140, 0x6C62, 0x0077,
};
const u16 b43legacy_ilt_noisescaleg2[B43legacy_ILT_NOISESCALEG_SIZE] = {
0xD8DD, 0xCBD4, 0xBCC0, 0XB6B7, /* 0 */
0xB2B0, 0xADAD, 0xA7A9, 0x9FA1,
0x969B, 0x9195, 0x8F8F, 0x8A8A,
0x8A8A, 0x8A00, 0x8A8A, 0x8F8A,
0x918F, 0x9695, 0x9F9B, 0xA7A1, /* 16 */
0xADA9, 0xB2AD, 0xB6B0, 0xBCB7,
0xCBC0, 0xD8D4, 0x00DD,
};
const u16 b43legacy_ilt_noisescaleg3[B43legacy_ILT_NOISESCALEG_SIZE] = {
0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4, /* 0 */
0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4,
0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4,
0xA4A4, 0xA400, 0xA4A4, 0xA4A4,
0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4, /* 16 */
0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4,
0xA4A4, 0xA4A4, 0x00A4,
};
const u16 b43legacy_ilt_sigmasqr1[B43legacy_ILT_SIGMASQR_SIZE] = {
0x007A, 0x0075, 0x0071, 0x006C, /* 0 */
0x0067, 0x0063, 0x005E, 0x0059,
0x0054, 0x0050, 0x004B, 0x0046,
0x0042, 0x003D, 0x003D, 0x003D,
0x003D, 0x003D, 0x003D, 0x003D, /* 16 */
0x003D, 0x003D, 0x003D, 0x003D,
0x003D, 0x003D, 0x0000, 0x003D,
0x003D, 0x003D, 0x003D, 0x003D,
0x003D, 0x003D, 0x003D, 0x003D, /* 32 */
0x003D, 0x003D, 0x003D, 0x003D,
0x0042, 0x0046, 0x004B, 0x0050,
0x0054, 0x0059, 0x005E, 0x0063,
0x0067, 0x006C, 0x0071, 0x0075, /* 48 */
0x007A,
};
const u16 b43legacy_ilt_sigmasqr2[B43legacy_ILT_SIGMASQR_SIZE] = {
0x00DE, 0x00DC, 0x00DA, 0x00D8, /* 0 */
0x00D6, 0x00D4, 0x00D2, 0x00CF,
0x00CD, 0x00CA, 0x00C7, 0x00C4,
0x00C1, 0x00BE, 0x00BE, 0x00BE,
0x00BE, 0x00BE, 0x00BE, 0x00BE, /* 16 */
0x00BE, 0x00BE, 0x00BE, 0x00BE,
0x00BE, 0x00BE, 0x0000, 0x00BE,
0x00BE, 0x00BE, 0x00BE, 0x00BE,
0x00BE, 0x00BE, 0x00BE, 0x00BE, /* 32 */
0x00BE, 0x00BE, 0x00BE, 0x00BE,
0x00C1, 0x00C4, 0x00C7, 0x00CA,
0x00CD, 0x00CF, 0x00D2, 0x00D4,
0x00D6, 0x00D8, 0x00DA, 0x00DC, /* 48 */
0x00DE,
};
/**** Helper functions to access the device Internal Lookup Tables ****/
void b43legacy_ilt_write(struct b43legacy_wldev *dev, u16 offset, u16 val)
{
b43legacy_phy_write(dev, B43legacy_PHY_ILT_G_CTRL, offset);
mmiowb();
b43legacy_phy_write(dev, B43legacy_PHY_ILT_G_DATA1, val);
}
void b43legacy_ilt_write32(struct b43legacy_wldev *dev, u16 offset, u32 val)
{
b43legacy_phy_write(dev, B43legacy_PHY_ILT_G_CTRL, offset);
mmiowb();
b43legacy_phy_write(dev, B43legacy_PHY_ILT_G_DATA2,
(val & 0xFFFF0000) >> 16);
b43legacy_phy_write(dev, B43legacy_PHY_ILT_G_DATA1,
val & 0x0000FFFF);
}
u16 b43legacy_ilt_read(struct b43legacy_wldev *dev, u16 offset)
{
b43legacy_phy_write(dev, B43legacy_PHY_ILT_G_CTRL, offset);
return b43legacy_phy_read(dev, B43legacy_PHY_ILT_G_DATA1);
}
#ifndef B43legacy_ILT_H_
#define B43legacy_ILT_H_
#define B43legacy_ILT_ROTOR_SIZE 53
extern const u32 b43legacy_ilt_rotor[B43legacy_ILT_ROTOR_SIZE];
#define B43legacy_ILT_RETARD_SIZE 53
extern const u32 b43legacy_ilt_retard[B43legacy_ILT_RETARD_SIZE];
#define B43legacy_ILT_FINEFREQA_SIZE 256
extern const u16 b43legacy_ilt_finefreqa[B43legacy_ILT_FINEFREQA_SIZE];
#define B43legacy_ILT_FINEFREQG_SIZE 256
extern const u16 b43legacy_ilt_finefreqg[B43legacy_ILT_FINEFREQG_SIZE];
#define B43legacy_ILT_NOISEA2_SIZE 8
extern const u16 b43legacy_ilt_noisea2[B43legacy_ILT_NOISEA2_SIZE];
#define B43legacy_ILT_NOISEA3_SIZE 8
extern const u16 b43legacy_ilt_noisea3[B43legacy_ILT_NOISEA3_SIZE];
#define B43legacy_ILT_NOISEG1_SIZE 8
extern const u16 b43legacy_ilt_noiseg1[B43legacy_ILT_NOISEG1_SIZE];
#define B43legacy_ILT_NOISEG2_SIZE 8
extern const u16 b43legacy_ilt_noiseg2[B43legacy_ILT_NOISEG2_SIZE];
#define B43legacy_ILT_NOISESCALEG_SIZE 27
extern const u16 b43legacy_ilt_noisescaleg1[B43legacy_ILT_NOISESCALEG_SIZE];
extern const u16 b43legacy_ilt_noisescaleg2[B43legacy_ILT_NOISESCALEG_SIZE];
extern const u16 b43legacy_ilt_noisescaleg3[B43legacy_ILT_NOISESCALEG_SIZE];
#define B43legacy_ILT_SIGMASQR_SIZE 53
extern const u16 b43legacy_ilt_sigmasqr1[B43legacy_ILT_SIGMASQR_SIZE];
extern const u16 b43legacy_ilt_sigmasqr2[B43legacy_ILT_SIGMASQR_SIZE];
void b43legacy_ilt_write(struct b43legacy_wldev *dev, u16 offset, u16 val);
void b43legacy_ilt_write32(struct b43legacy_wldev *dev, u16 offset,
u32 val);
u16 b43legacy_ilt_read(struct b43legacy_wldev *dev, u16 offset);
#endif /* B43legacy_ILT_H_ */
/*
Broadcom B43legacy wireless driver
Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
Stefano Brivio <st3@riseup.net>
Michael Buesch <mb@bu3sch.de>
Danny van Dyk <kugelfang@gentoo.org>
Andreas Jaggi <andreas.jaggi@waterwave.ch>
Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#include "leds.h"
#include "b43legacy.h"
#include "main.h"
static void b43legacy_led_changestate(struct b43legacy_led *led)
{
struct b43legacy_wldev *dev = led->dev;
const int index = led->index;
u16 ledctl;
B43legacy_WARN_ON(!(index >= 0 && index < B43legacy_NR_LEDS));
B43legacy_WARN_ON(!led->blink_interval);
ledctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
ledctl ^= (1 << index);
b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ledctl);
}
static void b43legacy_led_blink(unsigned long d)
{
struct b43legacy_led *led = (struct b43legacy_led *)d;
struct b43legacy_wldev *dev = led->dev;
unsigned long flags;
spin_lock_irqsave(&dev->wl->leds_lock, flags);
if (led->blink_interval) {
b43legacy_led_changestate(led);
mod_timer(&led->blink_timer, jiffies + led->blink_interval);
}
spin_unlock_irqrestore(&dev->wl->leds_lock, flags);
}
static void b43legacy_led_blink_start(struct b43legacy_led *led,
unsigned long interval)
{
if (led->blink_interval)
return;
led->blink_interval = interval;
b43legacy_led_changestate(led);
led->blink_timer.expires = jiffies + interval;
add_timer(&led->blink_timer);
}
static void b43legacy_led_blink_stop(struct b43legacy_led *led, int sync)
{
struct b43legacy_wldev *dev = led->dev;
const int index = led->index;
u16 ledctl;
if (!led->blink_interval)
return;
if (unlikely(sync))
del_timer_sync(&led->blink_timer);
else
del_timer(&led->blink_timer);
led->blink_interval = 0;
/* Make sure the LED is turned off. */
B43legacy_WARN_ON(!(index >= 0 && index < B43legacy_NR_LEDS));
ledctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
if (led->activelow)
ledctl |= (1 << index);
else
ledctl &= ~(1 << index);
b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ledctl);
}
static void b43legacy_led_init_hardcoded(struct b43legacy_wldev *dev,
struct b43legacy_led *led,
int led_index)
{
struct ssb_bus *bus = dev->dev->bus;
/* This function is called, if the behaviour (and activelow)
* information for a LED is missing in the SPROM.
* We hardcode the behaviour values for various devices here.
* Note that the B43legacy_LED_TEST_XXX behaviour values can
* be used to figure out which led is mapped to which index.
*/
switch (led_index) {
case 0:
led->behaviour = B43legacy_LED_ACTIVITY;
led->activelow = 1;
if (bus->boardinfo.vendor == PCI_VENDOR_ID_COMPAQ)
led->behaviour = B43legacy_LED_RADIO_ALL;
break;
case 1:
led->behaviour = B43legacy_LED_RADIO_B;
if (bus->boardinfo.vendor == PCI_VENDOR_ID_ASUSTEK)
led->behaviour = B43legacy_LED_ASSOC;
break;
case 2:
led->behaviour = B43legacy_LED_RADIO_A;
break;
case 3:
led->behaviour = B43legacy_LED_OFF;
break;
default:
B43legacy_BUG_ON(1);
}
}
int b43legacy_leds_init(struct b43legacy_wldev *dev)
{
struct b43legacy_led *led;
u8 sprom[4];
int i;
sprom[0] = dev->dev->bus->sprom.r1.gpio0;
sprom[1] = dev->dev->bus->sprom.r1.gpio1;
sprom[2] = dev->dev->bus->sprom.r1.gpio2;
sprom[3] = dev->dev->bus->sprom.r1.gpio3;
for (i = 0; i < B43legacy_NR_LEDS; i++) {
led = &(dev->leds[i]);
led->index = i;
led->dev = dev;
setup_timer(&led->blink_timer,
b43legacy_led_blink,
(unsigned long)led);
if (sprom[i] == 0xFF)
b43legacy_led_init_hardcoded(dev, led, i);
else {
led->behaviour = sprom[i] & B43legacy_LED_BEHAVIOUR;
led->activelow = !!(sprom[i] &
B43legacy_LED_ACTIVELOW);
}
}
return 0;
}
void b43legacy_leds_exit(struct b43legacy_wldev *dev)
{
struct b43legacy_led *led;
int i;
for (i = 0; i < B43legacy_NR_LEDS; i++) {
led = &(dev->leds[i]);
b43legacy_led_blink_stop(led, 1);
}
b43legacy_leds_switch_all(dev, 0);
}
void b43legacy_leds_update(struct b43legacy_wldev *dev, int activity)
{
struct b43legacy_led *led;
struct b43legacy_phy *phy = &dev->phy;
const int transferring = (jiffies - dev->stats.last_tx)
< B43legacy_LED_XFER_THRES;
int i;
int turn_on;
unsigned long interval = 0;
u16 ledctl;
unsigned long flags;
spin_lock_irqsave(&dev->wl->leds_lock, flags);
ledctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
for (i = 0; i < B43legacy_NR_LEDS; i++) {
led = &(dev->leds[i]);
turn_on = 0;
switch (led->behaviour) {
case B43legacy_LED_INACTIVE:
continue;
case B43legacy_LED_OFF:
break;
case B43legacy_LED_ON:
turn_on = 1;
break;
case B43legacy_LED_ACTIVITY:
turn_on = activity;
break;
case B43legacy_LED_RADIO_ALL:
turn_on = phy->radio_on &&
b43legacy_is_hw_radio_enabled(dev);
break;
case B43legacy_LED_RADIO_A:
break;
case B43legacy_LED_RADIO_B:
turn_on = (phy->radio_on &&
b43legacy_is_hw_radio_enabled(dev) &&
(phy->type == B43legacy_PHYTYPE_B ||
phy->type == B43legacy_PHYTYPE_G));
break;
case B43legacy_LED_MODE_BG:
if (phy->type == B43legacy_PHYTYPE_G &&
b43legacy_is_hw_radio_enabled(dev))
turn_on = 1;
break;
case B43legacy_LED_TRANSFER:
if (transferring)
b43legacy_led_blink_start(led,
B43legacy_LEDBLINK_MEDIUM);
else
b43legacy_led_blink_stop(led, 0);
continue;
case B43legacy_LED_APTRANSFER:
if (b43legacy_is_mode(dev->wl,
IEEE80211_IF_TYPE_AP)) {
if (transferring) {
interval = B43legacy_LEDBLINK_FAST;
turn_on = 1;
}
} else {
turn_on = 1;
if (transferring)
interval = B43legacy_LEDBLINK_FAST;
else
turn_on = 0;
}
if (turn_on)
b43legacy_led_blink_start(led, interval);
else
b43legacy_led_blink_stop(led, 0);
continue;
case B43legacy_LED_WEIRD:
break;
case B43legacy_LED_ASSOC:
turn_on = 1;
#ifdef CONFIG_B43LEGACY_DEBUG
case B43legacy_LED_TEST_BLINKSLOW:
b43legacy_led_blink_start(led, B43legacy_LEDBLINK_SLOW);
continue;
case B43legacy_LED_TEST_BLINKMEDIUM:
b43legacy_led_blink_start(led,
B43legacy_LEDBLINK_MEDIUM);
continue;
case B43legacy_LED_TEST_BLINKFAST:
b43legacy_led_blink_start(led, B43legacy_LEDBLINK_FAST);
continue;
#endif /* CONFIG_B43LEGACY_DEBUG */
default:
B43legacy_BUG_ON(1);
};
if (led->activelow)
turn_on = !turn_on;
if (turn_on)
ledctl |= (1 << i);
else
ledctl &= ~(1 << i);
}
b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ledctl);
spin_unlock_irqrestore(&dev->wl->leds_lock, flags);
}
void b43legacy_leds_switch_all(struct b43legacy_wldev *dev, int on)
{
struct b43legacy_led *led;
u16 ledctl;
int i;
int bit_on;
unsigned long flags;
spin_lock_irqsave(&dev->wl->leds_lock, flags);
ledctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
for (i = 0; i < B43legacy_NR_LEDS; i++) {
led = &(dev->leds[i]);
if (led->behaviour == B43legacy_LED_INACTIVE)
continue;
if (on)
bit_on = led->activelow ? 0 : 1;
else
bit_on = led->activelow ? 1 : 0;
if (bit_on)
ledctl |= (1 << i);
else
ledctl &= ~(1 << i);
}
b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ledctl);
spin_unlock_irqrestore(&dev->wl->leds_lock, flags);
}
#ifndef B43legacy_LEDS_H_
#define B43legacy_LEDS_H_
#include <linux/types.h>
#include <linux/timer.h>
struct b43legacy_led {
u8 behaviour;
bool activelow;
/* Index in the "leds" array in b43legacy_wldev */
u8 index;
struct b43legacy_wldev *dev;
struct timer_list blink_timer;
unsigned long blink_interval;
};
/* Delay between state changes when blinking in jiffies */
#define B43legacy_LEDBLINK_SLOW (HZ / 1)
#define B43legacy_LEDBLINK_MEDIUM (HZ / 4)
#define B43legacy_LEDBLINK_FAST (HZ / 8)
#define B43legacy_LED_XFER_THRES (HZ / 100)
#define B43legacy_LED_BEHAVIOUR 0x7F
#define B43legacy_LED_ACTIVELOW 0x80
enum { /* LED behaviour values */
B43legacy_LED_OFF,
B43legacy_LED_ON,
B43legacy_LED_ACTIVITY,
B43legacy_LED_RADIO_ALL,
B43legacy_LED_RADIO_A,
B43legacy_LED_RADIO_B,
B43legacy_LED_MODE_BG,
B43legacy_LED_TRANSFER,
B43legacy_LED_APTRANSFER,
B43legacy_LED_WEIRD,
B43legacy_LED_ASSOC,
B43legacy_LED_INACTIVE,
/* Behaviour values for testing.
* With these values it is easier to figure out
* the real behaviour of leds, in case the SPROM
* is missing information.
*/
B43legacy_LED_TEST_BLINKSLOW,
B43legacy_LED_TEST_BLINKMEDIUM,
B43legacy_LED_TEST_BLINKFAST,
};
int b43legacy_leds_init(struct b43legacy_wldev *dev);
void b43legacy_leds_exit(struct b43legacy_wldev *dev);
void b43legacy_leds_update(struct b43legacy_wldev *dev, int activity);
void b43legacy_leds_switch_all(struct b43legacy_wldev *dev, int on);
#endif /* B43legacy_LEDS_H_ */
此差异已折叠。
/*
Broadcom B43legacy wireless driver
Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
Some parts of the code in this file are derived from the ipw2200
driver Copyright(c) 2003 - 2004 Intel Corporation.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#ifndef B43legacy_MAIN_H_
#define B43legacy_MAIN_H_
#include "b43legacy.h"
#define P4D_BYT3S(magic, nr_bytes) u8 __p4dding##magic[nr_bytes]
#define P4D_BYTES(line, nr_bytes) P4D_BYT3S(line, nr_bytes)
/* Magic helper macro to pad structures. Ignore those above. It's magic. */
#define PAD_BYTES(nr_bytes) P4D_BYTES(__LINE__ , (nr_bytes))
/* Lightweight function to convert a frequency (in Mhz) to a channel number. */
static inline
u8 b43legacy_freq_to_channel_bg(int freq)
{
u8 channel;
if (freq == 2484)
channel = 14;
else
channel = (freq - 2407) / 5;
return channel;
}
static inline
u8 b43legacy_freq_to_channel(struct b43legacy_wldev *dev,
int freq)
{
return b43legacy_freq_to_channel_bg(freq);
}
/* Lightweight function to convert a channel number to a frequency (in Mhz). */
static inline
int b43legacy_channel_to_freq_bg(u8 channel)
{
int freq;
if (channel == 14)
freq = 2484;
else
freq = 2407 + (5 * channel);
return freq;
}
static inline
int b43legacy_channel_to_freq(struct b43legacy_wldev *dev,
u8 channel)
{
return b43legacy_channel_to_freq_bg(channel);
}
static inline
int b43legacy_is_cck_rate(int rate)
{
return (rate == B43legacy_CCK_RATE_1MB ||
rate == B43legacy_CCK_RATE_2MB ||
rate == B43legacy_CCK_RATE_5MB ||
rate == B43legacy_CCK_RATE_11MB);
}
static inline
int b43legacy_is_ofdm_rate(int rate)
{
return !b43legacy_is_cck_rate(rate);
}
static inline
int b43legacy_is_hw_radio_enabled(struct b43legacy_wldev *dev)
{
/* function to return state of hardware enable of radio
* returns 0 if radio disabled, 1 if radio enabled
*/
struct b43legacy_phy *phy = &dev->phy;
if (phy->rev >= 3)
return ((b43legacy_read32(dev,
B43legacy_MMIO_RADIO_HWENABLED_HI)
& B43legacy_MMIO_RADIO_HWENABLED_HI_MASK)
== 0) ? 1 : 0;
else
return ((b43legacy_read16(dev,
B43legacy_MMIO_RADIO_HWENABLED_LO)
& B43legacy_MMIO_RADIO_HWENABLED_LO_MASK)
== 0) ? 0 : 1;
}
void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf);
void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf);
u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
u16 routing, u16 offset);
u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
u16 routing, u16 offset);
void b43legacy_shm_write32(struct b43legacy_wldev *dev,
u16 routing, u16 offset,
u32 value);
void b43legacy_shm_write16(struct b43legacy_wldev *dev,
u16 routing, u16 offset,
u16 value);
u32 b43legacy_hf_read(struct b43legacy_wldev *dev);
void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value);
void b43legacy_dummy_transmission(struct b43legacy_wldev *dev);
void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags);
void b43legacy_mac_suspend(struct b43legacy_wldev *dev);
void b43legacy_mac_enable(struct b43legacy_wldev *dev);
void b43legacy_controller_restart(struct b43legacy_wldev *dev,
const char *reason);
#endif /* B43legacy_MAIN_H_ */
此差异已折叠。
/*
Broadcom B43legacy wireless driver
Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
Stefano Brivio <st3@riseup.net>
Michael Buesch <mbuesch@freenet.de>
Danny van Dyk <kugelfang@gentoo.org>
Andreas Jaggi <andreas.jaggi@waterwave.ch>
Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
Some parts of the code in this file are derived from the ipw2200
driver Copyright(c) 2003 - 2004 Intel Corporation.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#ifndef B43legacy_PHY_H_
#define B43legacy_PHY_H_
#include <linux/types.h>
enum {
B43legacy_ANTENNA0, /* Antenna 0 */
B43legacy_ANTENNA1, /* Antenna 0 */
B43legacy_ANTENNA_AUTO1, /* Automatic, starting with antenna 1 */
B43legacy_ANTENNA_AUTO0, /* Automatic, starting with antenna 0 */
B43legacy_ANTENNA_AUTO = B43legacy_ANTENNA_AUTO0,
B43legacy_ANTENNA_DEFAULT = B43legacy_ANTENNA_AUTO,
};
enum {
B43legacy_INTERFMODE_NONE,
B43legacy_INTERFMODE_NONWLAN,
B43legacy_INTERFMODE_MANUALWLAN,
B43legacy_INTERFMODE_AUTOWLAN,
};
/*** PHY Registers ***/
/* Routing */
#define B43legacy_PHYROUTE_OFDM_GPHY 0x400
#define B43legacy_PHYROUTE_EXT_GPHY 0x800
/* Base registers. */
#define B43legacy_PHY_BASE(reg) (reg)
/* OFDM (A) registers of a G-PHY */
#define B43legacy_PHY_OFDM(reg) ((reg) | B43legacy_PHYROUTE_OFDM_GPHY)
/* Extended G-PHY registers */
#define B43legacy_PHY_EXTG(reg) ((reg) | B43legacy_PHYROUTE_EXT_GPHY)
/* Extended G-PHY Registers */
#define B43legacy_PHY_CLASSCTL B43legacy_PHY_EXTG(0x02) /* Classify control */
#define B43legacy_PHY_GTABCTL B43legacy_PHY_EXTG(0x03) /* G-PHY table control (see below) */
#define B43legacy_PHY_GTABOFF 0x03FF /* G-PHY table offset (see below) */
#define B43legacy_PHY_GTABNR 0xFC00 /* G-PHY table number (see below) */
#define B43legacy_PHY_GTABNR_SHIFT 10
#define B43legacy_PHY_GTABDATA B43legacy_PHY_EXTG(0x04) /* G-PHY table data */
#define B43legacy_PHY_LO_MASK B43legacy_PHY_EXTG(0x0F) /* Local Oscillator control mask */
#define B43legacy_PHY_LO_CTL B43legacy_PHY_EXTG(0x10) /* Local Oscillator control */
#define B43legacy_PHY_RFOVER B43legacy_PHY_EXTG(0x11) /* RF override */
#define B43legacy_PHY_RFOVERVAL B43legacy_PHY_EXTG(0x12) /* RF override value */
/*** OFDM table numbers ***/
#define B43legacy_OFDMTAB(number, offset) \
(((number) << B43legacy_PHY_OTABLENR_SHIFT) \
| (offset))
#define B43legacy_OFDMTAB_AGC1 B43legacy_OFDMTAB(0x00, 0)
#define B43legacy_OFDMTAB_GAIN0 B43legacy_OFDMTAB(0x00, 0)
#define B43legacy_OFDMTAB_GAINX B43legacy_OFDMTAB(0x01, 0)
#define B43legacy_OFDMTAB_GAIN1 B43legacy_OFDMTAB(0x01, 4)
#define B43legacy_OFDMTAB_AGC3 B43legacy_OFDMTAB(0x02, 0)
#define B43legacy_OFDMTAB_GAIN2 B43legacy_OFDMTAB(0x02, 3)
#define B43legacy_OFDMTAB_LNAHPFGAIN1 B43legacy_OFDMTAB(0x03, 0)
#define B43legacy_OFDMTAB_WRSSI B43legacy_OFDMTAB(0x04, 0)
#define B43legacy_OFDMTAB_LNAHPFGAIN2 B43legacy_OFDMTAB(0x04, 0)
#define B43legacy_OFDMTAB_NOISESCALE B43legacy_OFDMTAB(0x05, 0)
#define B43legacy_OFDMTAB_AGC2 B43legacy_OFDMTAB(0x06, 0)
#define B43legacy_OFDMTAB_ROTOR B43legacy_OFDMTAB(0x08, 0)
#define B43legacy_OFDMTAB_ADVRETARD B43legacy_OFDMTAB(0x09, 0)
#define B43legacy_OFDMTAB_DAC B43legacy_OFDMTAB(0x0C, 0)
#define B43legacy_OFDMTAB_DC B43legacy_OFDMTAB(0x0E, 7)
#define B43legacy_OFDMTAB_PWRDYN2 B43legacy_OFDMTAB(0x0E, 12)
#define B43legacy_OFDMTAB_LNAGAIN B43legacy_OFDMTAB(0x0E, 13)
#define B43legacy_OFDMTAB_LPFGAIN B43legacy_OFDMTAB(0x0F, 12)
#define B43legacy_OFDMTAB_RSSI B43legacy_OFDMTAB(0x10, 0)
#define B43legacy_OFDMTAB_AGC1_R1 B43legacy_OFDMTAB(0x13, 0)
#define B43legacy_OFDMTAB_GAINX_R1 B43legacy_OFDMTAB(0x14, 0)
#define B43legacy_OFDMTAB_MINSIGSQ B43legacy_OFDMTAB(0x14, 1)
#define B43legacy_OFDMTAB_AGC3_R1 B43legacy_OFDMTAB(0x15, 0)
#define B43legacy_OFDMTAB_WRSSI_R1 B43legacy_OFDMTAB(0x15, 4)
#define B43legacy_OFDMTAB_TSSI B43legacy_OFDMTAB(0x15, 0)
#define B43legacy_OFDMTAB_DACRFPABB B43legacy_OFDMTAB(0x16, 0)
#define B43legacy_OFDMTAB_DACOFF B43legacy_OFDMTAB(0x17, 0)
#define B43legacy_OFDMTAB_DCBIAS B43legacy_OFDMTAB(0x18, 0)
void b43legacy_put_attenuation_into_ranges(int *_bbatt, int *_rfatt);
/* OFDM (A) PHY Registers */
#define B43legacy_PHY_VERSION_OFDM B43legacy_PHY_OFDM(0x00) /* Versioning register for A-PHY */
#define B43legacy_PHY_BBANDCFG B43legacy_PHY_OFDM(0x01) /* Baseband config */
#define B43legacy_PHY_BBANDCFG_RXANT 0x180 /* RX Antenna selection */
#define B43legacy_PHY_BBANDCFG_RXANT_SHIFT 7
#define B43legacy_PHY_PWRDOWN B43legacy_PHY_OFDM(0x03) /* Powerdown */
#define B43legacy_PHY_CRSTHRES1 B43legacy_PHY_OFDM(0x06) /* CRS Threshold 1 */
#define B43legacy_PHY_LNAHPFCTL B43legacy_PHY_OFDM(0x1C) /* LNA/HPF control */
#define B43legacy_PHY_ADIVRELATED B43legacy_PHY_OFDM(0x27) /* FIXME rename */
#define B43legacy_PHY_CRS0 B43legacy_PHY_OFDM(0x29)
#define B43legacy_PHY_ANTDWELL B43legacy_PHY_OFDM(0x2B) /* Antenna dwell */
#define B43legacy_PHY_ANTDWELL_AUTODIV1 0x0100 /* Automatic RX diversity start antenna */
#define B43legacy_PHY_ENCORE B43legacy_PHY_OFDM(0x49) /* "Encore" (RangeMax / BroadRange) */
#define B43legacy_PHY_ENCORE_EN 0x0200 /* Encore enable */
#define B43legacy_PHY_LMS B43legacy_PHY_OFDM(0x55)
#define B43legacy_PHY_OFDM61 B43legacy_PHY_OFDM(0x61) /* FIXME rename */
#define B43legacy_PHY_OFDM61_10 0x0010 /* FIXME rename */
#define B43legacy_PHY_IQBAL B43legacy_PHY_OFDM(0x69) /* I/Q balance */
#define B43legacy_PHY_OTABLECTL B43legacy_PHY_OFDM(0x72) /* OFDM table control (see below) */
#define B43legacy_PHY_OTABLEOFF 0x03FF /* OFDM table offset (see below) */
#define B43legacy_PHY_OTABLENR 0xFC00 /* OFDM table number (see below) */
#define B43legacy_PHY_OTABLENR_SHIFT 10
#define B43legacy_PHY_OTABLEI B43legacy_PHY_OFDM(0x73) /* OFDM table data I */
#define B43legacy_PHY_OTABLEQ B43legacy_PHY_OFDM(0x74) /* OFDM table data Q */
#define B43legacy_PHY_HPWR_TSSICTL B43legacy_PHY_OFDM(0x78) /* Hardware power TSSI control */
#define B43legacy_PHY_NRSSITHRES B43legacy_PHY_OFDM(0x8A) /* NRSSI threshold */
#define B43legacy_PHY_ANTWRSETT B43legacy_PHY_OFDM(0x8C) /* Antenna WR settle */
#define B43legacy_PHY_ANTWRSETT_ARXDIV 0x2000 /* Automatic RX diversity enabled */
#define B43legacy_PHY_CLIPPWRDOWNT B43legacy_PHY_OFDM(0x93) /* Clip powerdown threshold */
#define B43legacy_PHY_OFDM9B B43legacy_PHY_OFDM(0x9B) /* FIXME rename */
#define B43legacy_PHY_N1P1GAIN B43legacy_PHY_OFDM(0xA0)
#define B43legacy_PHY_P1P2GAIN B43legacy_PHY_OFDM(0xA1)
#define B43legacy_PHY_N1N2GAIN B43legacy_PHY_OFDM(0xA2)
#define B43legacy_PHY_CLIPTHRES B43legacy_PHY_OFDM(0xA3)
#define B43legacy_PHY_CLIPN1P2THRES B43legacy_PHY_OFDM(0xA4)
#define B43legacy_PHY_DIVSRCHIDX B43legacy_PHY_OFDM(0xA8) /* Divider search gain/index */
#define B43legacy_PHY_CLIPP2THRES B43legacy_PHY_OFDM(0xA9)
#define B43legacy_PHY_CLIPP3THRES B43legacy_PHY_OFDM(0xAA)
#define B43legacy_PHY_DIVP1P2GAIN B43legacy_PHY_OFDM(0xAB)
#define B43legacy_PHY_DIVSRCHGAINBACK B43legacy_PHY_OFDM(0xAD) /* Divider search gain back */
#define B43legacy_PHY_DIVSRCHGAINCHNG B43legacy_PHY_OFDM(0xAE) /* Divider search gain change */
#define B43legacy_PHY_CRSTHRES1_R1 B43legacy_PHY_OFDM(0xC0) /* CRS Threshold 1 (rev 1 only) */
#define B43legacy_PHY_CRSTHRES2_R1 B43legacy_PHY_OFDM(0xC1) /* CRS Threshold 2 (rev 1 only) */
#define B43legacy_PHY_TSSIP_LTBASE B43legacy_PHY_OFDM(0x380) /* TSSI power lookup table base */
#define B43legacy_PHY_DC_LTBASE B43legacy_PHY_OFDM(0x3A0) /* DC lookup table base */
#define B43legacy_PHY_GAIN_LTBASE B43legacy_PHY_OFDM(0x3C0) /* Gain lookup table base */
void b43legacy_put_attenuation_into_ranges(int *_bbatt, int *_rfatt);
/* Masks for the different PHY versioning registers. */
#define B43legacy_PHYVER_ANALOG 0xF000
#define B43legacy_PHYVER_ANALOG_SHIFT 12
#define B43legacy_PHYVER_TYPE 0x0F00
#define B43legacy_PHYVER_TYPE_SHIFT 8
#define B43legacy_PHYVER_VERSION 0x00FF
struct b43legacy_wldev;
void b43legacy_raw_phy_lock(struct b43legacy_wldev *dev);
#define b43legacy_phy_lock(bcm, flags) \
do { \
local_irq_save(flags); \
b43legacy_raw_phy_lock(bcm); \
} while (0)
void b43legacy_raw_phy_unlock(struct b43legacy_wldev *dev);
#define b43legacy_phy_unlock(bcm, flags) \
do { \
b43legacy_raw_phy_unlock(bcm); \
local_irq_restore(flags); \
} while (0)
/* Card uses the loopback gain stuff */
#define has_loopback_gain(phy) \
(((phy)->rev > 1) || ((phy)->gmode))
u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset);
void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val);
int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev);
int b43legacy_phy_init(struct b43legacy_wldev *dev);
void b43legacy_set_rx_antenna(struct b43legacy_wldev *dev, int antenna);
void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev);
void b43legacy_phy_calibrate(struct b43legacy_wldev *dev);
int b43legacy_phy_connect(struct b43legacy_wldev *dev, int connect);
void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev);
void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev);
void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev);
/* Adjust the LocalOscillator to the saved values.
* "fixed" is only set to 1 once in initialization. Set to 0 otherwise.
*/
void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed);
void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev);
void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev,
u16 baseband_attenuation);
void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev,
int bit25, int bit26);
#endif /* B43legacy_PHY_H_ */
此差异已折叠。
#ifndef B43legacy_PIO_H_
#define B43legacy_PIO_H_
#include "b43legacy.h"
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/skbuff.h>
#define B43legacy_PIO_TXCTL 0x00
#define B43legacy_PIO_TXDATA 0x02
#define B43legacy_PIO_TXQBUFSIZE 0x04
#define B43legacy_PIO_RXCTL 0x08
#define B43legacy_PIO_RXDATA 0x0A
#define B43legacy_PIO_TXCTL_WRITELO (1 << 0)
#define B43legacy_PIO_TXCTL_WRITEHI (1 << 1)
#define B43legacy_PIO_TXCTL_COMPLETE (1 << 2)
#define B43legacy_PIO_TXCTL_INIT (1 << 3)
#define B43legacy_PIO_TXCTL_SUSPEND (1 << 7)
#define B43legacy_PIO_RXCTL_DATAAVAILABLE (1 << 0)
#define B43legacy_PIO_RXCTL_READY (1 << 1)
/* PIO constants */
#define B43legacy_PIO_MAXTXDEVQPACKETS 31
#define B43legacy_PIO_TXQADJUST 80
/* PIO tuning knobs */
#define B43legacy_PIO_MAXTXPACKETS 256
#ifdef CONFIG_B43LEGACY_PIO
struct b43legacy_pioqueue;
struct b43legacy_xmitstatus;
struct b43legacy_pio_txpacket {
struct b43legacy_pioqueue *queue;
struct sk_buff *skb;
struct ieee80211_tx_status txstat;
struct list_head list;
};
#define pio_txpacket_getindex(packet) ((int)((packet) - \
(packet)->queue->tx_packets_cache))
struct b43legacy_pioqueue {
struct b43legacy_wldev *dev;
u16 mmio_base;
bool tx_suspended;
bool tx_frozen;
bool need_workarounds; /* Workarounds needed for core.rev < 3 */
/* Adjusted size of the device internal TX buffer. */
u16 tx_devq_size;
/* Used octets of the device internal TX buffer. */
u16 tx_devq_used;
/* Used packet slots in the device internal TX buffer. */
u8 tx_devq_packets;
/* Packets from the txfree list can
* be taken on incoming TX requests.
*/
struct list_head txfree;
unsigned int nr_txfree;
/* Packets on the txqueue are queued,
* but not completely written to the chip, yet.
*/
struct list_head txqueue;
/* Packets on the txrunning queue are completely
* posted to the device. We are waiting for the txstatus.
*/
struct list_head txrunning;
/* Total number or packets sent.
* (This counter can obviously wrap).
*/
unsigned int nr_tx_packets;
struct tasklet_struct txtask;
struct b43legacy_pio_txpacket
tx_packets_cache[B43legacy_PIO_MAXTXPACKETS];
};
static inline
u16 b43legacy_pio_read(struct b43legacy_pioqueue *queue,
u16 offset)
{
return b43legacy_read16(queue->dev, queue->mmio_base + offset);
}
static inline
void b43legacy_pio_write(struct b43legacy_pioqueue *queue,
u16 offset, u16 value)
{
b43legacy_write16(queue->dev, queue->mmio_base + offset, value);
mmiowb();
}
int b43legacy_pio_init(struct b43legacy_wldev *dev);
void b43legacy_pio_free(struct b43legacy_wldev *dev);
int b43legacy_pio_tx(struct b43legacy_wldev *dev,
struct sk_buff *skb,
struct ieee80211_tx_control *ctl);
void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev,
const struct b43legacy_txstatus *status);
void b43legacy_pio_get_tx_stats(struct b43legacy_wldev *dev,
struct ieee80211_tx_queue_stats *stats);
void b43legacy_pio_rx(struct b43legacy_pioqueue *queue);
/* Suspend TX queue in hardware. */
void b43legacy_pio_tx_suspend(struct b43legacy_pioqueue *queue);
void b43legacy_pio_tx_resume(struct b43legacy_pioqueue *queue);
/* Suspend (freeze) the TX tasklet (software level). */
void b43legacy_pio_freeze_txqueues(struct b43legacy_wldev *dev);
void b43legacy_pio_thaw_txqueues(struct b43legacy_wldev *dev);
#else /* CONFIG_B43LEGACY_PIO */
static inline
int b43legacy_pio_init(struct b43legacy_wldev *dev)
{
return 0;
}
static inline
void b43legacy_pio_free(struct b43legacy_wldev *dev)
{
}
static inline
int b43legacy_pio_tx(struct b43legacy_wldev *dev,
struct sk_buff *skb,
struct ieee80211_tx_control *ctl)
{
return 0;
}
static inline
void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev,
const struct b43legacy_txstatus *status)
{
}
static inline
void b43legacy_pio_get_tx_stats(struct b43legacy_wldev *dev,
struct ieee80211_tx_queue_stats *stats)
{
}
static inline
void b43legacy_pio_rx(struct b43legacy_pioqueue *queue)
{
}
static inline
void b43legacy_pio_tx_suspend(struct b43legacy_pioqueue *queue)
{
}
static inline
void b43legacy_pio_tx_resume(struct b43legacy_pioqueue *queue)
{
}
static inline
void b43legacy_pio_freeze_txqueues(struct b43legacy_wldev *dev)
{
}
static inline
void b43legacy_pio_thaw_txqueues(struct b43legacy_wldev *dev)
{
}
#endif /* CONFIG_B43LEGACY_PIO */
#endif /* B43legacy_PIO_H_ */
此差异已折叠。
/*
Broadcom B43legacy wireless driver
Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
Stefano Brivio <st3@riseup.net>
Michael Buesch <mbuesch@freenet.de>
Danny van Dyk <kugelfang@gentoo.org>
Andreas Jaggi <andreas.jaggi@waterwave.ch>
Some parts of the code in this file are derived from the ipw2200
driver Copyright(c) 2003 - 2004 Intel Corporation.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#ifndef B43legacy_RADIO_H_
#define B43legacy_RADIO_H_
#include "b43legacy.h"
#define B43legacy_RADIO_DEFAULT_CHANNEL_BG 6
/* Force antenna 0. */
#define B43legacy_RADIO_TXANTENNA_0 0
/* Force antenna 1. */
#define B43legacy_RADIO_TXANTENNA_1 1
/* Use the RX antenna, that was selected for the most recently
* received good PLCP header.
*/
#define B43legacy_RADIO_TXANTENNA_LASTPLCP 3
#define B43legacy_RADIO_TXANTENNA_DEFAULT B43legacy_RADIO_TXANTENNA_LASTPLCP
#define B43legacy_RADIO_INTERFMODE_NONE 0
#define B43legacy_RADIO_INTERFMODE_NONWLAN 1
#define B43legacy_RADIO_INTERFMODE_MANUALWLAN 2
#define B43legacy_RADIO_INTERFMODE_AUTOWLAN 3
void b43legacy_radio_lock(struct b43legacy_wldev *dev);
void b43legacy_radio_unlock(struct b43legacy_wldev *dev);
u16 b43legacy_radio_read16(struct b43legacy_wldev *dev, u16 offset);
void b43legacy_radio_write16(struct b43legacy_wldev *dev, u16 offset, u16 val);
u16 b43legacy_radio_init2050(struct b43legacy_wldev *dev);
void b43legacy_radio_turn_on(struct b43legacy_wldev *dev);
void b43legacy_radio_turn_off(struct b43legacy_wldev *dev);
int b43legacy_radio_selectchannel(struct b43legacy_wldev *dev, u8 channel,
int synthetic_pu_workaround);
void b43legacy_radio_set_txpower_a(struct b43legacy_wldev *dev, u16 txpower);
void b43legacy_radio_set_txpower_bg(struct b43legacy_wldev *dev,
u16 baseband_attenuation, u16 attenuation,
u16 txpower);
u16 b43legacy_default_baseband_attenuation(struct b43legacy_wldev *dev);
u16 b43legacy_default_radio_attenuation(struct b43legacy_wldev *dev);
u16 b43legacy_default_txctl1(struct b43legacy_wldev *dev);
void b43legacy_radio_set_txantenna(struct b43legacy_wldev *dev, u32 val);
void b43legacy_radio_clear_tssi(struct b43legacy_wldev *dev);
u8 b43legacy_radio_aci_detect(struct b43legacy_wldev *dev, u8 channel);
u8 b43legacy_radio_aci_scan(struct b43legacy_wldev *dev);
int b43legacy_radio_set_interference_mitigation(struct b43legacy_wldev *dev,
int mode);
void b43legacy_calc_nrssi_slope(struct b43legacy_wldev *dev);
void b43legacy_calc_nrssi_threshold(struct b43legacy_wldev *dev);
s16 b43legacy_nrssi_hw_read(struct b43legacy_wldev *dev, u16 offset);
void b43legacy_nrssi_hw_write(struct b43legacy_wldev *dev, u16 offset, s16 val);
void b43legacy_nrssi_hw_update(struct b43legacy_wldev *dev, u16 val);
void b43legacy_nrssi_mem_update(struct b43legacy_wldev *dev);
void b43legacy_radio_set_tx_iq(struct b43legacy_wldev *dev);
u16 b43legacy_radio_calibrationvalue(struct b43legacy_wldev *dev);
#endif /* B43legacy_RADIO_H_ */
此差异已折叠。
#ifndef B43legacy_SYSFS_H_
#define B43legacy_SYSFS_H_
struct b43legacy_wldev;
int b43legacy_sysfs_register(struct b43legacy_wldev *dev);
void b43legacy_sysfs_unregister(struct b43legacy_wldev *dev);
#endif /* B43legacy_SYSFS_H_ */
此差异已折叠。
此差异已折叠。
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