提交 746a7241 编写于 作者: A Adam Ford 提交者: Shawn Guo

arm64: dts: imx8mp: Enable HS400-ES

The SDHC controller in the imx8mp has the same controller
as the imx8mm which supports HS400-ES. Change the compatible
fallback to imx8mm to enable it, but keep the imx7d-usdhc
to prevent breaking backwards compatibility.
Signed-off-by: NAdam Ford <aford173@gmail.com>
Acked-by: NKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
上级 472f20b4
...@@ -847,7 +847,7 @@ ...@@ -847,7 +847,7 @@
}; };
usdhc1: mmc@30b40000 { usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>; reg = <0x30b40000 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_DUMMY>, clocks = <&clk IMX8MP_CLK_DUMMY>,
...@@ -861,7 +861,7 @@ ...@@ -861,7 +861,7 @@
}; };
usdhc2: mmc@30b50000 { usdhc2: mmc@30b50000 {
compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b50000 0x10000>; reg = <0x30b50000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_DUMMY>, clocks = <&clk IMX8MP_CLK_DUMMY>,
...@@ -875,7 +875,7 @@ ...@@ -875,7 +875,7 @@
}; };
usdhc3: mmc@30b60000 { usdhc3: mmc@30b60000 {
compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b60000 0x10000>; reg = <0x30b60000 0x10000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_DUMMY>, clocks = <&clk IMX8MP_CLK_DUMMY>,
......
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