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提交 743a19e3 编写于 作者: A Andrew Lunn 提交者： Jakub Kicinski
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net: dsa: mv88e6xxx: Separate C22 and C45 transactions 

The global2 SMI MDIO bus driver can perform both C22 and C45
transfers. Create separate functions for each and register the C45
versions using the new API calls where appropriate. Update the SERDES
code to make use of these new accessors.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: NJakub Kicinski <kuba@kernel.org>
上级 1d914d51
隐藏空白更改
内联 并排
Showing with 225 addition and 85 deletion
drivers/net/dsa/mv88e6xxx/chip.c
浏览文件 @ 743a19e3
...@@ -3884,6 +3884,24 @@ static int mv88e6xxx_mdio_read(struct mii_bus *bus, int phy, int reg) ...@@ -3884,6 +3884,24 @@ static int mv88e6xxx_mdio_read(struct mii_bus *bus, int phy, int reg)
return err ? err : val; return err ? err : val;
} }
static int mv88e6xxx_mdio_read_c45(struct mii_bus *bus, int phy, int devad,
int reg)
{
struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv;
struct mv88e6xxx_chip *chip = mdio_bus->chip;
u16 val;
int err;
if (!chip->info->ops->phy_read_c45)
return -EOPNOTSUPP;
mv88e6xxx_reg_lock(chip);
err = chip->info->ops->phy_read_c45(chip, bus, phy, devad, reg, &val);
mv88e6xxx_reg_unlock(chip);
return err ? err : val;
}
static int mv88e6xxx_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val) static int mv88e6xxx_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
{ {
struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv;
...@@ -3900,6 +3918,23 @@ static int mv88e6xxx_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val) ...@@ -3900,6 +3918,23 @@ static int mv88e6xxx_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
return err; return err;
} }
static int mv88e6xxx_mdio_write_c45(struct mii_bus *bus, int phy, int devad,
int reg, u16 val)
{
struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv;
struct mv88e6xxx_chip *chip = mdio_bus->chip;
int err;
if (!chip->info->ops->phy_write_c45)
return -EOPNOTSUPP;
mv88e6xxx_reg_lock(chip);
err = chip->info->ops->phy_write_c45(chip, bus, phy, devad, reg, val);
mv88e6xxx_reg_unlock(chip);
return err;
}
static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip, static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip,
struct device_node *np, struct device_node *np,
bool external) bool external)
...@@ -3938,6 +3973,8 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip, ...@@ -3938,6 +3973,8 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip,
bus->read = mv88e6xxx_mdio_read; bus->read = mv88e6xxx_mdio_read;
bus->write = mv88e6xxx_mdio_write; bus->write = mv88e6xxx_mdio_write;
bus->read_c45 = mv88e6xxx_mdio_read_c45;
bus->write_c45 = mv88e6xxx_mdio_write_c45;
bus->parent = chip->dev; bus->parent = chip->dev;
if (!external) { if (!external) {
...@@ -4149,8 +4186,10 @@ static const struct mv88e6xxx_ops mv88e6097_ops = { ...@@ -4149,8 +4186,10 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
.ip_pri_map = mv88e6085_g1_ip_pri_map, .ip_pri_map = mv88e6085_g1_ip_pri_map,
.irl_init_all = mv88e6352_g2_irl_init_all, .irl_init_all = mv88e6352_g2_irl_init_all,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6185_port_sync_link, .port_sync_link = mv88e6185_port_sync_link,
.port_set_speed_duplex = mv88e6185_port_set_speed_duplex, .port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
...@@ -4198,8 +4237,10 @@ static const struct mv88e6xxx_ops mv88e6123_ops = { ...@@ -4198,8 +4237,10 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
.ip_pri_map = mv88e6085_g1_ip_pri_map, .ip_pri_map = mv88e6085_g1_ip_pri_map,
.irl_init_all = mv88e6352_g2_irl_init_all, .irl_init_all = mv88e6352_g2_irl_init_all,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_speed_duplex = mv88e6185_port_set_speed_duplex, .port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
...@@ -4279,8 +4320,10 @@ static const struct mv88e6xxx_ops mv88e6141_ops = { ...@@ -4279,8 +4320,10 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
...@@ -4343,8 +4386,10 @@ static const struct mv88e6xxx_ops mv88e6161_ops = { ...@@ -4343,8 +4386,10 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
.ip_pri_map = mv88e6085_g1_ip_pri_map, .ip_pri_map = mv88e6085_g1_ip_pri_map,
.irl_init_all = mv88e6352_g2_irl_init_all, .irl_init_all = mv88e6352_g2_irl_init_all,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_speed_duplex = mv88e6185_port_set_speed_duplex, .port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
...@@ -4426,8 +4471,10 @@ static const struct mv88e6xxx_ops mv88e6171_ops = { ...@@ -4426,8 +4471,10 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
.ip_pri_map = mv88e6085_g1_ip_pri_map, .ip_pri_map = mv88e6085_g1_ip_pri_map,
.irl_init_all = mv88e6352_g2_irl_init_all, .irl_init_all = mv88e6352_g2_irl_init_all,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -4472,8 +4519,10 @@ static const struct mv88e6xxx_ops mv88e6172_ops = { ...@@ -4472,8 +4519,10 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom16, .get_eeprom = mv88e6xxx_g2_get_eeprom16,
.set_eeprom = mv88e6xxx_g2_set_eeprom16, .set_eeprom = mv88e6xxx_g2_set_eeprom16,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -4527,8 +4576,10 @@ static const struct mv88e6xxx_ops mv88e6175_ops = { ...@@ -4527,8 +4576,10 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
.ip_pri_map = mv88e6085_g1_ip_pri_map, .ip_pri_map = mv88e6085_g1_ip_pri_map,
.irl_init_all = mv88e6352_g2_irl_init_all, .irl_init_all = mv88e6352_g2_irl_init_all,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -4573,8 +4624,10 @@ static const struct mv88e6xxx_ops mv88e6176_ops = { ...@@ -4573,8 +4624,10 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom16, .get_eeprom = mv88e6xxx_g2_get_eeprom16,
.set_eeprom = mv88e6xxx_g2_set_eeprom16, .set_eeprom = mv88e6xxx_g2_set_eeprom16,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -4673,8 +4726,10 @@ static const struct mv88e6xxx_ops mv88e6190_ops = { ...@@ -4673,8 +4726,10 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
...@@ -4736,8 +4791,10 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = { ...@@ -4736,8 +4791,10 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
...@@ -4799,8 +4856,10 @@ static const struct mv88e6xxx_ops mv88e6191_ops = { ...@@ -4799,8 +4856,10 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
...@@ -4862,8 +4921,10 @@ static const struct mv88e6xxx_ops mv88e6240_ops = { ...@@ -4862,8 +4921,10 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom16, .get_eeprom = mv88e6xxx_g2_get_eeprom16,
.set_eeprom = mv88e6xxx_g2_set_eeprom16, .set_eeprom = mv88e6xxx_g2_set_eeprom16,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -4925,8 +4986,10 @@ static const struct mv88e6xxx_ops mv88e6250_ops = { ...@@ -4925,8 +4986,10 @@ static const struct mv88e6xxx_ops mv88e6250_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom16, .get_eeprom = mv88e6xxx_g2_get_eeprom16,
.set_eeprom = mv88e6xxx_g2_set_eeprom16, .set_eeprom = mv88e6xxx_g2_set_eeprom16,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -4964,8 +5027,10 @@ static const struct mv88e6xxx_ops mv88e6290_ops = { ...@@ -4964,8 +5027,10 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
...@@ -5029,8 +5094,10 @@ static const struct mv88e6xxx_ops mv88e6320_ops = { ...@@ -5029,8 +5094,10 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom16, .get_eeprom = mv88e6xxx_g2_get_eeprom16,
.set_eeprom = mv88e6xxx_g2_set_eeprom16, .set_eeprom = mv88e6xxx_g2_set_eeprom16,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay,
...@@ -5074,8 +5141,10 @@ static const struct mv88e6xxx_ops mv88e6321_ops = { ...@@ -5074,8 +5141,10 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom16, .get_eeprom = mv88e6xxx_g2_get_eeprom16,
.set_eeprom = mv88e6xxx_g2_set_eeprom16, .set_eeprom = mv88e6xxx_g2_set_eeprom16,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay,
...@@ -5117,8 +5186,10 @@ static const struct mv88e6xxx_ops mv88e6341_ops = { ...@@ -5117,8 +5186,10 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
...@@ -5183,8 +5254,10 @@ static const struct mv88e6xxx_ops mv88e6350_ops = { ...@@ -5183,8 +5254,10 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
.ip_pri_map = mv88e6085_g1_ip_pri_map, .ip_pri_map = mv88e6085_g1_ip_pri_map,
.irl_init_all = mv88e6352_g2_irl_init_all, .irl_init_all = mv88e6352_g2_irl_init_all,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -5227,8 +5300,10 @@ static const struct mv88e6xxx_ops mv88e6351_ops = { ...@@ -5227,8 +5300,10 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
.ip_pri_map = mv88e6085_g1_ip_pri_map, .ip_pri_map = mv88e6085_g1_ip_pri_map,
.irl_init_all = mv88e6352_g2_irl_init_all, .irl_init_all = mv88e6352_g2_irl_init_all,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -5275,8 +5350,10 @@ static const struct mv88e6xxx_ops mv88e6352_ops = { ...@@ -5275,8 +5350,10 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom16, .get_eeprom = mv88e6xxx_g2_get_eeprom16,
.set_eeprom = mv88e6xxx_g2_set_eeprom16, .set_eeprom = mv88e6xxx_g2_set_eeprom16,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
...@@ -5340,8 +5417,10 @@ static const struct mv88e6xxx_ops mv88e6390_ops = { ...@@ -5340,8 +5417,10 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
...@@ -5407,8 +5486,10 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = { ...@@ -5407,8 +5486,10 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
...@@ -5473,8 +5554,10 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = { ...@@ -5473,8 +5554,10 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = {
.get_eeprom = mv88e6xxx_g2_get_eeprom8, .get_eeprom = mv88e6xxx_g2_get_eeprom8,
.set_eeprom = mv88e6xxx_g2_set_eeprom8, .set_eeprom = mv88e6xxx_g2_set_eeprom8,
.set_switch_mac = mv88e6xxx_g2_set_switch_mac, .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
.phy_read = mv88e6xxx_g2_smi_phy_read, .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
.phy_write = mv88e6xxx_g2_smi_phy_write, .phy_write = mv88e6xxx_g2_smi_phy_write_c22,
.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,
.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,
.port_set_link = mv88e6xxx_port_set_link, .port_set_link = mv88e6xxx_port_set_link,
.port_sync_link = mv88e6xxx_port_sync_link, .port_sync_link = mv88e6xxx_port_sync_link,
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
......
drivers/net/dsa/mv88e6xxx/chip.h
浏览文件 @ 743a19e3
...@@ -454,6 +454,13 @@ struct mv88e6xxx_ops { ...@@ -454,6 +454,13 @@ struct mv88e6xxx_ops {
struct mii_bus *bus, struct mii_bus *bus,
int addr, int reg, u16 val); int addr, int reg, u16 val);
int (*phy_read_c45)(struct mv88e6xxx_chip *chip,
struct mii_bus *bus,
int addr, int devad, int reg, u16 *val);
int (*phy_write_c45)(struct mv88e6xxx_chip *chip,
struct mii_bus *bus,
int addr, int devad, int reg, u16 val);
/* Priority Override Table operations */ /* Priority Override Table operations */
int (*pot_clear)(struct mv88e6xxx_chip *chip); int (*pot_clear)(struct mv88e6xxx_chip *chip);
......
drivers/net/dsa/mv88e6xxx/global2.c
浏览文件 @ 743a19e3
...@@ -739,20 +739,18 @@ static int mv88e6xxx_g2_smi_phy_read_data_c45(struct mv88e6xxx_chip *chip, ...@@ -739,20 +739,18 @@ static int mv88e6xxx_g2_smi_phy_read_data_c45(struct mv88e6xxx_chip *chip,
return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SMI_PHY_DATA, data);
} }
static int mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip, static int _mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip,
bool external, int port, int reg, bool external, int port, int devad,
u16 *data) int reg, u16 *data)
{ {
int dev = (reg >> 16) & 0x1f;
int addr = reg & 0xffff;
int err; int err;
err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, dev, err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, devad,
addr); reg);
if (err) if (err)
return err; return err;
return mv88e6xxx_g2_smi_phy_read_data_c45(chip, external, port, dev, return mv88e6xxx_g2_smi_phy_read_data_c45(chip, external, port, devad,
data); data);
} }
...@@ -771,51 +769,65 @@ static int mv88e6xxx_g2_smi_phy_write_data_c45(struct mv88e6xxx_chip *chip, ...@@ -771,51 +769,65 @@ static int mv88e6xxx_g2_smi_phy_write_data_c45(struct mv88e6xxx_chip *chip,
return mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev); return mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev);
} }
static int mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip, static int _mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip,
bool external, int port, int reg, bool external, int port, int devad,
u16 data) int reg, u16 data)
{ {
int dev = (reg >> 16) & 0x1f;
int addr = reg & 0xffff;
int err; int err;
err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, dev, err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, devad,
addr); reg);
if (err) if (err)
return err; return err;
return mv88e6xxx_g2_smi_phy_write_data_c45(chip, external, port, dev, return mv88e6xxx_g2_smi_phy_write_data_c45(chip, external, port, devad,
data); data);
} }
int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, int mv88e6xxx_g2_smi_phy_read_c22(struct mv88e6xxx_chip *chip,
int addr, int reg, u16 *val) struct mii_bus *bus,
int addr, int reg, u16 *val)
{ {
struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv;
bool external = mdio_bus->external; bool external = mdio_bus->external;
if (reg & MII_ADDR_C45)
return mv88e6xxx_g2_smi_phy_read_c45(chip, external, addr, reg,
val);
return mv88e6xxx_g2_smi_phy_read_data_c22(chip, external, addr, reg, return mv88e6xxx_g2_smi_phy_read_data_c22(chip, external, addr, reg,
val); val);
} }
int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, int mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip,
int addr, int reg, u16 val) struct mii_bus *bus, int addr, int devad,
int reg, u16 *val)
{ {
struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv;
bool external = mdio_bus->external; bool external = mdio_bus->external;
if (reg & MII_ADDR_C45) return _mv88e6xxx_g2_smi_phy_read_c45(chip, external, addr, devad, reg,
return mv88e6xxx_g2_smi_phy_write_c45(chip, external, addr, reg, val);
val); }
int mv88e6xxx_g2_smi_phy_write_c22(struct mv88e6xxx_chip *chip,
struct mii_bus *bus, int addr, int reg,
u16 val)
{
struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv;
bool external = mdio_bus->external;
return mv88e6xxx_g2_smi_phy_write_data_c22(chip, external, addr, reg, return mv88e6xxx_g2_smi_phy_write_data_c22(chip, external, addr, reg,
val); val);
} }
int mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip,
struct mii_bus *bus, int addr, int devad,
int reg, u16 val)
{
struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv;
bool external = mdio_bus->external;
return _mv88e6xxx_g2_smi_phy_write_c45(chip, external, addr, devad, reg,
val);
}
/* Offset 0x1B: Watchdog Control */ /* Offset 0x1B: Watchdog Control */
static int mv88e6097_watchdog_action(struct mv88e6xxx_chip *chip, int irq) static int mv88e6097_watchdog_action(struct mv88e6xxx_chip *chip, int irq)
{ {
......
drivers/net/dsa/mv88e6xxx/global2.h
浏览文件 @ 743a19e3
...@@ -314,12 +314,18 @@ int mv88e6xxx_g2_wait_bit(struct mv88e6xxx_chip *chip, int reg, ...@@ -314,12 +314,18 @@ int mv88e6xxx_g2_wait_bit(struct mv88e6xxx_chip *chip, int reg,
int mv88e6352_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port); int mv88e6352_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port);
int mv88e6390_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port); int mv88e6390_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port);
int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, int mv88e6xxx_g2_smi_phy_read_c22(struct mv88e6xxx_chip *chip,
struct mii_bus *bus, struct mii_bus *bus,
int addr, int reg, u16 *val); int addr, int reg, u16 *val);
int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, int mv88e6xxx_g2_smi_phy_write_c22(struct mv88e6xxx_chip *chip,
struct mii_bus *bus, struct mii_bus *bus,
int addr, int reg, u16 val); int addr, int reg, u16 val);
int mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip,
struct mii_bus *bus,
int addr, int devad, int reg, u16 *val);
int mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip,
struct mii_bus *bus,
int addr, int devad, int reg, u16 val);
int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr); int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr);
int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip, int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip,
......
drivers/net/dsa/mv88e6xxx/phy.c
浏览文件 @ 743a19e3
...@@ -55,6 +55,38 @@ int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val) ...@@ -55,6 +55,38 @@ int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
return chip->info->ops->phy_write(chip, bus, addr, reg, val); return chip->info->ops->phy_write(chip, bus, addr, reg, val);
} }
int mv88e6xxx_phy_read_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
int reg, u16 *val)
{
int addr = phy; /* PHY devices addresses start at 0x0 */
struct mii_bus *bus;
bus = mv88e6xxx_default_mdio_bus(chip);
if (!bus)
return -EOPNOTSUPP;
if (!chip->info->ops->phy_read_c45)
return -EOPNOTSUPP;
return chip->info->ops->phy_read_c45(chip, bus, addr, devad, reg, val);
}
int mv88e6xxx_phy_write_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
int reg, u16 val)
{
int addr = phy; /* PHY devices addresses start at 0x0 */
struct mii_bus *bus;
bus = mv88e6xxx_default_mdio_bus(chip);
if (!bus)
return -EOPNOTSUPP;
if (!chip->info->ops->phy_write_c45)
return -EOPNOTSUPP;
return chip->info->ops->phy_write_c45(chip, bus, addr, devad, reg, val);
}
static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page) static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
{ {
return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page); return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
......
drivers/net/dsa/mv88e6xxx/phy.h
浏览文件 @ 743a19e3
...@@ -28,6 +28,10 @@ int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, ...@@ -28,6 +28,10 @@ int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
int reg, u16 *val); int reg, u16 *val);
int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
int reg, u16 val); int reg, u16 val);
int mv88e6xxx_phy_read_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
int reg, u16 *val);
int mv88e6xxx_phy_write_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
int reg, u16 val);
int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy, int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
u8 page, int reg, u16 *val); u8 page, int reg, u16 *val);
int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy, int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
......
drivers/net/dsa/mv88e6xxx/serdes.c
浏览文件 @ 743a19e3
...@@ -36,17 +36,13 @@ static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg, ...@@ -36,17 +36,13 @@ static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg,
static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip, static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip,
int lane, int device, int reg, u16 *val) int lane, int device, int reg, u16 *val)
{ {
int reg_c45 = MII_ADDR_C45 | device << 16 | reg; return mv88e6xxx_phy_read_c45(chip, lane, device, reg, val);
return mv88e6xxx_phy_read(chip, lane, reg_c45, val);
} }
static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip, static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip,
int lane, int device, int reg, u16 val) int lane, int device, int reg, u16 val)
{ {
int reg_c45 = MII_ADDR_C45 | device << 16 | reg; return mv88e6xxx_phy_write_c45(chip, lane, device, reg, val);
return mv88e6xxx_phy_write(chip, lane, reg_c45, val);
} }
static int mv88e6xxx_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, static int mv88e6xxx_serdes_pcs_get_state(struct mv88e6xxx_chip *chip,
......
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