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提交 6f1e9b99 编写于 作者: B Ben Skeggs
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drm/gm107/gr: initial support 

Our ucode only partially works at this point, so requiring binary fw
image for now.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
上级 295cb52b
展开全部 隐藏空白更改
内联 并排
Showing with 2942 addition and 7 deletion
drivers/gpu/drm/nouveau/Makefile
浏览文件 @ 6f1e9b99
......@@ -257,6 +257,7 @@ nouveau-y += core/engine/graph/ctxnvd9.o
nouveau-y += core/engine/graph/ctxnve4.o
nouveau-y += core/engine/graph/ctxnvf0.o
nouveau-y += core/engine/graph/ctxnv108.o
nouveau-y += core/engine/graph/ctxgm107.o
nouveau-y += core/engine/graph/nv04.o
nouveau-y += core/engine/graph/nv10.o
nouveau-y += core/engine/graph/nv20.o
......@@ -276,6 +277,7 @@ nouveau-y += core/engine/graph/nvd9.o
nouveau-y += core/engine/graph/nve4.o
nouveau-y += core/engine/graph/nvf0.o
nouveau-y += core/engine/graph/nv108.o
nouveau-y += core/engine/graph/gm107.o
nouveau-y += core/engine/mpeg/nv31.o
nouveau-y += core/engine/mpeg/nv40.o
nouveau-y += core/engine/mpeg/nv44.o
......
drivers/gpu/drm/nouveau/core/engine/device/gm100.c
浏览文件 @ 6f1e9b99
......@@ -84,9 +84,7 @@ gm100_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
#if 0
device->oclass[NVDEV_ENGINE_GR ] = nv108_graph_oclass;
#endif
device->oclass[NVDEV_ENGINE_GR ] = gm107_graph_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass;
device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
#if 0
......
drivers/gpu/drm/nouveau/core/engine/graph/ctxgm107.c 0 → 100644
浏览文件 @ 6f1e9b99
此差异已折叠。
drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
浏览文件 @ 6f1e9b99
......@@ -340,7 +340,7 @@ nv108_grctx_init_pd_0[] = {
{}
};
static const struct nvc0_graph_init
const struct nvc0_graph_init
nv108_grctx_init_rstr2d_0[] = {
{ 0x407804, 1, 0x04, 0x00000063 },
{ 0x40780c, 1, 0x04, 0x0a418820 },
......@@ -381,7 +381,7 @@ nv108_grctx_pack_hub[] = {
{}
};
static const struct nvc0_graph_init
const struct nvc0_graph_init
nv108_grctx_init_prop_0[] = {
{ 0x418400, 1, 0x04, 0x38005e00 },
{ 0x418404, 1, 0x04, 0x71e0ffff },
......@@ -419,7 +419,7 @@ nv108_grctx_init_setup_0[] = {
{}
};
static const struct nvc0_graph_init
const struct nvc0_graph_init
nv108_grctx_init_crstr_0[] = {
{ 0x418b00, 1, 0x04, 0x0000001e },
{ 0x418b08, 1, 0x04, 0x0a418820 },
......
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h
浏览文件 @ 6f1e9b99
......@@ -75,6 +75,7 @@ void nve4_grctx_generate_r418bb8(struct nvc0_graph_priv *);
extern struct nouveau_oclass *nvf0_grctx_oclass;
extern struct nouveau_oclass *nv108_grctx_oclass;
extern struct nouveau_oclass *gm107_grctx_oclass;
/* context init value lists */
......@@ -160,5 +161,10 @@ extern const struct nvc0_graph_init nvf0_grctx_init_gpc_unk_2[];
extern const struct nvc0_graph_init nvf0_grctx_init_mpc_0[];
extern const struct nvc0_graph_init nvf0_grctx_init_l1c_0[];
extern const struct nvc0_graph_init nv108_grctx_init_rstr2d_0[];
extern const struct nvc0_graph_init nv108_grctx_init_prop_0[];
extern const struct nvc0_graph_init nv108_grctx_init_crstr_0[];
#endif
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcgm107.fuc5 0 → 100644
浏览文件 @ 6f1e9b99
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define NV_PGRAPH_GPCX_UNK__SIZE 0x00000002
#define CHIPSET GK208
#include "macros.fuc"
.section #gm107_grgpc_data
#define INCLUDE_DATA
#include "com.fuc"
#include "gpc.fuc"
#undef INCLUDE_DATA
.section #gm107_grgpc_code
#define INCLUDE_CODE
bra #init
#include "com.fuc"
#include "gpc.fuc"
.align 256
#undef INCLUDE_CODE
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcgm107.fuc5.h 0 → 100644
浏览文件 @ 6f1e9b99
uint32_t gm107_grgpc_data[] = {
/* 0x0000: gpc_mmio_list_head */
0x0000006c,
/* 0x0004: gpc_mmio_list_tail */
/* 0x0004: tpc_mmio_list_head */
0x0000006c,
/* 0x0008: tpc_mmio_list_tail */
/* 0x0008: unk_mmio_list_head */
0x0000006c,
/* 0x000c: unk_mmio_list_tail */
0x0000006c,
/* 0x0010: gpc_id */
0x00000000,
/* 0x0014: tpc_count */
0x00000000,
/* 0x0018: tpc_mask */
0x00000000,
/* 0x001c: unk_count */
0x00000000,
/* 0x0020: unk_mask */
0x00000000,
/* 0x0024: cmd_queue */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
uint32_t gm107_grgpc_code[] = {
0x03140ef5,
/* 0x0004: queue_put */
0x9800d898,
0x86f001d9,
0xf489a408,
0x020f0b1b,
0x0002f87e,
/* 0x001a: queue_put_next */
0x98c400f8,
0x0384b607,
0xb6008dbb,
0x8eb50880,
0x018fb500,
0xf00190b6,
0xd9b50f94,
/* 0x0037: queue_get */
0xf400f801,
0xd8980131,
0x01d99800,
0x0bf489a4,
0x0789c421,
0xbb0394b6,
0x90b6009d,
0x009e9808,
0xb6019f98,
0x84f00180,
0x00d8b50f,
/* 0x0063: queue_get_done */
0xf80132f4,
/* 0x0065: nv_rd32 */
0xf0ecb200,
0x00801fc9,
0x0cf601ca,
/* 0x0073: nv_rd32_wait */
0x8c04bd00,
0xcf01ca00,
0xccc800cc,
0xf61bf41f,
0xec7e060a,
0x008f0000,
0xffcf01cb,
/* 0x008f: nv_wr32 */
0x8000f800,
0xf601cc00,
0x04bd000f,
0xc9f0ecb2,
0x1ec9f01f,
0x01ca0080,
0xbd000cf6,
/* 0x00a9: nv_wr32_wait */
0xca008c04,
0x00cccf01,
0xf41fccc8,
0x00f8f61b,
/* 0x00b8: wait_donez */
0x99f094bd,
0x37008000,
0x0009f602,
0x008004bd,
0x0af60206,
/* 0x00cf: wait_donez_ne */
0x8804bd00,
0xcf010000,
0x8aff0088,
0xf61bf488,
0x99f094bd,
0x17008000,
0x0009f602,
0x00f804bd,
/* 0x00ec: wait_doneo */
0x99f094bd,
0x37008000,
0x0009f602,
0x008004bd,
0x0af60206,
/* 0x0103: wait_doneo_e */
0x8804bd00,
0xcf010000,
0x8aff0088,
0xf60bf488,
0x99f094bd,
0x17008000,
0x0009f602,
0x00f804bd,
/* 0x0120: mmctx_size */
/* 0x0122: nv_mmctx_size_loop */
0xe89894bd,
0x1a85b600,
0xb60180b6,
0x98bb0284,
0x04e0b600,
0x1bf4efa4,
0xf89fb2ec,
/* 0x013d: mmctx_xfer */
0xf094bd00,
0x00800199,
0x09f60237,
0xbd04bd00,
0x05bbfd94,
0x800f0bf4,
0xf601c400,
0x04bd000b,
/* 0x015f: mmctx_base_disabled */
0xfd0099f0,
0x0bf405ee,
0xc6008018,
0x000ef601,
0x008004bd,
0x0ff601c7,
0xf004bd00,
/* 0x017a: mmctx_multi_disabled */
0xabc80199,
0x10b4b600,
0xc80cb9f0,
0xe4b601ae,
0x05befd11,
0x01c50080,
0xbd000bf6,
/* 0x0195: mmctx_exec_loop */
/* 0x0195: mmctx_wait_free */
0xc5008e04,
0x00eecf01,
0xf41fe4f0,
0xce98f60b,
0x05e9fd00,
0x01c80080,
0xbd000ef6,
0x04c0b604,
0x1bf4cda4,
0x02abc8df,
/* 0x01bf: mmctx_fini_wait */
0x8b1c1bf4,
0xcf01c500,
0xb4f000bb,
0x10b4b01f,
0x0af31bf4,
0x00b87e05,
0x250ef400,
/* 0x01d8: mmctx_stop */
0xb600abc8,
0xb9f010b4,
0x12b9f00c,
0x01c50080,
0xbd000bf6,
/* 0x01ed: mmctx_stop_wait */
0xc5008b04,
0x00bbcf01,
0xf412bbc8,
/* 0x01fa: mmctx_done */
0x94bdf61b,
0x800199f0,
0xf6021700,
0x04bd0009,
/* 0x020a: strand_wait */
0xa0f900f8,
0xb87e020a,
0xa0fc0000,
/* 0x0216: strand_pre */
0x0c0900f8,
0x024afc80,
0xbd0009f6,
0x020a7e04,
/* 0x0227: strand_post */
0x0900f800,
0x4afc800d,
0x0009f602,
0x0a7e04bd,
0x00f80002,
/* 0x0238: strand_set */
0xfc800f0c,
0x0cf6024f,
0x0c04bd00,
0x4afc800b,
0x000cf602,
0xfc8004bd,
0x0ef6024f,
0x0c04bd00,
0x4afc800a,
0x000cf602,
0x0a7e04bd,
0x00f80002,
/* 0x0268: strand_ctx_init */
0x99f094bd,
0x37008003,
0x0009f602,
0x167e04bd,
0x030e0002,
0x0002387e,
0xfc80c4bd,
0x0cf60247,
0x0c04bd00,
0x4afc8001,
0x000cf602,
0x0a7e04bd,
0x0c920002,
0x46fc8001,
0x000cf602,
0x020c04bd,
0x024afc80,
0xbd000cf6,
0x020a7e04,
0x02277e00,
0x42008800,
0x20008902,
0x0099cf02,
/* 0x02c7: ctx_init_strand_loop */
0xf608fe95,
0x8ef6008e,
0x808acf40,
0xb606a5b6,
0xeabb01a0,
0x0480b600,
0xf40192b6,
0xe4b6e81b,
0xf2efbc08,
0x99f094bd,
0x17008003,
0x0009f602,
0x00f804bd,
/* 0x02f8: error */
0xffb2e0f9,
0x4098148e,
0x00008f7e,
0xffb2010f,
0x409c1c8e,
0x00008f7e,
0x00f8e0fc,
/* 0x0314: init */
0x004104bd,
0x0011cf42,
0x010911e7,
0xfe0814b6,
0x02020014,
0xf6120040,
0x04bd0002,
0xfe047241,
0x00400010,
0x0000f607,
0x040204bd,
0xf6040040,
0x04bd0002,
0x821031f4,
0xcf018200,
0x01030022,
0xbb1f24f0,
0x32b60432,
0x0502b501,
0x820603b5,
0xcf018600,
0x02b50022,
0x0c308e04,
0xbd24bd50,
/* 0x0377: init_unk_loop */
0x7e44bd34,
0xb0000065,
0x0bf400f6,
0xbb010f0e,
0x4ffd04f2,
0x0130b605,
/* 0x038c: init_unk_next */
0xb60120b6,
0x26b004e0,
0xe21bf402,
/* 0x0398: init_unk_done */
0xb50703b5,
0x00820804,
0x22cf0201,
0x9534bd00,
0x00800825,
0x05f601c0,
0x8004bd00,
0xf601c100,
0x04bd0005,
0x98000e98,
0x207e010f,
0x2fbb0001,
0x003fbb00,
0x98010e98,
0x207e020f,
0x0e980001,
0x00effd05,
0xbb002ebb,
0x0e98003e,
0x030f9802,
0x0001207e,
0xfd070e98,
0x2ebb00ef,
0x003ebb00,
0x800235b6,
0xf601d300,
0x04bd0003,
0xb60825b6,
0x20b60635,
0x0130b601,
0xb60824b6,
0x2fb20834,
0x0002687e,
0x80003fbb,
0xf6020100,
0x04bd0003,
0x29f024bd,
0x3000801f,
0x0002f602,
/* 0x0436: main */
0x31f404bd,
0x0028f400,
0x377e240d,
0x01f40000,
0x04e4b0f4,
0xfe1d18f4,
0x06020181,
0x12fd20bd,
0x01e4b604,
0xfe051efd,
0x097e0018,
0x0ef40005,
/* 0x0465: main_not_ctx_xfer */
0x10ef94d4,
0x7e01f5f0,
0xf40002f8,
/* 0x0472: ih */
0x80f9c70e,
0xf90188fe,
0xf990f980,
0xf9b0f9a0,
0xf9e0f9d0,
0x4a04bdf0,
0xaacf0200,
0x04abc400,
0x0d1f0bf4,
0x1a004e24,
0x4f00eecf,
0xffcf1900,
0x00047e00,
0x40010e00,
0x0ef61d00,
/* 0x04af: ih_no_fifo */
0x4004bd00,
0x0af60100,
0xfc04bd00,
0xfce0fcf0,
0xfcb0fcd0,
0xfc90fca0,
0x0088fe80,
0x32f480fc,
/* 0x04cf: hub_barrier_done */
0x0f01f800,
0x040e9801,
0xb204febb,
0x94188eff,
0x008f7e40,
/* 0x04e3: ctx_redswitch */
0x0f00f800,
0x85008020,
0x000ff601,
0x080e04bd,
/* 0x04f0: ctx_redswitch_delay */
0xf401e2b6,
0xf5f1fd1b,
0xf5f10800,
0x00800200,
0x0ff60185,
0xf804bd00,
/* 0x0509: ctx_xfer */
0x81008000,
0x000ff602,
0x11f404bd,
0x04e37e07,
/* 0x0519: ctx_xfer_not_load */
0x02167e00,
0x8024bd00,
0xf60247fc,
0x04bd0002,
0xb6012cf0,
0xfc800320,
0x02f6024a,
0xf004bd00,
0xa5f001ac,
0x00008b02,
0x040c9850,
0xbb0fc4b6,
0x0c9800bc,
0x010d9800,
0x3d7e000e,
0xacf00001,
0x40008b01,
0x040c9850,
0xbb0fc4b6,
0x0c9800bc,
0x020d9801,
0x4e060f98,
0x3d7e0800,
0xacf00001,
0x04a5f001,
0x5030008b,
0xb6040c98,
0xbcbb0fc4,
0x020c9800,
0x98030d98,
0x004e080f,
0x013d7e02,
0x020a7e00,
0x0601f400,
/* 0x05a3: ctx_xfer_post */
0x7e0712f4,
/* 0x05a7: ctx_xfer_done */
0x7e000227,
0xf80004cf,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubgm107.fuc5 0 → 100644
浏览文件 @ 6f1e9b99
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#define CHIPSET GK208
#include "macros.fuc"
.section #gm107_grhub_data
#define INCLUDE_DATA
#include "com.fuc"
#include "hub.fuc"
#undef INCLUDE_DATA
.section #gm107_grhub_code
#define INCLUDE_CODE
bra #init
#include "com.fuc"
#include "hub.fuc"
.align 256
#undef INCLUDE_CODE
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubgm107.fuc5.h 0 → 100644
浏览文件 @ 6f1e9b99
uint32_t gm107_grhub_data[] = {
/* 0x0000: hub_mmio_list_head */
0x00000300,
/* 0x0004: hub_mmio_list_tail */
0x00000304,
/* 0x0008: gpc_count */
0x00000000,
/* 0x000c: rop_count */
0x00000000,
/* 0x0010: cmd_queue */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0058: ctx_current */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0100: chan_data */
/* 0x0100: chan_mmio_count */
0x00000000,
/* 0x0104: chan_mmio_address */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0200: xfer_data */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0300: hub_mmio_list_base */
0x0417e91c,
};
uint32_t gm107_grhub_code[] = {
0x030e0ef5,
/* 0x0004: queue_put */
0x9800d898,
0x86f001d9,
0xf489a408,
0x020f0b1b,
0x0002f87e,
/* 0x001a: queue_put_next */
0x98c400f8,
0x0384b607,
0xb6008dbb,
0x8eb50880,
0x018fb500,
0xf00190b6,
0xd9b50f94,
/* 0x0037: queue_get */
0xf400f801,
0xd8980131,
0x01d99800,
0x0bf489a4,
0x0789c421,
0xbb0394b6,
0x90b6009d,
0x009e9808,
0xb6019f98,
0x84f00180,
0x00d8b50f,
/* 0x0063: queue_get_done */
0xf80132f4,
/* 0x0065: nv_rd32 */
0xf0ecb200,
0x00801fc9,
0x0cf601ca,
/* 0x0073: nv_rd32_wait */
0x8c04bd00,
0xcf01ca00,
0xccc800cc,
0xf61bf41f,
0xec7e060a,
0x008f0000,
0xffcf01cb,
/* 0x008f: nv_wr32 */
0x8000f800,
0xf601cc00,
0x04bd000f,
0xc9f0ecb2,
0x1ec9f01f,
0x01ca0080,
0xbd000cf6,
/* 0x00a9: nv_wr32_wait */
0xca008c04,
0x00cccf01,
0xf41fccc8,
0x00f8f61b,
/* 0x00b8: wait_donez */
0x99f094bd,
0x37008000,
0x0009f602,
0x008004bd,
0x0af60206,
/* 0x00cf: wait_donez_ne */
0x8804bd00,
0xcf010000,
0x8aff0088,
0xf61bf488,
0x99f094bd,
0x17008000,
0x0009f602,
0x00f804bd,
/* 0x00ec: wait_doneo */
0x99f094bd,
0x37008000,
0x0009f602,
0x008004bd,
0x0af60206,
/* 0x0103: wait_doneo_e */
0x8804bd00,
0xcf010000,
0x8aff0088,
0xf60bf488,
0x99f094bd,
0x17008000,
0x0009f602,
0x00f804bd,
/* 0x0120: mmctx_size */
/* 0x0122: nv_mmctx_size_loop */
0xe89894bd,
0x1a85b600,
0xb60180b6,
0x98bb0284,
0x04e0b600,
0x1bf4efa4,
0xf89fb2ec,
/* 0x013d: mmctx_xfer */
0xf094bd00,
0x00800199,
0x09f60237,
0xbd04bd00,
0x05bbfd94,
0x800f0bf4,
0xf601c400,
0x04bd000b,
/* 0x015f: mmctx_base_disabled */
0xfd0099f0,
0x0bf405ee,
0xc6008018,
0x000ef601,
0x008004bd,
0x0ff601c7,
0xf004bd00,
/* 0x017a: mmctx_multi_disabled */
0xabc80199,
0x10b4b600,
0xc80cb9f0,
0xe4b601ae,
0x05befd11,
0x01c50080,
0xbd000bf6,
/* 0x0195: mmctx_exec_loop */
/* 0x0195: mmctx_wait_free */
0xc5008e04,
0x00eecf01,
0xf41fe4f0,
0xce98f60b,
0x05e9fd00,
0x01c80080,
0xbd000ef6,
0x04c0b604,
0x1bf4cda4,
0x02abc8df,
/* 0x01bf: mmctx_fini_wait */
0x8b1c1bf4,
0xcf01c500,
0xb4f000bb,
0x10b4b01f,
0x0af31bf4,
0x00b87e05,
0x250ef400,
/* 0x01d8: mmctx_stop */
0xb600abc8,
0xb9f010b4,
0x12b9f00c,
0x01c50080,
0xbd000bf6,
/* 0x01ed: mmctx_stop_wait */
0xc5008b04,
0x00bbcf01,
0xf412bbc8,
/* 0x01fa: mmctx_done */
0x94bdf61b,
0x800199f0,
0xf6021700,
0x04bd0009,
/* 0x020a: strand_wait */
0xa0f900f8,
0xb87e020a,
0xa0fc0000,
/* 0x0216: strand_pre */
0x0c0900f8,
0x024afc80,
0xbd0009f6,
0x020a7e04,
/* 0x0227: strand_post */
0x0900f800,
0x4afc800d,
0x0009f602,
0x0a7e04bd,
0x00f80002,
/* 0x0238: strand_set */
0xfc800f0c,
0x0cf6024f,
0x0c04bd00,
0x4afc800b,
0x000cf602,
0xfc8004bd,
0x0ef6024f,
0x0c04bd00,
0x4afc800a,
0x000cf602,
0x0a7e04bd,
0x00f80002,
/* 0x0268: strand_ctx_init */
0x99f094bd,
0x37008003,
0x0009f602,
0x167e04bd,
0x030e0002,
0x0002387e,
0xfc80c4bd,
0x0cf60247,
0x0c04bd00,
0x4afc8001,
0x000cf602,
0x0a7e04bd,
0x0c920002,
0x46fc8001,
0x000cf602,
0x020c04bd,
0x024afc80,
0xbd000cf6,
0x020a7e04,
0x02277e00,
0x42008800,
0x20008902,
0x0099cf02,
/* 0x02c7: ctx_init_strand_loop */
0xf608fe95,
0x8ef6008e,
0x808acf40,
0xb606a5b6,
0xeabb01a0,
0x0480b600,
0xf40192b6,
0xe4b6e81b,
0xf2efbc08,
0x99f094bd,
0x17008003,
0x0009f602,
0x00f804bd,
/* 0x02f8: error */
0x02050080,
0xbd000ff6,
0x80010f04,
0xf6030700,
0x04bd000f,
/* 0x030e: init */
0x04bd00f8,
0x410007fe,
0x11cf4200,
0x0911e700,
0x0814b601,
0x020014fe,
0x12004002,
0xbd0002f6,
0x05c94104,
0xbd0010fe,
0x07004024,
0xbd0002f6,
0x20034204,
0x01010080,
0xbd0002f6,
0x20044204,
0x01010480,
0xbd0002f6,
0x200b4204,
0x01010880,
0xbd0002f6,
0x200c4204,
0x01011c80,
0xbd0002f6,
0x01039204,
0x03090080,
0xbd0003f6,
0x87044204,
0xf6040040,
0x04bd0002,
0x00400402,
0x0002f603,
0x31f404bd,
0x96048e10,
0x00657e40,
0xc7feb200,
0x01b590f1,
0x1ff4f003,
0x01020fb5,
0x041fbb01,
0x800112b6,
0xf6010300,
0x04bd0001,
0x01040080,
0xbd0001f6,
0x01004104,
0x627e020f,
0x717e0006,
0x100f0006,
0x0006b37e,
0x98000e98,
0x207e010f,
0x14950001,
0xc0008008,
0x0004f601,
0x008004bd,
0x04f601c1,
0xb704bd00,
0xbb130030,
0xf5b6001f,
0xd3008002,
0x000ff601,
0x15b604bd,
0x0110b608,
0xb20814b6,
0x02687e1f,
0x001fbb00,
0x84020398,
/* 0x041f: init_gpc */
0xb8502000,
0x0008044e,
0x8f7e1fb2,
0x4eb80000,
0xbd00010c,
0x008f7ef4,
0x044eb800,
0x8f7e0001,
0x4eb80000,
0x0f000100,
0x008f7e02,
0x004eb800,
/* 0x044e: init_gpc_wait */
0x657e0008,
0xffc80000,
0xf90bf41f,
0x08044eb8,
0x00657e00,
0x001fbb00,
0x800040b7,
0xf40132b6,
0x000fb41b,
0x0006b37e,
0x627e000f,
0x00800006,
0x01f60201,
0xbd04bd00,
0x1f19f014,
0x02300080,
0xbd0001f6,
/* 0x0491: main */
0x0031f404,
0x0d0028f4,
0x00377e10,
0xf401f400,
0x4001e4b1,
0x00c71bf5,
0x99f094bd,
0x37008004,
0x0009f602,
0x008104bd,
0x11cf02c0,
0xc1008200,
0x0022cf02,
0xf41f13c8,
0x23c8770b,
0x550bf41f,
0x12b220f9,
0x99f094bd,
0x37008007,
0x0009f602,
0x32f404bd,
0x0231f401,
0x0008367e,
0x99f094bd,
0x17008007,
0x0009f602,
0x20fc04bd,
0x99f094bd,
0x37008006,
0x0009f602,
0x31f404bd,
0x08367e01,
0xf094bd00,
0x00800699,
0x09f60217,
0xf404bd00,
/* 0x0522: chsw_prev_no_next */
0x20f92f0e,
0x32f412b2,
0x0232f401,
0x0008367e,
0x008020fc,
0x02f602c0,
0xf404bd00,
/* 0x053e: chsw_no_prev */
0x23c8130e,
0x0d0bf41f,
0xf40131f4,
0x367e0232,
/* 0x054e: chsw_done */
0x01020008,
0x02c30080,
0xbd0002f6,
0xf094bd04,
0x00800499,
0x09f60217,
0xf504bd00,
/* 0x056b: main_not_ctx_switch */
0xb0ff2a0e,
0x1bf401e4,
0x7ef2b20c,
0xf40007d6,
/* 0x057a: main_not_ctx_chan */
0xe4b0400e,
0x2c1bf402,
0x99f094bd,
0x37008007,
0x0009f602,
0x32f404bd,
0x0232f401,
0x0008367e,
0x99f094bd,
0x17008007,
0x0009f602,
0x0ef404bd,
/* 0x05a9: main_not_ctx_save */
0x10ef9411,
0x7e01f5f0,
0xf50002f8,
/* 0x05b7: main_done */
0xbdfede0e,
0x1f29f024,
0x02300080,
0xbd0002f6,
0xcc0ef504,
/* 0x05c9: ih */
0xfe80f9fe,
0x80f90188,
0xa0f990f9,
0xd0f9b0f9,
0xf0f9e0f9,
0x004a04bd,
0x00aacf02,
0xf404abc4,
0x100d230b,
0xcf1a004e,
0x004f00ee,
0x00ffcf19,
0x0000047e,
0x0400b0b7,
0x0040010e,
0x000ef61d,
/* 0x060a: ih_no_fifo */
0xabe404bd,
0x0bf40100,
0x4e100d0c,
0x047e4001,
/* 0x061a: ih_no_ctxsw */
0xabe40000,
0x0bf40400,
0x01004b10,
0x448ebfb2,
0x8f7e4001,
/* 0x062e: ih_no_fwmthd */
0x044b0000,
0xffb0bd01,
0x0bf4b4ab,
0x0700800c,
0x000bf603,
/* 0x0642: ih_no_other */
0x004004bd,
0x000af601,
0xf0fc04bd,
0xd0fce0fc,
0xa0fcb0fc,
0x80fc90fc,
0xfc0088fe,
0x0032f480,
/* 0x0662: ctx_4170s */
0xf5f001f8,
0x8effb210,
0x7e404170,
0xf800008f,
/* 0x0671: ctx_4170w */
0x41708e00,
0x00657e40,
0xf0ffb200,
0x1bf410f4,
/* 0x0683: ctx_redswitch */
0x4e00f8f3,
0xe5f00200,
0x20e5f040,
0x8010e5f0,
0xf6018500,
0x04bd000e,
/* 0x069a: ctx_redswitch_delay */
0xf2b6080f,
0xfd1bf401,
0x0400e5f1,
0x0100e5f1,
0x01850080,
0xbd000ef6,
/* 0x06b3: ctx_86c */
0x8000f804,
0xf6022300,
0x04bd000f,
0x148effb2,
0x8f7e408a,
0xffb20000,
0x41a88c8e,
0x00008f7e,
/* 0x06d2: ctx_mem */
0x008000f8,
0x0ff60284,
/* 0x06db: ctx_mem_wait */
0x8f04bd00,
0xcf028400,
0xfffd00ff,
0xf61bf405,
/* 0x06ea: ctx_load */
0x94bd00f8,
0x800599f0,
0xf6023700,
0x04bd0009,
0xb87e0c0a,
0xf4bd0000,
0x02890080,
0xbd000ff6,
0xc1008004,
0x0002f602,
0x008004bd,
0x02f60283,
0x0f04bd00,
0x06d27e07,
0xc0008000,
0x0002f602,
0x0bfe04bd,
0x1f2af000,
0xb60424b6,
0x94bd0220,
0x800899f0,
0xf6023700,
0x04bd0009,
0x02810080,
0xbd0002f6,
0x0000d204,
0x25f08000,
0x88008002,
0x0002f602,
0x100104bd,
0xf0020042,
0x12fa0223,
0xbd03f805,
0x0899f094,
0x02170080,
0xbd0009f6,
0x81019804,
0x981814b6,
0x25b68002,
0x0512fd08,
0xbd1601b5,
0x0999f094,
0x02370080,
0xbd0009f6,
0x81008004,
0x0001f602,
0x010204bd,
0x02880080,
0xbd0002f6,
0x01004104,
0xfa0613f0,
0x03f80501,
0x99f094bd,
0x17008009,
0x0009f602,
0x94bd04bd,
0x800599f0,
0xf6021700,
0x04bd0009,
/* 0x07d6: ctx_chan */
0xea7e00f8,
0x0c0a0006,
0x0000b87e,
0xd27e050f,
0x00f80006,
/* 0x07e8: ctx_mmio_exec */
0x80410398,
0xf6028100,
0x04bd0003,
/* 0x07f6: ctx_mmio_loop */
0x34c434bd,
0x0e1bf4ff,
0xf0020045,
0x35fa0653,
/* 0x0807: ctx_mmio_pull */
0x9803f805,
0x4f98804e,
0x008f7e81,
0x0830b600,
0xf40112b6,
/* 0x081a: ctx_mmio_done */
0x0398df1b,
0x81008016,
0x0003f602,
0x00b504bd,
0x01004140,
0xfa0613f0,
0x03f80601,
/* 0x0836: ctx_xfer */
0x040e00f8,
0x03020080,
0xbd000ef6,
/* 0x0841: ctx_xfer_idle */
0x00008e04,
0x00eecf03,
0x2000e4f1,
0xf4f51bf4,
0x02f40611,
/* 0x0855: ctx_xfer_pre */
0x7e100f0c,
0xf40006b3,
/* 0x085e: ctx_xfer_pre_load */
0x020f1b11,
0x0006627e,
0x0006717e,
0x0006837e,
0x627ef4bd,
0xea7e0006,
/* 0x0876: ctx_xfer_exec */
0x01980006,
0x8024bd16,
0xf6010500,
0x04bd0002,
0x008e1fb2,
0x8f7e41a5,
0xfcf00000,
0x022cf001,
0xfd0124b6,
0xffb205f2,
0x41a5048e,
0x00008f7e,
0x0002167e,
0xfc8024bd,
0x02f60247,
0xf004bd00,
0x20b6012c,
0x4afc8003,
0x0002f602,
0xacf004bd,
0x06a5f001,
0x0c98000b,
0x010d9800,
0x3d7e000e,
0x080a0001,
0x0000ec7e,
0x00020a7e,
0x0a1201f4,
0x00b87e0c,
0x7e050f00,
0xf40006d2,
/* 0x08f2: ctx_xfer_post */
0x020f2d02,
0x0006627e,
0xb37ef4bd,
0x277e0006,
0x717e0002,
0xf4bd0006,
0x0006627e,
0x981011f4,
0x11fd4001,
0x070bf405,
0x0007e87e,
/* 0x091c: ctx_xfer_no_post_mmio */
/* 0x091c: ctx_xfer_done */
0x000000f8,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
drivers/gpu/drm/nouveau/core/engine/graph/gm107.c 0 → 100644
浏览文件 @ 6f1e9b99
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include <subdev/bios.h>
#include <subdev/bios/P0260.h>
#include "nvc0.h"
#include "ctxnvc0.h"
/*******************************************************************************
* Graphics object classes
******************************************************************************/
static struct nouveau_oclass
gm107_graph_sclass[] = {
{ 0x902d, &nouveau_object_ofuncs },
{ 0xa140, &nouveau_object_ofuncs },
{ 0xb097, &nouveau_object_ofuncs },
{ 0xb0c0, &nouveau_object_ofuncs },
{}
};
/*******************************************************************************
* PGRAPH register lists
******************************************************************************/
static const struct nvc0_graph_init
gm107_graph_init_main_0[] = {
{ 0x400080, 1, 0x04, 0x003003c2 },
{ 0x400088, 1, 0x04, 0x0001bfe7 },
{ 0x40008c, 1, 0x04, 0x00060000 },
{ 0x400090, 1, 0x04, 0x00000030 },
{ 0x40013c, 1, 0x04, 0x003901f3 },
{ 0x400140, 1, 0x04, 0x00000100 },
{ 0x400144, 1, 0x04, 0x00000000 },
{ 0x400148, 1, 0x04, 0x00000110 },
{ 0x400138, 1, 0x04, 0x00000000 },
{ 0x400130, 2, 0x04, 0x00000000 },
{ 0x400124, 1, 0x04, 0x00000002 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_ds_0[] = {
{ 0x405844, 1, 0x04, 0x00ffffff },
{ 0x405850, 1, 0x04, 0x00000000 },
{ 0x405900, 1, 0x04, 0x00000000 },
{ 0x405908, 1, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_scc_0[] = {
{ 0x40803c, 1, 0x04, 0x00000010 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_sked_0[] = {
{ 0x407010, 1, 0x04, 0x00000000 },
{ 0x407040, 1, 0x04, 0x40440424 },
{ 0x407048, 1, 0x04, 0x0000000a },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_prop_0[] = {
{ 0x418408, 1, 0x04, 0x00000000 },
{ 0x4184a0, 1, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_setup_1[] = {
{ 0x4188c8, 2, 0x04, 0x00000000 },
{ 0x4188d0, 1, 0x04, 0x00010000 },
{ 0x4188d4, 1, 0x04, 0x00010201 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_zcull_0[] = {
{ 0x418910, 1, 0x04, 0x00010001 },
{ 0x418914, 1, 0x04, 0x00000301 },
{ 0x418918, 1, 0x04, 0x00800000 },
{ 0x418930, 2, 0x04, 0x00000000 },
{ 0x418980, 1, 0x04, 0x77777770 },
{ 0x418984, 3, 0x04, 0x77777777 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_gpc_unk_1[] = {
{ 0x418d00, 1, 0x04, 0x00000000 },
{ 0x418f00, 1, 0x04, 0x00000400 },
{ 0x418f08, 1, 0x04, 0x00000000 },
{ 0x418e08, 1, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_tpccs_0[] = {
{ 0x419dc4, 1, 0x04, 0x00000000 },
{ 0x419dc8, 1, 0x04, 0x00000501 },
{ 0x419dd0, 1, 0x04, 0x00000000 },
{ 0x419dd4, 1, 0x04, 0x00000100 },
{ 0x419dd8, 1, 0x04, 0x00000001 },
{ 0x419ddc, 1, 0x04, 0x00000002 },
{ 0x419de0, 1, 0x04, 0x00000001 },
{ 0x419d0c, 1, 0x04, 0x00000000 },
{ 0x419d10, 1, 0x04, 0x00000014 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_tex_0[] = {
{ 0x419ab0, 1, 0x04, 0x00000000 },
{ 0x419ab8, 1, 0x04, 0x000000e7 },
{ 0x419abc, 1, 0x04, 0x00000000 },
{ 0x419acc, 1, 0x04, 0x000000ff },
{ 0x419ac0, 1, 0x04, 0x00000000 },
{ 0x419aa8, 2, 0x04, 0x00000000 },
{ 0x419ad0, 2, 0x04, 0x00000000 },
{ 0x419ae0, 2, 0x04, 0x00000000 },
{ 0x419af0, 4, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_pe_0[] = {
{ 0x419900, 1, 0x04, 0x000000ff },
{ 0x41980c, 1, 0x04, 0x00000010 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x419838, 1, 0x04, 0x000000ff },
{ 0x419850, 1, 0x04, 0x00000004 },
{ 0x419854, 2, 0x04, 0x00000000 },
{ 0x419894, 3, 0x04, 0x00100401 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_l1c_0[] = {
{ 0x419c98, 1, 0x04, 0x00000000 },
{ 0x419cc0, 2, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_sm_0[] = {
{ 0x419e30, 1, 0x04, 0x000000ff },
{ 0x419e00, 1, 0x04, 0x00000000 },
{ 0x419ea0, 1, 0x04, 0x00000000 },
{ 0x419ee4, 1, 0x04, 0x00000000 },
{ 0x419ea4, 1, 0x04, 0x00000100 },
{ 0x419ea8, 1, 0x04, 0x01000000 },
{ 0x419ee8, 1, 0x04, 0x00000091 },
{ 0x419eb4, 1, 0x04, 0x00000000 },
{ 0x419ebc, 2, 0x04, 0x00000000 },
{ 0x419edc, 1, 0x04, 0x000c1810 },
{ 0x419ed8, 1, 0x04, 0x00000000 },
{ 0x419ee0, 1, 0x04, 0x00000000 },
{ 0x419f74, 1, 0x04, 0x00005155 },
{ 0x419f80, 4, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_l1c_1[] = {
{ 0x419ccc, 2, 0x04, 0x00000000 },
{ 0x419c80, 1, 0x04, 0x3f006022 },
{ 0x419c88, 1, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_pes_0[] = {
{ 0x41be50, 1, 0x04, 0x000000ff },
{ 0x41be04, 1, 0x04, 0x00000000 },
{ 0x41be08, 1, 0x04, 0x00000004 },
{ 0x41be0c, 1, 0x04, 0x00000008 },
{ 0x41be10, 1, 0x04, 0x0e3b8bc7 },
{ 0x41be14, 2, 0x04, 0x00000000 },
{ 0x41be3c, 5, 0x04, 0x00100401 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_wwdx_0[] = {
{ 0x41bfd4, 1, 0x04, 0x00800000 },
{ 0x41bfdc, 1, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_cbm_0[] = {
{ 0x41becc, 1, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_be_0[] = {
{ 0x408890, 1, 0x04, 0x000000ff },
{ 0x40880c, 1, 0x04, 0x00000000 },
{ 0x408850, 1, 0x04, 0x00000004 },
{ 0x408878, 1, 0x04, 0x00c81603 },
{ 0x40887c, 1, 0x04, 0x80543432 },
{ 0x408880, 1, 0x04, 0x0010581e },
{ 0x408884, 1, 0x04, 0x00001205 },
{ 0x408974, 1, 0x04, 0x000000ff },
{ 0x408910, 9, 0x04, 0x00000000 },
{ 0x408950, 1, 0x04, 0x00000000 },
{ 0x408954, 1, 0x04, 0x0000ffff },
{ 0x408958, 1, 0x04, 0x00000034 },
{ 0x40895c, 1, 0x04, 0x8531a003 },
{ 0x408960, 1, 0x04, 0x0561985a },
{ 0x408964, 1, 0x04, 0x04e15c4f },
{ 0x408968, 1, 0x04, 0x02808833 },
{ 0x40896c, 1, 0x04, 0x01f02438 },
{ 0x408970, 1, 0x04, 0x00012c00 },
{ 0x408984, 1, 0x04, 0x00000000 },
{ 0x408988, 1, 0x04, 0x08040201 },
{ 0x40898c, 1, 0x04, 0x80402010 },
{}
};
static const struct nvc0_graph_init
gm107_graph_init_sm_1[] = {
{ 0x419e5c, 1, 0x04, 0x00000000 },
{ 0x419e58, 1, 0x04, 0x00000000 },
{}
};
static const struct nvc0_graph_pack
gm107_graph_pack_mmio[] = {
{ gm107_graph_init_main_0 },
{ nvf0_graph_init_fe_0 },
{ nvc0_graph_init_pri_0 },
{ nvc0_graph_init_rstr2d_0 },
{ nvc0_graph_init_pd_0 },
{ gm107_graph_init_ds_0 },
{ gm107_graph_init_scc_0 },
{ gm107_graph_init_sked_0 },
{ nvf0_graph_init_cwd_0 },
{ gm107_graph_init_prop_0 },
{ nv108_graph_init_gpc_unk_0 },
{ nvc0_graph_init_setup_0 },
{ nvc0_graph_init_crstr_0 },
{ gm107_graph_init_setup_1 },
{ gm107_graph_init_zcull_0 },
{ nvc0_graph_init_gpm_0 },
{ gm107_graph_init_gpc_unk_1 },
{ nvc0_graph_init_gcc_0 },
{ gm107_graph_init_tpccs_0 },
{ gm107_graph_init_tex_0 },
{ gm107_graph_init_pe_0 },
{ gm107_graph_init_l1c_0 },
{ nvc0_graph_init_mpc_0 },
{ gm107_graph_init_sm_0 },
{ gm107_graph_init_l1c_1 },
{ gm107_graph_init_pes_0 },
{ gm107_graph_init_wwdx_0 },
{ gm107_graph_init_cbm_0 },
{ gm107_graph_init_be_0 },
{ gm107_graph_init_sm_1 },
{}
};
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
static void
gm107_graph_init_bios(struct nvc0_graph_priv *priv)
{
static const struct {
u32 ctrl;
u32 data;
} regs[] = {
{ 0x419ed8, 0x419ee0 },
{ 0x419ad0, 0x419ad4 },
{ 0x419ae0, 0x419ae4 },
{ 0x419af0, 0x419af4 },
{ 0x419af8, 0x419afc },
};
struct nouveau_bios *bios = nouveau_bios(priv);
struct nvbios_P0260E infoE;
struct nvbios_P0260X infoX;
int E = -1, X;
u8 ver, hdr;
while (nvbios_P0260Ep(bios, ++E, &ver, &hdr, &infoE)) {
if (X = -1, E < ARRAY_SIZE(regs)) {
nv_wr32(priv, regs[E].ctrl, infoE.data);
while (nvbios_P0260Xp(bios, ++X, &ver, &hdr, &infoX))
nv_wr32(priv, regs[E].data, infoX.data);
}
}
}
int
gm107_graph_init(struct nouveau_object *object)
{
struct nvc0_graph_oclass *oclass = (void *)object->oclass;
struct nvc0_graph_priv *priv = (void *)object;
const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv->tpc_total);
u32 data[TPC_MAX / 8] = {};
u8 tpcnr[GPC_MAX];
int gpc, tpc, ppc, rop;
int ret, i;
ret = nouveau_graph_init(&priv->base);
if (ret)
return ret;
nv_wr32(priv, GPC_BCAST(0x0880), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x0890), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x0894), 0x00000000);
nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8);
nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8);
nvc0_graph_mmio(priv, oclass->mmio);
gm107_graph_init_bios(priv);
nv_wr32(priv, GPC_UNIT(0, 0x3018), 0x00000001);
memset(data, 0x00, sizeof(data));
memcpy(tpcnr, priv->tpc_nr, sizeof(priv->tpc_nr));
for (i = 0, gpc = -1; i < priv->tpc_total; i++) {
do {
gpc = (gpc + 1) % priv->gpc_nr;
} while (!tpcnr[gpc]);
tpc = priv->tpc_nr[gpc] - tpcnr[gpc]--;
data[i / 8] |= tpc << ((i % 8) * 4);
}
nv_wr32(priv, GPC_BCAST(0x0980), data[0]);
nv_wr32(priv, GPC_BCAST(0x0984), data[1]);
nv_wr32(priv, GPC_BCAST(0x0988), data[2]);
nv_wr32(priv, GPC_BCAST(0x098c), data[3]);
for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
nv_wr32(priv, GPC_UNIT(gpc, 0x0914),
priv->magic_not_rop_nr << 8 | priv->tpc_nr[gpc]);
nv_wr32(priv, GPC_UNIT(gpc, 0x0910), 0x00040000 |
priv->tpc_total);
nv_wr32(priv, GPC_UNIT(gpc, 0x0918), magicgpc918);
}
nv_wr32(priv, GPC_BCAST(0x3fd4), magicgpc918);
nv_wr32(priv, GPC_BCAST(0x08ac), nv_rd32(priv, 0x100800));
nv_wr32(priv, 0x400500, 0x00010001);
nv_wr32(priv, 0x400100, 0xffffffff);
nv_wr32(priv, 0x40013c, 0xffffffff);
nv_wr32(priv, 0x400124, 0x00000002);
nv_wr32(priv, 0x409c24, 0x000e0000);
nv_wr32(priv, 0x404000, 0xc0000000);
nv_wr32(priv, 0x404600, 0xc0000000);
nv_wr32(priv, 0x408030, 0xc0000000);
nv_wr32(priv, 0x404490, 0xc0000000);
nv_wr32(priv, 0x406018, 0xc0000000);
nv_wr32(priv, 0x407020, 0x40000000);
nv_wr32(priv, 0x405840, 0xc0000000);
nv_wr32(priv, 0x405844, 0x00ffffff);
nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008);
for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
for (ppc = 0; ppc < 2 /* priv->ppc_nr[gpc] */; ppc++)
nv_wr32(priv, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000);
nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000);
nv_wr32(priv, GPC_UNIT(gpc, 0x0900), 0xc0000000);
nv_wr32(priv, GPC_UNIT(gpc, 0x1028), 0xc0000000);
nv_wr32(priv, GPC_UNIT(gpc, 0x0824), 0xc0000000);
for (tpc = 0; tpc < priv->tpc_nr[gpc]; tpc++) {
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
}
nv_wr32(priv, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
nv_wr32(priv, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
}
for (rop = 0; rop < priv->rop_nr; rop++) {
nv_wr32(priv, ROP_UNIT(rop, 0x144), 0x40000000);
nv_wr32(priv, ROP_UNIT(rop, 0x070), 0x40000000);
nv_wr32(priv, ROP_UNIT(rop, 0x204), 0xffffffff);
nv_wr32(priv, ROP_UNIT(rop, 0x208), 0xffffffff);
}
nv_wr32(priv, 0x400108, 0xffffffff);
nv_wr32(priv, 0x400138, 0xffffffff);
nv_wr32(priv, 0x400118, 0xffffffff);
nv_wr32(priv, 0x400130, 0xffffffff);
nv_wr32(priv, 0x40011c, 0xffffffff);
nv_wr32(priv, 0x400134, 0xffffffff);
nv_wr32(priv, 0x400054, 0x2c350f63);
return nvc0_graph_init_ctxctl(priv);
}
#include "fuc/hubgm107.fuc5.h"
static struct nvc0_graph_ucode
gm107_graph_fecs_ucode = {
.code.data = gm107_grhub_code,
.code.size = sizeof(gm107_grhub_code),
.data.data = gm107_grhub_data,
.data.size = sizeof(gm107_grhub_data),
};
#include "fuc/gpcgm107.fuc5.h"
static struct nvc0_graph_ucode
gm107_graph_gpccs_ucode = {
.code.data = gm107_grgpc_code,
.code.size = sizeof(gm107_grgpc_code),
.data.data = gm107_grgpc_data,
.data.size = sizeof(gm107_grgpc_data),
};
struct nouveau_oclass *
gm107_graph_oclass = &(struct nvc0_graph_oclass) {
.base.handle = NV_ENGINE(GR, 0x07),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_graph_ctor,
.dtor = nvc0_graph_dtor,
.init = gm107_graph_init,
.fini = _nouveau_graph_fini,
},
.cclass = &gm107_grctx_oclass,
.sclass = gm107_graph_sclass,
.mmio = gm107_graph_pack_mmio,
.fecs.ucode = 0 ? &gm107_graph_fecs_ucode : NULL,
.gpccs.ucode = &gm107_graph_gpccs_ucode,
}.base;
drivers/gpu/drm/nouveau/core/engine/graph/nv108.c
浏览文件 @ 6f1e9b99
......@@ -68,7 +68,7 @@ nv108_graph_init_ds_0[] = {
{}
};
static const struct nvc0_graph_init
const struct nvc0_graph_init
nv108_graph_init_gpc_unk_0[] = {
{ 0x418604, 1, 0x04, 0x00000000 },
{ 0x418680, 1, 0x04, 0x00000000 },
......
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
浏览文件 @ 6f1e9b99
......@@ -45,6 +45,7 @@
#define ROP_UNIT(u, r) (0x410000 + (u) * 0x400 + (r))
#define GPC_BCAST(r) (0x418000 + (r))
#define GPC_UNIT(t, r) (0x500000 + (t) * 0x8000 + (r))
#define PPC_UNIT(t, m, r) (0x503000 + (t) * 0x8000 + (m) * 0x200 + (r))
#define TPC_UNIT(t, m, r) (0x504000 + (t) * 0x8000 + (m) * 0x800 + (r))
struct nvc0_graph_data {
......@@ -223,5 +224,7 @@ extern const struct nvc0_graph_init nvf0_graph_init_cwd_0[];
extern const struct nvc0_graph_init nvf0_graph_init_gpc_unk_1[];
extern const struct nvc0_graph_init nvf0_graph_init_sm_0[];
extern const struct nvc0_graph_init nv108_graph_init_gpc_unk_0[];
#endif
drivers/gpu/drm/nouveau/core/include/engine/graph.h
浏览文件 @ 6f1e9b99
......@@ -70,6 +70,7 @@ extern struct nouveau_oclass *nvd9_graph_oclass;
extern struct nouveau_oclass *nve4_graph_oclass;
extern struct nouveau_oclass *nvf0_graph_oclass;
extern struct nouveau_oclass *nv108_graph_oclass;
extern struct nouveau_oclass *gm107_graph_oclass;
extern const struct nouveau_bitfield nv04_graph_nsource[];
extern struct nouveau_ofuncs nv04_graph_ofuncs;
......
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