提交 6dfb36c8 编写于 作者: E Eliad Peller 提交者: Emmanuel Grumbach

iwlwifi: call d3_suspend/resume in d0i3 case as well

Some CSR registers have to be configured also
in case of suspend/resume with unified image
(which doesn't includes reconfiguration flow).

Reuse the existing d3_suspend/d3_resume trans ops,
while making sure some configurations are a bit
different, according to the wowlan type.

After this change, we no longer need the special
wowlan_d0i3 configurations done in iwl_pci_resume,
as they are already being done in the d3_resume op.
Signed-off-by: NEliad Peller <eliad@wizery.com>
Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
上级 cdc306b2
...@@ -1187,6 +1187,9 @@ int iwl_mvm_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan) ...@@ -1187,6 +1187,9 @@ int iwl_mvm_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan)
mutex_lock(&mvm->d0i3_suspend_mutex); mutex_lock(&mvm->d0i3_suspend_mutex);
__set_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags); __set_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags);
mutex_unlock(&mvm->d0i3_suspend_mutex); mutex_unlock(&mvm->d0i3_suspend_mutex);
iwl_trans_d3_suspend(mvm->trans, false);
return 0; return 0;
} }
...@@ -1949,6 +1952,9 @@ static int iwl_mvm_resume_d3(struct iwl_mvm *mvm) ...@@ -1949,6 +1952,9 @@ static int iwl_mvm_resume_d3(struct iwl_mvm *mvm)
static int iwl_mvm_resume_d0i3(struct iwl_mvm *mvm) static int iwl_mvm_resume_d0i3(struct iwl_mvm *mvm)
{ {
bool exit_now; bool exit_now;
enum iwl_d3_status d3_status;
iwl_trans_d3_resume(mvm->trans, &d3_status, false);
/* /*
* make sure to clear D0I3_DEFER_WAKEUP before * make sure to clear D0I3_DEFER_WAKEUP before
......
...@@ -631,17 +631,10 @@ static int iwl_pci_resume(struct device *device) ...@@ -631,17 +631,10 @@ static int iwl_pci_resume(struct device *device)
return 0; return 0;
/* /*
* On suspend, ict is disabled, and the interrupt mask * Enable rfkill interrupt (in order to keep track of
* gets cleared. Reconfigure them both in case of d0i3 * the rfkill status)
* image. Otherwise, only enable rfkill interrupt (in
* order to keep track of the rfkill status)
*/ */
if (trans->wowlan_d0i3) { iwl_enable_rfkill_int(trans);
iwl_pcie_reset_ict(trans);
iwl_enable_interrupts(trans);
} else {
iwl_enable_rfkill_int(trans);
}
hw_rfkill = iwl_is_rfkill_set(trans); hw_rfkill = iwl_is_rfkill_set(trans);
......
...@@ -1189,6 +1189,12 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test) ...@@ -1189,6 +1189,12 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test)
{ {
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
if (trans->wowlan_d0i3) {
/* Enable persistence mode to avoid reset */
iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_PERSIST_MODE);
}
iwl_disable_interrupts(trans); iwl_disable_interrupts(trans);
/* /*
...@@ -1207,12 +1213,14 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test) ...@@ -1207,12 +1213,14 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test)
iwl_clear_bit(trans, CSR_GP_CNTRL, iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_INIT_DONE); CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
/* if (!trans->wowlan_d0i3) {
* reset TX queues -- some of their registers reset during S3 /*
* so if we don't reset everything here the D3 image would try * reset TX queues -- some of their registers reset during S3
* to execute some invalid memory upon resume * so if we don't reset everything here the D3 image would try
*/ * to execute some invalid memory upon resume
iwl_trans_pcie_tx_reset(trans); */
iwl_trans_pcie_tx_reset(trans);
}
iwl_pcie_set_pwr(trans, true); iwl_pcie_set_pwr(trans, true);
} }
...@@ -1254,12 +1262,18 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans, ...@@ -1254,12 +1262,18 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
iwl_pcie_set_pwr(trans, false); iwl_pcie_set_pwr(trans, false);
iwl_trans_pcie_tx_reset(trans); if (trans->wowlan_d0i3) {
iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
} else {
iwl_trans_pcie_tx_reset(trans);
ret = iwl_pcie_rx_init(trans); ret = iwl_pcie_rx_init(trans);
if (ret) { if (ret) {
IWL_ERR(trans, "Failed to resume the device (RX reset)\n"); IWL_ERR(trans,
return ret; "Failed to resume the device (RX reset)\n");
return ret;
}
} }
val = iwl_read32(trans, CSR_RESET); val = iwl_read32(trans, CSR_RESET);
......
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