提交 6d921fa7 编写于 作者: Y Yanling Song 提交者: Zheng Zengkai

net/spnic:Remove unused clp hardware channels

Ramaxel inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I4P01N
CVE: NA

Delete all functions about clp hardware channels
since the driver does not use clp hardware channel.
Signed-off-by: NYanling Song <songyl@ramaxel.com>
Reviewed-by: NYang Gan <yanggan@ramaxel.com>
Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 c8825dd3
......@@ -39,19 +39,6 @@
(SPHW_CFG_REGS_FLAG + 0x0108)
#define SPHW_FUNC_CSR_MAILBOX_RESULT_L_OFF \
(SPHW_CFG_REGS_FLAG + 0x010C)
/*CLP registers*/
#define SPHW_BAR3_CLP_BASE_ADDR (SPHW_MGMT_REGS_FLAG + 0x0000)
#define SPHW_UCPU_CLP_SIZE_REG (SPHW_HOST_CSR_BASE_ADDR + 0x40)
#define SPHW_UCPU_CLP_REQBASE_REG (SPHW_HOST_CSR_BASE_ADDR + 0x44)
#define SPHW_UCPU_CLP_RSPBASE_REG (SPHW_HOST_CSR_BASE_ADDR + 0x48)
#define SPHW_UCPU_CLP_REQ_REG (SPHW_HOST_CSR_BASE_ADDR + 0x4c)
#define SPHW_UCPU_CLP_RSP_REG (SPHW_HOST_CSR_BASE_ADDR + 0x50)
#define SPHW_CLP_REG(member) (SPHW_UCPU_CLP_##member##_REG)
#define SPHW_CLP_REQ_DATA SPHW_BAR3_CLP_BASE_ADDR
#define SPHW_CLP_RSP_DATA (SPHW_BAR3_CLP_BASE_ADDR + 0x1000)
#define SPHW_CLP_DATA(member) (SPHW_CLP_##member##_DATA)
#define SPHW_PPF_ELECTION_OFFSET 0x0
#define SPHW_MPF_ELECTION_OFFSET 0x20
......
......@@ -482,8 +482,6 @@ int sphw_mbox_to_pf(void *hwdev, u8 mod, u16 cmd, void *buf_in, u16 in_size, voi
int sphw_mbox_to_vf(void *hwdev, u16 vf_id, u8 mod, u16 cmd, void *buf_in,
u16 in_size, void *buf_out, u16 *out_size, u32 timeout, u16 channel);
int sphw_clp_to_mgmt(void *hwdev, u8 mod, u16 cmd, const void *buf_in,
u16 in_size, void *buf_out, u16 *out_size);
/**
* @brief sphw_cmdq_async - cmdq asynchronous message
* @param hwdev: device pointer to hwdev
......
......@@ -455,28 +455,6 @@ static int init_ceqs_msix_attr(struct sphw_hwdev *hwdev)
return 0;
}
static int sphw_comm_clp_to_mgmt_init(struct sphw_hwdev *hwdev)
{
int err;
if (sphw_func_type(hwdev) == TYPE_VF)
return 0;
err = sphw_clp_pf_to_mgmt_init(hwdev);
if (err)
return err;
return 0;
}
static void sphw_comm_clp_to_mgmt_free(struct sphw_hwdev *hwdev)
{
if (sphw_func_type(hwdev) == TYPE_VF)
return;
sphw_clp_pf_to_mgmt_free(hwdev);
}
static int sphw_comm_aeqs_init(struct sphw_hwdev *hwdev)
{
struct irq_info aeq_irqs[SPHW_MAX_AEQS] = {{0} };
......@@ -777,15 +755,8 @@ static int init_pf_mgmt_channel(struct sphw_hwdev *hwdev)
{
int err;
err = sphw_comm_clp_to_mgmt_init(hwdev);
if (err) {
sdk_err(hwdev->dev_hdl, "Failed to init clp\n");
return err;
}
err = sphw_comm_pf_to_mgmt_init(hwdev);
if (err) {
sphw_comm_clp_to_mgmt_free(hwdev);
sdk_err(hwdev->dev_hdl, "Failed to init pf to mgmt\n");
return err;
}
......@@ -795,7 +766,6 @@ static int init_pf_mgmt_channel(struct sphw_hwdev *hwdev)
static void free_pf_mgmt_channel(struct sphw_hwdev *hwdev)
{
sphw_comm_clp_to_mgmt_free(hwdev);
sphw_comm_pf_to_mgmt_free(hwdev);
}
......
......@@ -55,7 +55,6 @@ struct sphw_hwdev {
struct sphw_ceqs *ceqs;
struct sphw_mbox *func_to_func;
struct sphw_msg_pf_to_mgmt *pf_to_mgmt;
struct sphw_clp_pf_to_mgmt *clp_pf_to_mgmt;
void *cqm_hdl;
struct mqm_addr_trans_tbl_info mqm_att;
......
......@@ -174,28 +174,6 @@ static void prepare_header(struct sphw_msg_pf_to_mgmt *pf_to_mgmt,
SPHW_MSG_HEADER_SET(msg_id, MSG_ID);
}
static void clp_prepare_header(struct sphw_hwdev *hwdev, u64 *header,
u16 msg_len, u8 mod,
enum sphw_msg_ack_type ack_type,
enum sphw_msg_direction_type direction,
enum sphw_mgmt_cmd cmd, u32 msg_id)
{
struct sphw_hwif *hwif = hwdev->hwif;
*header = SPHW_MSG_HEADER_SET(msg_len, MSG_LEN) |
SPHW_MSG_HEADER_SET(mod, MODULE) |
SPHW_MSG_HEADER_SET(msg_len, SEG_LEN) |
SPHW_MSG_HEADER_SET(ack_type, NO_ACK) |
SPHW_MSG_HEADER_SET(SPHW_DATA_INLINE, DATA_TYPE) |
SPHW_MSG_HEADER_SET(0, SEQID) |
SPHW_MSG_HEADER_SET(SPHW_API_CHAIN_AEQ_ID, AEQ_ID) |
SPHW_MSG_HEADER_SET(LAST_SEGMENT, LAST) |
SPHW_MSG_HEADER_SET(direction, DIRECTION) |
SPHW_MSG_HEADER_SET(cmd, CMD) |
SPHW_MSG_HEADER_SET(hwif->attr.func_global_idx, SRC_GLB_FUNC_IDX) |
SPHW_MSG_HEADER_SET(msg_id, MSG_ID);
}
/**
* prepare_mgmt_cmd - prepare the mgmt command
* @mgmt_cmd: pointer to the command to prepare
......@@ -515,8 +493,6 @@ static void mgmt_recv_msg_handler(struct sphw_msg_pf_to_mgmt *pf_to_mgmt,
goto resp;
}
/* TO DO some message need to ack first*/
pf_to_mgmt->recv_mgmt_msg_cb[tmp_mod](pf_to_mgmt->hwdev,
pf_to_mgmt->recv_mgmt_msg_data[tmp_mod],
cmd, buf_in, in_size, buf_out, &out_size);
......@@ -917,466 +893,3 @@ int sphw_api_cmd_write_nack(void *hwdev, u8 dest, const void *cmd, u16 size)
return sphw_api_cmd_write(chain, dest, cmd, size);
}
static int get_clp_reg(void *hwdev, enum clp_data_type data_type,
enum clp_reg_type reg_type, u32 *reg_addr)
{
struct sphw_hwdev *dev = hwdev;
u32 offset;
offset = SPHW_CLP_REG_GAP * sphw_pcie_itf_id(dev);
switch (reg_type) {
case SPHW_CLP_BA_HOST:
*reg_addr = (data_type == SPHW_CLP_REQ_HOST) ?
SPHW_CLP_REG(REQBASE) :
SPHW_CLP_REG(RSPBASE);
break;
case SPHW_CLP_SIZE_HOST:
*reg_addr = SPHW_CLP_REG(SIZE);
break;
case SPHW_CLP_LEN_HOST:
*reg_addr = (data_type == SPHW_CLP_REQ_HOST) ?
SPHW_CLP_REG(REQ) : SPHW_CLP_REG(RSP);
break;
case SPHW_CLP_START_REQ_HOST:
*reg_addr = SPHW_CLP_REG(REQ);
break;
case SPHW_CLP_READY_RSP_HOST:
*reg_addr = SPHW_CLP_REG(RSP);
break;
default:
*reg_addr = 0;
break;
}
if (*reg_addr == 0)
return -EINVAL;
*reg_addr += offset;
return 0;
}
static inline int clp_param_valid(struct sphw_hwdev *hwdev,
enum clp_data_type data_type,
enum clp_reg_type reg_type)
{
if (data_type == SPHW_CLP_REQ_HOST &&
reg_type == SPHW_CLP_READY_RSP_HOST)
return -EINVAL;
if (data_type == SPHW_CLP_RSP_HOST &&
reg_type == SPHW_CLP_START_REQ_HOST)
return -EINVAL;
return 0;
}
static u32 get_clp_reg_value(struct sphw_hwdev *hwdev,
enum clp_data_type data_type,
enum clp_reg_type reg_type, u32 reg_addr)
{
u32 value;
value = sphw_hwif_read_reg(hwdev->hwif, reg_addr);
switch (reg_type) {
case SPHW_CLP_BA_HOST:
value = ((value >> SPHW_CLP_OFFSET(BASE)) &
SPHW_CLP_MASK(BASE));
break;
case SPHW_CLP_SIZE_HOST:
if (data_type == SPHW_CLP_REQ_HOST)
value = ((value >> SPHW_CLP_OFFSET(REQ_SIZE)) &
SPHW_CLP_MASK(SIZE));
else
value = ((value >> SPHW_CLP_OFFSET(RSP_SIZE)) &
SPHW_CLP_MASK(SIZE));
break;
case SPHW_CLP_LEN_HOST:
value = ((value >> SPHW_CLP_OFFSET(LEN)) &
SPHW_CLP_MASK(LEN));
break;
case SPHW_CLP_START_REQ_HOST:
value = ((value >> SPHW_CLP_OFFSET(START)) &
SPHW_CLP_MASK(START));
break;
case SPHW_CLP_READY_RSP_HOST:
value = ((value >> SPHW_CLP_OFFSET(READY)) &
SPHW_CLP_MASK(READY));
break;
default:
break;
}
return value;
}
static int sphw_read_clp_reg(struct sphw_hwdev *hwdev, enum clp_data_type data_type,
enum clp_reg_type reg_type, u32 *read_value)
{
u32 reg_addr;
int err;
err = clp_param_valid(hwdev, data_type, reg_type);
if (err)
return err;
err = get_clp_reg(hwdev, data_type, reg_type, &reg_addr);
if (err)
return err;
*read_value = get_clp_reg_value(hwdev, data_type, reg_type, reg_addr);
return 0;
}
static int check_data_type(enum clp_data_type data_type, enum clp_reg_type reg_type)
{
if (data_type == SPHW_CLP_REQ_HOST &&
reg_type == SPHW_CLP_READY_RSP_HOST)
return -EINVAL;
if (data_type == SPHW_CLP_RSP_HOST &&
reg_type == SPHW_CLP_START_REQ_HOST)
return -EINVAL;
return 0;
}
static int check_reg_value(enum clp_reg_type reg_type, u32 value)
{
if (reg_type == SPHW_CLP_BA_HOST &&
value > SPHW_CLP_SRAM_BASE_REG_MAX)
return -EINVAL;
if (reg_type == SPHW_CLP_SIZE_HOST &&
value > SPHW_CLP_SRAM_SIZE_REG_MAX)
return -EINVAL;
if (reg_type == SPHW_CLP_LEN_HOST &&
value > SPHW_CLP_LEN_REG_MAX)
return -EINVAL;
if ((reg_type == SPHW_CLP_START_REQ_HOST ||
reg_type == SPHW_CLP_READY_RSP_HOST) &&
value > SPHW_CLP_START_OR_READY_REG_MAX)
return -EINVAL;
return 0;
}
static int sphw_check_clp_init_status(struct sphw_hwdev *hwdev)
{
int err;
u32 reg_value = 0;
err = sphw_read_clp_reg(hwdev, SPHW_CLP_REQ_HOST, SPHW_CLP_BA_HOST, &reg_value);
if (err || !reg_value) {
sdk_err(hwdev->dev_hdl, "Wrong req ba value: 0x%x\n",
reg_value);
return -EINVAL;
}
err = sphw_read_clp_reg(hwdev, SPHW_CLP_RSP_HOST, SPHW_CLP_BA_HOST, &reg_value);
if (err || !reg_value) {
sdk_err(hwdev->dev_hdl, "Wrong rsp ba value: 0x%x\n",
reg_value);
return -EINVAL;
}
err = sphw_read_clp_reg(hwdev, SPHW_CLP_REQ_HOST, SPHW_CLP_SIZE_HOST, &reg_value);
if (err || !reg_value) {
sdk_err(hwdev->dev_hdl, "Wrong req size\n");
return -EINVAL;
}
err = sphw_read_clp_reg(hwdev, SPHW_CLP_RSP_HOST, SPHW_CLP_SIZE_HOST, &reg_value);
if (err || !reg_value) {
sdk_err(hwdev->dev_hdl, "Wrong rsp size\n");
return -EINVAL;
}
return 0;
}
static void sphw_write_clp_reg(struct sphw_hwdev *hwdev, enum clp_data_type data_type,
enum clp_reg_type reg_type, u32 value)
{
u32 reg_addr, reg_value;
if (check_data_type(data_type, reg_type))
return;
if (check_reg_value(reg_type, value))
return;
if (get_clp_reg(hwdev, data_type, reg_type, &reg_addr))
return;
reg_value = sphw_hwif_read_reg(hwdev->hwif, reg_addr);
switch (reg_type) {
case SPHW_CLP_LEN_HOST:
reg_value = reg_value &
(~(SPHW_CLP_MASK(LEN) << SPHW_CLP_OFFSET(LEN)));
reg_value = reg_value | (value << SPHW_CLP_OFFSET(LEN));
break;
case SPHW_CLP_START_REQ_HOST:
reg_value = reg_value &
(~(SPHW_CLP_MASK(START) <<
SPHW_CLP_OFFSET(START)));
reg_value = reg_value | (value << SPHW_CLP_OFFSET(START));
break;
case SPHW_CLP_READY_RSP_HOST:
reg_value = reg_value &
(~(SPHW_CLP_MASK(READY) <<
SPHW_CLP_OFFSET(READY)));
reg_value = reg_value | (value << SPHW_CLP_OFFSET(READY));
break;
default:
return;
}
sphw_hwif_write_reg(hwdev->hwif, reg_addr, reg_value);
}
static int sphw_read_clp_data(struct sphw_hwdev *hwdev, void *buf_out, u16 *out_size)
{
int err;
u32 reg = SPHW_CLP_DATA(RSP);
u32 ready, delay_cnt;
u32 *ptr = (u32 *)buf_out;
u32 temp_out_size = 0;
err = sphw_read_clp_reg(hwdev, SPHW_CLP_RSP_HOST, SPHW_CLP_READY_RSP_HOST, &ready);
if (err)
return err;
delay_cnt = 0;
while (ready == 0) {
usleep_range(9000, 10000);
delay_cnt++;
err = sphw_read_clp_reg(hwdev, SPHW_CLP_RSP_HOST, SPHW_CLP_READY_RSP_HOST, &ready);
if (err || delay_cnt > SPHW_CLP_DELAY_CNT_MAX) {
sdk_err(hwdev->dev_hdl, "Timeout with delay_cnt: %u\n",
delay_cnt);
return -EINVAL;
}
}
err = sphw_read_clp_reg(hwdev, SPHW_CLP_RSP_HOST, SPHW_CLP_LEN_HOST, &temp_out_size);
if (err)
return err;
if (temp_out_size > SPHW_CLP_SRAM_SIZE_REG_MAX || !temp_out_size) {
sdk_err(hwdev->dev_hdl, "Invalid temp_out_size: %u\n",
temp_out_size);
return -EINVAL;
}
*out_size = (u16)temp_out_size;
for (; temp_out_size > 0; temp_out_size--) {
*ptr = sphw_hwif_read_reg(hwdev->hwif, reg);
ptr++;
/* read 4 bytes every time */
reg = reg + 4;
}
sphw_write_clp_reg(hwdev, SPHW_CLP_RSP_HOST, SPHW_CLP_READY_RSP_HOST, (u32)0x0);
sphw_write_clp_reg(hwdev, SPHW_CLP_RSP_HOST, SPHW_CLP_LEN_HOST, (u32)0x0);
return 0;
}
static int sphw_write_clp_data(struct sphw_hwdev *hwdev, void *buf_in, u16 in_size)
{
int err;
u32 reg = SPHW_CLP_DATA(REQ);
u32 start = 1;
u32 delay_cnt = 0;
u32 *ptr = (u32 *)buf_in;
err = sphw_read_clp_reg(hwdev, SPHW_CLP_REQ_HOST, SPHW_CLP_START_REQ_HOST, &start);
if (err)
return err;
while (start == 1) {
usleep_range(9000, 10000);
delay_cnt++;
err = sphw_read_clp_reg(hwdev, SPHW_CLP_REQ_HOST, SPHW_CLP_START_REQ_HOST, &start);
if (err || delay_cnt > SPHW_CLP_DELAY_CNT_MAX)
return -EINVAL;
}
sphw_write_clp_reg(hwdev, SPHW_CLP_REQ_HOST, SPHW_CLP_LEN_HOST, in_size);
sphw_write_clp_reg(hwdev, SPHW_CLP_REQ_HOST, SPHW_CLP_START_REQ_HOST, (u32)0x1);
for (; in_size > 0; in_size--) {
sphw_hwif_write_reg(hwdev->hwif, reg, *ptr);
ptr++;
reg = reg + 4;
}
return 0;
}
static void sphw_clear_clp_data(struct sphw_hwdev *hwdev, enum clp_data_type data_type)
{
u32 reg = (data_type == SPHW_CLP_REQ_HOST) ?
SPHW_CLP_DATA(REQ) : SPHW_CLP_DATA(RSP);
u32 count = SPHW_CLP_INPUT_BUF_LEN_HOST / SPHW_CLP_DATA_UNIT_HOST;
for (; count > 0; count--) {
sphw_hwif_write_reg(hwdev->hwif, reg, 0x0);
reg = reg + 4;
}
}
int sphw_pf_clp_to_mgmt(void *hwdev, u8 mod, u16 cmd, const void *buf_in,
u16 in_size, void *buf_out, u16 *out_size)
{
struct sphw_clp_pf_to_mgmt *clp_pf_to_mgmt;
struct sphw_hwdev *dev = hwdev;
u64 header;
u16 real_size;
u8 *clp_msg_buf;
int err;
clp_pf_to_mgmt = ((struct sphw_hwdev *)hwdev)->clp_pf_to_mgmt;
clp_msg_buf = clp_pf_to_mgmt->clp_msg_buf;
/* 4 bytes alignment */
if (in_size % SPHW_CLP_DATA_UNIT_HOST)
real_size = (in_size + (u16)sizeof(header) + SPHW_CLP_DATA_UNIT_HOST);
else
real_size = in_size + (u16)sizeof(header);
real_size = real_size / SPHW_CLP_DATA_UNIT_HOST;
if (real_size > (SPHW_CLP_INPUT_BUF_LEN_HOST / SPHW_CLP_DATA_UNIT_HOST)) {
sdk_err(dev->dev_hdl, "Invalid real_size: %u\n", real_size);
return -EINVAL;
}
down(&clp_pf_to_mgmt->clp_msg_lock);
err = sphw_check_clp_init_status(dev);
if (err) {
sdk_err(dev->dev_hdl, "Check clp init status failed\n");
up(&clp_pf_to_mgmt->clp_msg_lock);
return err;
}
sphw_clear_clp_data(dev, SPHW_CLP_RSP_HOST);
sphw_write_clp_reg(dev, SPHW_CLP_RSP_HOST, SPHW_CLP_READY_RSP_HOST, 0x0);
/* Send request */
memset(clp_msg_buf, 0x0, SPHW_CLP_INPUT_BUF_LEN_HOST);
clp_prepare_header(dev, &header, in_size, mod, 0, 0, cmd, 0);
memcpy(clp_msg_buf, &header, sizeof(header));
clp_msg_buf += sizeof(header);
memcpy(clp_msg_buf, buf_in, in_size);
clp_msg_buf = clp_pf_to_mgmt->clp_msg_buf;
sphw_clear_clp_data(dev, SPHW_CLP_REQ_HOST);
err = sphw_write_clp_data(hwdev, clp_pf_to_mgmt->clp_msg_buf, real_size);
if (err) {
sdk_err(dev->dev_hdl, "Send clp request failed\n");
up(&clp_pf_to_mgmt->clp_msg_lock);
return -EINVAL;
}
/* Get response */
clp_msg_buf = clp_pf_to_mgmt->clp_msg_buf;
memset(clp_msg_buf, 0x0, SPHW_CLP_INPUT_BUF_LEN_HOST);
err = sphw_read_clp_data(hwdev, clp_msg_buf, &real_size);
sphw_clear_clp_data(dev, SPHW_CLP_RSP_HOST);
if (err) {
sdk_err(dev->dev_hdl, "Read clp response failed\n");
up(&clp_pf_to_mgmt->clp_msg_lock);
return -EINVAL;
}
real_size = (u16)((real_size * SPHW_CLP_DATA_UNIT_HOST) & 0xffff);
if (real_size <= sizeof(header) || real_size > SPHW_CLP_INPUT_BUF_LEN_HOST) {
sdk_err(dev->dev_hdl, "Invalid response size: %u", real_size);
up(&clp_pf_to_mgmt->clp_msg_lock);
return -EINVAL;
}
real_size = real_size - sizeof(header);
if (real_size != *out_size) {
sdk_err(dev->dev_hdl, "Invalid real_size:%u, out_size: %u\n",
real_size, *out_size);
up(&clp_pf_to_mgmt->clp_msg_lock);
return -EINVAL;
}
memcpy(buf_out, (clp_msg_buf + sizeof(header)), real_size);
up(&clp_pf_to_mgmt->clp_msg_lock);
return 0;
}
int sphw_clp_to_mgmt(void *hwdev, u8 mod, u16 cmd, const void *buf_in,
u16 in_size, void *buf_out, u16 *out_size)
{
struct sphw_hwdev *dev = hwdev;
int err;
if (!dev)
return -EINVAL;
if (!dev->chip_present_flag)
return -EPERM;
if (sphw_func_type(hwdev) == TYPE_VF)
return -EINVAL;
err = sphw_pf_clp_to_mgmt(dev, mod, cmd, buf_in, in_size, buf_out,
out_size);
return err;
}
int sphw_clp_pf_to_mgmt_init(struct sphw_hwdev *hwdev)
{
struct sphw_clp_pf_to_mgmt *clp_pf_to_mgmt;
clp_pf_to_mgmt = kzalloc(sizeof(*clp_pf_to_mgmt), GFP_KERNEL);
if (!clp_pf_to_mgmt)
return -ENOMEM;
clp_pf_to_mgmt->clp_msg_buf = kzalloc(SPHW_CLP_INPUT_BUF_LEN_HOST,
GFP_KERNEL);
if (!clp_pf_to_mgmt->clp_msg_buf) {
kfree(clp_pf_to_mgmt);
return -ENOMEM;
}
sema_init(&clp_pf_to_mgmt->clp_msg_lock, 1);
hwdev->clp_pf_to_mgmt = clp_pf_to_mgmt;
return 0;
}
void sphw_clp_pf_to_mgmt_free(struct sphw_hwdev *hwdev)
{
struct sphw_clp_pf_to_mgmt *clp_pf_to_mgmt = hwdev->clp_pf_to_mgmt;
kfree(clp_pf_to_mgmt->clp_msg_buf);
kfree(clp_pf_to_mgmt);
}
......@@ -6,44 +6,6 @@
#define SPHW_MGMT_WQ_NAME "sphw_mgmt"
#define SPHW_CLP_REG_GAP 0x20
#define SPHW_CLP_INPUT_BUF_LEN_HOST 4096UL
#define SPHW_CLP_DATA_UNIT_HOST 4UL
enum clp_data_type {
SPHW_CLP_REQ_HOST = 0,
SPHW_CLP_RSP_HOST = 1
};
enum clp_reg_type {
SPHW_CLP_BA_HOST = 0,
SPHW_CLP_SIZE_HOST = 1,
SPHW_CLP_LEN_HOST = 2,
SPHW_CLP_START_REQ_HOST = 3,
SPHW_CLP_READY_RSP_HOST = 4
};
#define SPHW_CLP_REQ_SIZE_OFFSET 0
#define SPHW_CLP_RSP_SIZE_OFFSET 16
#define SPHW_CLP_BASE_OFFSET 0
#define SPHW_CLP_LEN_OFFSET 0
#define SPHW_CLP_START_OFFSET 31
#define SPHW_CLP_READY_OFFSET 31
#define SPHW_CLP_OFFSET(member) (SPHW_CLP_##member##_OFFSET)
#define SPHW_CLP_SIZE_MASK 0x7ffUL
#define SPHW_CLP_BASE_MASK 0x7ffffffUL
#define SPHW_CLP_LEN_MASK 0x7ffUL
#define SPHW_CLP_START_MASK 0x1UL
#define SPHW_CLP_READY_MASK 0x1UL
#define SPHW_CLP_MASK(member) (SPHW_CLP_##member##_MASK)
#define SPHW_CLP_DELAY_CNT_MAX 200UL
#define SPHW_CLP_SRAM_SIZE_REG_MAX 0x3ff
#define SPHW_CLP_SRAM_BASE_REG_MAX 0x7ffffff
#define SPHW_CLP_LEN_REG_MAX 0x3ff
#define SPHW_CLP_START_OR_READY_REG_MAX 0x1
struct sphw_recv_msg {
void *msg;
......@@ -78,11 +40,6 @@ enum sphw_mgmt_msg_cb_state {
SPHW_MGMT_MSG_CB_RUNNING,
};
struct sphw_clp_pf_to_mgmt {
struct semaphore clp_msg_lock;
void *clp_msg_buf;
};
struct sphw_msg_pf_to_mgmt {
struct sphw_hwdev *hwdev;
......@@ -146,11 +103,4 @@ int sphw_api_cmd_read_ack(void *hwdev, u8 dest, const void *cmd, u16 size,
int sphw_api_cmd_write_nack(void *hwdev, u8 dest, const void *cmd, u16 size);
int sphw_pf_clp_to_mgmt(void *hwdev, u8 mod, u16 cmd, const void *buf_in,
u16 in_size, void *buf_out, u16 *out_size);
int sphw_clp_pf_to_mgmt_init(struct sphw_hwdev *hwdev);
void sphw_clp_pf_to_mgmt_free(struct sphw_hwdev *hwdev);
#endif
......@@ -461,7 +461,6 @@ enum mt_api_type {
API_TYPE_MBOX = 1,
API_TYPE_API_CHAIN_BYPASS,
API_TYPE_API_CHAIN_TO_MPU,
API_TYPE_CLP,
};
struct npu_cmd_st {
......
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