tty: serial: uartlite: Disable clocks in case of errors
mainline inclusion from mainline-v5.15-rc1 commit ed623dff category: bugfix bugzilla: 187303, https://gitee.com/openeuler/kernel/issues/I5ZXV2 CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=ed623dffdeebcc0acac7be6af4a301ee7169cd21 ------------------------------- In case the uart registration fails the clocks are left enabled. Disable the clock in case of errors. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/20210713064835.27978-2-shubhrajyoti.datta@xilinx.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NCai Xinchen <caixinchen1@huawei.com> Reviewed-by: NGONG Ruiqi <gongruiqi1@huawei.com> Reviewed-by: NWang Weiyang <wangweiyang2@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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