提交 6cdeddcc 编写于 作者: A Amit Daniel Kachhap 提交者: Kukjin Kim

ARM: EXYNOS: Enable l2 configuration through device tree

This patch enables calling generic l2 setup functions if device tree is used.
Signed-off-by: NAmit Daniel Kachhap <amit.kachhap@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
上级 d0341c61
...@@ -47,6 +47,8 @@ ...@@ -47,6 +47,8 @@
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
#include "common.h" #include "common.h"
#define L2_AUX_VAL 0x7C470001
#define L2_AUX_MASK 0xC200ffff
static const char name_exynos4210[] = "EXYNOS4210"; static const char name_exynos4210[] = "EXYNOS4210";
static const char name_exynos4212[] = "EXYNOS4212"; static const char name_exynos4212[] = "EXYNOS4212";
...@@ -443,6 +445,14 @@ core_initcall(exynos4_core_init); ...@@ -443,6 +445,14 @@ core_initcall(exynos4_core_init);
#ifdef CONFIG_CACHE_L2X0 #ifdef CONFIG_CACHE_L2X0
static int __init exynos4_l2x0_cache_init(void) static int __init exynos4_l2x0_cache_init(void)
{ {
int ret;
ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
if (!ret) {
l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
return 0;
}
if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) { if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) {
l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC; l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC;
/* TAG, Data Latency Control: 2 cycles */ /* TAG, Data Latency Control: 2 cycles */
...@@ -476,8 +486,7 @@ static int __init exynos4_l2x0_cache_init(void) ...@@ -476,8 +486,7 @@ static int __init exynos4_l2x0_cache_init(void)
clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs)); clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs));
} }
l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK);
return 0; return 0;
} }
......
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