提交 6c12e3e1 编写于 作者: V Vidya Sagar 提交者: Bjorn Helgaas

PCI: tegra194: Clear bandwidth management status

In the event of a bandwidth management interrupt, clear the bandwidth
management status in the configuration space also along with clearing
corresponding status in the application logic register to avoid slew
of interrupts.

Link: https://lore.kernel.org/r/20220721142052.25971-12-vidyas@nvidia.comSigned-off-by: NVidya Sagar <vidyas@nvidia.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
上级 6646e99b
...@@ -370,6 +370,12 @@ static irqreturn_t tegra_pcie_rp_irq_handler(int irq, void *arg) ...@@ -370,6 +370,12 @@ static irqreturn_t tegra_pcie_rp_irq_handler(int irq, void *arg)
apply_bad_link_workaround(pp); apply_bad_link_workaround(pp);
} }
if (status_l1 & APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS) { if (status_l1 & APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS) {
val_w = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +
PCI_EXP_LNKSTA);
val_w |= PCI_EXP_LNKSTA_LBMS;
dw_pcie_writew_dbi(pci, pcie->pcie_cap_base +
PCI_EXP_LNKSTA, val_w);
appl_writel(pcie, appl_writel(pcie,
APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS, APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS,
APPL_INTR_STATUS_L1_8_0); APPL_INTR_STATUS_L1_8_0);
......
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