arm64: Expose a __check_override primitive for oddball features

In order to feal with early override of features that are not
classically encoded in a standard ID register with a 4 bit wide
field, add a primitive that takes a sysreg value as an input
(instead of the usual sysreg name) as well as a bit field
width (usually 4).

No functional change.
Signed-off-by: NMarc Zyngier <maz@kernel.org>
Reviewed-by: NMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220630160500.1536744-7-maz@kernel.orgSigned-off-by: NWill Deacon <will@kernel.org>

arch/arm64/kernel/hyp-stub.S

@@ -17,17 +17,17 @@
 #include <asm/virt.h>
 
 // Warning, hardcoded register allocation
-// This will clobber x1 and x2.
-.macro check_override idreg, fld, pass, fail
-	mrs	x1, \idreg\()_el1
-	ubfx	x1, x1, #\fld, #4
+// This will clobber x1 and x2, and expect x1 to contain
+// the id register value as read from the HW
+.macro __check_override idreg, fld, width, pass, fail
+	ubfx	x1, x1, #\fld, #\width
 	cbz	x1, \fail
 
 	adr_l	x1, \idreg\()_override
 	ldr	x2, [x1, FTR_OVR_VAL_OFFSET]
 	ldr	x1, [x1, FTR_OVR_MASK_OFFSET]
-	ubfx	x2, x2, #\fld, #4
-	ubfx	x1, x1, #\fld, #4
+	ubfx	x2, x2, #\fld, #\width
+	ubfx	x1, x1, #\fld, #\width
 	cmp	x1, xzr
 	and	x2, x2, x1
 	csinv	x2, x2, xzr, ne
@@ -35,6 +35,11 @@
 	b	\fail
 .endm
 
+.macro check_override idreg, fld, pass, fail
+	mrs	x1, \idreg\()_el1
+	__check_override \idreg \fld 4 \pass \fail
+.endm
+
 	.text
 	.pushsection	.hyp.text, "ax"