perf/marvell: cn10k DDR perf event core ownership
As DDR perf event counters are not per core, so they should be accessed only by one core at a time. Select new core when previously owning core is going offline. Signed-off-by: NBharat Bhushan <bbhushan2@marvell.com> Reviewed-by: NBhaskara Budiredla <bbudiredla@marvell.com> Link: https://lore.kernel.org/r/20220211045346.17894-5-bbhushan2@marvell.comSigned-off-by: NWill Deacon <will@kernel.org>
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