提交 64cf0fac 编写于 作者: M Maxim Levitsky 提交者: Yang Yingliang

KVM: nSVM: avoid picking up unsupported bits from L2 in int_ctl (CVE-2021-3653)

stable inclusion
from linux-4.19.205
commit 42f4312c0e8a225b5f1e3ed029509ef514f2157a
CVE: CVE-2021-3653

--------------------------------

[ upstream commit 0f923e07 ]

* Invert the mask of bits that we pick from L2 in
  nested_vmcb02_prepare_control

* Invert and explicitly use VIRQ related bits bitmask in svm_clear_vintr

This fixes a security issue that allowed a malicious L1 to run L2 with
AVIC enabled, which allowed the L2 to exploit the uninitialized and enabled
AVIC to read/write the host physical memory at some offsets.

Fixes: 3d6368ef ("KVM: SVM: Add VMRUN handler")
Signed-off-by: NMaxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
Reviewed-by: NXiu Jianfeng <xiujianfeng@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
上级 d8b96c54
......@@ -118,6 +118,8 @@ struct __attribute__ ((__packed__)) vmcb_control_area {
#define V_IGN_TPR_SHIFT 20
#define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)
#define V_IRQ_INJECTION_BITS_MASK (V_IRQ_MASK | V_INTR_PRIO_MASK | V_IGN_TPR_MASK)
#define V_INTR_MASKING_SHIFT 24
#define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT)
......
......@@ -1396,12 +1396,7 @@ static __init int svm_hardware_setup(void)
}
}
if (vgif) {
if (!boot_cpu_has(X86_FEATURE_VGIF))
vgif = false;
else
pr_info("Virtual GIF supported\n");
}
vgif = false; /* Disabled for CVE-2021-3653 */
return 0;
......@@ -3531,7 +3526,13 @@ static void enter_svm_guest_mode(struct vcpu_svm *svm, u64 vmcb_gpa,
svm->nested.intercept = nested_vmcb->control.intercept;
svm_flush_tlb(&svm->vcpu, true);
svm->vmcb->control.int_ctl = nested_vmcb->control.int_ctl | V_INTR_MASKING_MASK;
svm->vmcb->control.int_ctl &=
V_INTR_MASKING_MASK | V_GIF_ENABLE_MASK | V_GIF_MASK;
svm->vmcb->control.int_ctl |= nested_vmcb->control.int_ctl &
(V_TPR_MASK | V_IRQ_INJECTION_BITS_MASK);
if (nested_vmcb->control.int_ctl & V_INTR_MASKING_MASK)
svm->vcpu.arch.hflags |= HF_VINTR_MASK;
else
......
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