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提交 6304d88e 编写于 作者: K Keqian Zhu 提交者: Xie XiuQi

clocksource/drivers/arm_arch_timer: Use stable count reader in erratum sne

stable inclusion
from stable-5.10.4
commit f94df0cb1e099661f20a7817183d1669f5b323b7
bugzilla: 46903

--------------------------------

[ Upstream commit d8cc3905 ]

In commit 0ea41539 ("clocksource/arm_arch_timer: Use arch_timer_read_counter
to access stable counters"), we separate stable and normal count reader to omit
unnecessary overhead on systems that have no timer erratum.

However, in erratum_set_next_event_tval_generic(), count reader becomes normal
reader. This converts it to stable reader.

Fixes: 0ea41539 ("clocksource/arm_arch_timer: Use arch_timer_read_counter to access stable counters")
Acked-by: NMarc Zyngier <maz@kernel.org>
Signed-off-by: NKeqian Zhu <zhukeqian1@huawei.com>
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20201204073126.6920-2-zhukeqian1@huawei.comSigned-off-by: NSasha Levin <sashal@kernel.org>
Signed-off-by: NChen Jun <chenjun102@huawei.com>
Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
上级 35db117b
...@@ -396,10 +396,10 @@ static void erratum_set_next_event_tval_generic(const int access, unsigned long ...@@ -396,10 +396,10 @@ static void erratum_set_next_event_tval_generic(const int access, unsigned long
ctrl &= ~ARCH_TIMER_CTRL_IT_MASK; ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
if (access == ARCH_TIMER_PHYS_ACCESS) { if (access == ARCH_TIMER_PHYS_ACCESS) {
cval = evt + arch_counter_get_cntpct(); cval = evt + arch_counter_get_cntpct_stable();
write_sysreg(cval, cntp_cval_el0); write_sysreg(cval, cntp_cval_el0);
} else { } else {
cval = evt + arch_counter_get_cntvct(); cval = evt + arch_counter_get_cntvct_stable();
write_sysreg(cval, cntv_cval_el0); write_sysreg(cval, cntv_cval_el0);
} }
......
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