提交 5fc929ae 编写于 作者: D Dafna Hirschfeld 提交者: Mauro Carvalho Chehab

media: staging: rkisp1: add capability V4L2_CAP_IO_MC to capture devices

The capture devices supports YUV, RGB, and Bayer formats.
Adding V4L2_CAP_IO_MC capability will reflect userspace
what format should be set on the resizer in order to stream
each of the video formats.

The patch adds a 'mbus' field to the struct
'rkisp1_capture_fmt_cfg' which maps the video format
to the needed mbus format.
Signed-off-by: NDafna Hirschfeld <dafna.hirschfeld@collabora.com>
Acked-by: NHelen Koike <helen.koike@collabora.com>
Signed-off-by: NHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org>
上级 692f3ccc
...@@ -49,12 +49,14 @@ enum rkisp1_plane { ...@@ -49,12 +49,14 @@ enum rkisp1_plane {
* @uv_swap: if cb cr swaped, for yuv * @uv_swap: if cb cr swaped, for yuv
* @write_format: defines how YCbCr self picture data is written to memory * @write_format: defines how YCbCr self picture data is written to memory
* @output_format: defines sp output format * @output_format: defines sp output format
* @mbus: the mbus code on the src resizer pad that matches the pixel format
*/ */
struct rkisp1_capture_fmt_cfg { struct rkisp1_capture_fmt_cfg {
u32 fourcc; u32 fourcc;
u8 uv_swap; u8 uv_swap;
u32 write_format; u32 write_format;
u32 output_format; u32 output_format;
u32 mbus;
}; };
struct rkisp1_capture_ops { struct rkisp1_capture_ops {
...@@ -88,92 +90,116 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_mp_fmts[] = { ...@@ -88,92 +90,116 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_mp_fmts[] = {
.fourcc = V4L2_PIX_FMT_YUYV, .fourcc = V4L2_PIX_FMT_YUYV,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_YUV422P, .fourcc = V4L2_PIX_FMT_YUV422P,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV16, .fourcc = V4L2_PIX_FMT_NV16,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV61, .fourcc = V4L2_PIX_FMT_NV61,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_YVU422M, .fourcc = V4L2_PIX_FMT_YVU422M,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, },
/* yuv420 */ /* yuv420 */
{ {
.fourcc = V4L2_PIX_FMT_NV21, .fourcc = V4L2_PIX_FMT_NV21,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV12, .fourcc = V4L2_PIX_FMT_NV12,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV21M, .fourcc = V4L2_PIX_FMT_NV21M,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV12M, .fourcc = V4L2_PIX_FMT_NV12M,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_YUV420, .fourcc = V4L2_PIX_FMT_YUV420,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_YVU420, .fourcc = V4L2_PIX_FMT_YVU420,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, },
/* yuv400 */ /* yuv400 */
{ {
.fourcc = V4L2_PIX_FMT_GREY, .fourcc = V4L2_PIX_FMT_GREY,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, },
/* raw */ /* raw */
{ {
.fourcc = V4L2_PIX_FMT_SRGGB8, .fourcc = V4L2_PIX_FMT_SRGGB8,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
.mbus = MEDIA_BUS_FMT_SRGGB8_1X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_SGRBG8, .fourcc = V4L2_PIX_FMT_SGRBG8,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
.mbus = MEDIA_BUS_FMT_SGRBG8_1X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_SGBRG8, .fourcc = V4L2_PIX_FMT_SGBRG8,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
.mbus = MEDIA_BUS_FMT_SGBRG8_1X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_SBGGR8, .fourcc = V4L2_PIX_FMT_SBGGR8,
.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
.mbus = MEDIA_BUS_FMT_SBGGR8_1X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_SRGGB10, .fourcc = V4L2_PIX_FMT_SRGGB10,
.write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
.mbus = MEDIA_BUS_FMT_SRGGB10_1X10,
}, { }, {
.fourcc = V4L2_PIX_FMT_SGRBG10, .fourcc = V4L2_PIX_FMT_SGRBG10,
.write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
.mbus = MEDIA_BUS_FMT_SGRBG10_1X10,
}, { }, {
.fourcc = V4L2_PIX_FMT_SGBRG10, .fourcc = V4L2_PIX_FMT_SGBRG10,
.write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
.mbus = MEDIA_BUS_FMT_SGBRG10_1X10,
}, { }, {
.fourcc = V4L2_PIX_FMT_SBGGR10, .fourcc = V4L2_PIX_FMT_SBGGR10,
.write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
.mbus = MEDIA_BUS_FMT_SBGGR10_1X10,
}, { }, {
.fourcc = V4L2_PIX_FMT_SRGGB12, .fourcc = V4L2_PIX_FMT_SRGGB12,
.write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
.mbus = MEDIA_BUS_FMT_SRGGB12_1X12,
}, { }, {
.fourcc = V4L2_PIX_FMT_SGRBG12, .fourcc = V4L2_PIX_FMT_SGRBG12,
.write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
.mbus = MEDIA_BUS_FMT_SGRBG12_1X12,
}, { }, {
.fourcc = V4L2_PIX_FMT_SGBRG12, .fourcc = V4L2_PIX_FMT_SGBRG12,
.write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
.mbus = MEDIA_BUS_FMT_SGBRG12_1X12,
}, { }, {
.fourcc = V4L2_PIX_FMT_SBGGR12, .fourcc = V4L2_PIX_FMT_SBGGR12,
.write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
.mbus = MEDIA_BUS_FMT_SBGGR12_1X12,
}, },
}; };
...@@ -184,26 +210,31 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { ...@@ -184,26 +210,31 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = {
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_YUV422P, .fourcc = V4L2_PIX_FMT_YUV422P,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV16, .fourcc = V4L2_PIX_FMT_NV16,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV61, .fourcc = V4L2_PIX_FMT_NV61,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_YVU422M, .fourcc = V4L2_PIX_FMT_YVU422M,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, },
/* yuv420 */ /* yuv420 */
{ {
...@@ -211,31 +242,37 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { ...@@ -211,31 +242,37 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = {
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV12, .fourcc = V4L2_PIX_FMT_NV12,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV21M, .fourcc = V4L2_PIX_FMT_NV21M,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_NV12M, .fourcc = V4L2_PIX_FMT_NV12M,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_YUV420, .fourcc = V4L2_PIX_FMT_YUV420,
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_YVU420, .fourcc = V4L2_PIX_FMT_YVU420,
.uv_swap = 1, .uv_swap = 1,
.write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
.mbus = MEDIA_BUS_FMT_YUYV8_1_5X8,
}, },
/* yuv400 */ /* yuv400 */
{ {
...@@ -243,16 +280,19 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { ...@@ -243,16 +280,19 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = {
.uv_swap = 0, .uv_swap = 0,
.write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV400, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV400,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, },
/* rgb */ /* rgb */
{ {
.fourcc = V4L2_PIX_FMT_XBGR32, .fourcc = V4L2_PIX_FMT_XBGR32,
.write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB888, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB888,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, { }, {
.fourcc = V4L2_PIX_FMT_RGB565, .fourcc = V4L2_PIX_FMT_RGB565,
.write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
.output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB565, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB565,
.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
}, },
}; };
...@@ -1096,14 +1136,27 @@ static int rkisp1_enum_fmt_vid_cap_mplane(struct file *file, void *priv, ...@@ -1096,14 +1136,27 @@ static int rkisp1_enum_fmt_vid_cap_mplane(struct file *file, void *priv,
{ {
struct rkisp1_capture *cap = video_drvdata(file); struct rkisp1_capture *cap = video_drvdata(file);
const struct rkisp1_capture_fmt_cfg *fmt = NULL; const struct rkisp1_capture_fmt_cfg *fmt = NULL;
unsigned int i, n = 0;
if (f->index >= cap->config->fmt_size) if (!f->mbus_code) {
return -EINVAL; if (f->index >= cap->config->fmt_size)
return -EINVAL;
fmt = &cap->config->fmts[f->index]; fmt = &cap->config->fmts[f->index];
f->pixelformat = fmt->fourcc; f->pixelformat = fmt->fourcc;
return 0;
}
return 0; for (i = 0; i < cap->config->fmt_size; i++) {
if (cap->config->fmts[i].mbus != f->mbus_code)
continue;
if (n++ == f->index) {
f->pixelformat = cap->config->fmts[i].fourcc;
return 0;
}
}
return -EINVAL;
} }
static int rkisp1_s_fmt_vid_cap_mplane(struct file *file, static int rkisp1_s_fmt_vid_cap_mplane(struct file *file,
...@@ -1251,7 +1304,7 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap) ...@@ -1251,7 +1304,7 @@ static int rkisp1_register_capture(struct rkisp1_capture *cap)
vdev->v4l2_dev = v4l2_dev; vdev->v4l2_dev = v4l2_dev;
vdev->lock = &node->vlock; vdev->lock = &node->vlock;
vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE |
V4L2_CAP_STREAMING; V4L2_CAP_STREAMING | V4L2_CAP_IO_MC;
vdev->entity.ops = &rkisp1_media_ops; vdev->entity.ops = &rkisp1_media_ops;
video_set_drvdata(vdev, cap); video_set_drvdata(vdev, cap);
vdev->vfl_dir = VFL_DIR_RX; vdev->vfl_dir = VFL_DIR_RX;
......
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