提交 5e7c8b06 编写于 作者: A Alex Deucher

drm/amdgpu/gfx9: Raven has two MECs

This was missed when Andres' queue patches were rebased.

Fixes: 42794b27 (drm/amdgpu: take ownership of per-pipe configuration v3)
Reviewed-by: NAlex Xie <AlexBin.Xie@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
上级 41f6a99a
......@@ -872,6 +872,7 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
switch (adev->asic_type) {
case CHIP_VEGA10:
case CHIP_RAVEN:
adev->gfx.mec.num_mec = 2;
break;
default:
......
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