提交 5d944444 编写于 作者: S Stephane Eranian 提交者: Xie Haocheng

ACPI: Add perf low power callback

mainline inclusion
from mainline-v5.19
commit 2a606a18
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5S3WV
CVE: NA

-------------------------------------------------

Add an optional callback needed by some PMU features, e.g., AMD
BRS, to give a chance to the perf_events code to change its state before
a CPU goes to low power and after it comes back.

The callback is void when the PERF_NEEDS_LOPWR_CB flag is not set.
This flag must be set in arch specific perf_event.h header whenever needed.
When not set, there is no impact on the ACPI code.
Signed-off-by: NStephane Eranian <eranian@google.com>
[peterz: build fix]
Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220322221517.2510440-9-eranian@google.comSigned-off-by: NXie Haocheng <haocheng.xie@amd.com>
上级 abf604e4
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#include <linux/tick.h> #include <linux/tick.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/acpi.h> #include <linux/acpi.h>
#include <linux/perf_event.h>
#include <asm/mwait.h> #include <asm/mwait.h>
#include <xen/xen.h> #include <xen/xen.h>
...@@ -163,6 +164,9 @@ static int power_saving_thread(void *data) ...@@ -163,6 +164,9 @@ static int power_saving_thread(void *data)
tsc_marked_unstable = 1; tsc_marked_unstable = 1;
} }
local_irq_disable(); local_irq_disable();
perf_lopwr_cb(true);
tick_broadcast_enable(); tick_broadcast_enable();
tick_broadcast_enter(); tick_broadcast_enter();
stop_critical_timings(); stop_critical_timings();
...@@ -171,6 +175,9 @@ static int power_saving_thread(void *data) ...@@ -171,6 +175,9 @@ static int power_saving_thread(void *data)
start_critical_timings(); start_critical_timings();
tick_broadcast_exit(); tick_broadcast_exit();
perf_lopwr_cb(false);
local_irq_enable(); local_irq_enable();
if (time_before(expire_time, jiffies)) { if (time_before(expire_time, jiffies)) {
......
...@@ -20,6 +20,7 @@ ...@@ -20,6 +20,7 @@
#include <linux/tick.h> #include <linux/tick.h>
#include <linux/cpuidle.h> #include <linux/cpuidle.h>
#include <linux/cpu.h> #include <linux/cpu.h>
#include <linux/perf_event.h>
#include <acpi/processor.h> #include <acpi/processor.h>
/* /*
...@@ -551,6 +552,8 @@ static void wait_for_freeze(void) ...@@ -551,6 +552,8 @@ static void wait_for_freeze(void)
*/ */
static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
{ {
perf_lopwr_cb(true);
if (cx->entry_method == ACPI_CSTATE_FFH) { if (cx->entry_method == ACPI_CSTATE_FFH) {
/* Call into architectural FFH based C-state */ /* Call into architectural FFH based C-state */
acpi_processor_ffh_cstate_enter(cx); acpi_processor_ffh_cstate_enter(cx);
...@@ -561,6 +564,8 @@ static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) ...@@ -561,6 +564,8 @@ static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
inb(cx->address); inb(cx->address);
wait_for_freeze(); wait_for_freeze();
} }
perf_lopwr_cb(false);
} }
/** /**
......
...@@ -1624,4 +1624,11 @@ extern void __weak arch_perf_update_userpage(struct perf_event *event, ...@@ -1624,4 +1624,11 @@ extern void __weak arch_perf_update_userpage(struct perf_event *event,
struct perf_event_mmap_page *userpg, struct perf_event_mmap_page *userpg,
u64 now); u64 now);
#ifndef PERF_NEEDS_LOPWR_CB
static inline void perf_lopwr_cb(bool mode)
{
}
#endif
#endif /* _LINUX_PERF_EVENT_H */ #endif /* _LINUX_PERF_EVENT_H */
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