drm/amd/display: Fix CP_IRQ clear bit and logic
[Why] Currently clearing the wrong bit for CP_IRQ, and logic on when to clear needs to be fixed. [How] Corrected bit to clear and improved logic for decision to clear. Signed-off-by: NHarmanprit Tatla <harmanprit.tatla@amd.com> Acked-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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