提交 5c904c66 编写于 作者: L Linus Torvalds

Merge tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big set of char and misc and other tiny driver subsystem
  updates for 5.16-rc1.

  Loads of things in here, all of which have been in linux-next for a
  while with no reported problems (except for one called out below.)

  Included are:

   - habanana labs driver updates, including dma_buf usage, reviewed and
     acked by the dma_buf maintainers

   - iio driver update (going through this tree not staging as they
     really do not belong going through that tree anymore)

   - counter driver updates

   - hwmon driver updates that the counter drivers needed, acked by the
     hwmon maintainer

   - xillybus driver updates

   - binder driver updates

   - extcon driver updates

   - dma_buf module namespaces added (will cause a build error in arm64
     for allmodconfig, but that change is on its way through the drm
     tree)

   - lkdtm driver updates

   - pvpanic driver updates

   - phy driver updates

   - virt acrn and nitr_enclaves driver updates

   - smaller char and misc driver updates"

* tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (386 commits)
  comedi: dt9812: fix DMA buffers on stack
  comedi: ni_usb6501: fix NULL-deref in command paths
  arm64: errata: Enable TRBE workaround for write to out-of-range address
  arm64: errata: Enable workaround for TRBE overwrite in FILL mode
  coresight: trbe: Work around write to out of range
  coresight: trbe: Make sure we have enough space
  coresight: trbe: Add a helper to determine the minimum buffer size
  coresight: trbe: Workaround TRBE errata overwrite in FILL mode
  coresight: trbe: Add infrastructure for Errata handling
  coresight: trbe: Allow driver to choose a different alignment
  coresight: trbe: Decouple buffer base from the hardware base
  coresight: trbe: Add a helper to pad a given buffer area
  coresight: trbe: Add a helper to calculate the trace generated
  coresight: trbe: Defer the probe on offline CPUs
  coresight: trbe: Fix incorrect access of the sink specific data
  coresight: etm4x: Add ETM PID for Kryo-5XX
  coresight: trbe: Prohibit trace before disabling TRBE
  coresight: trbe: End the AUX handle on truncation
  coresight: trbe: Do not truncate buffer on IRQ
  coresight: trbe: Fix handling of spurious interrupts
  ...
......@@ -226,6 +226,12 @@ Description: Gets the state dump occurring on a CS timeout or failure.
Writing an integer X discards X state dumps, so that the
next read would return X+1-st newest state dump.
What: /sys/kernel/debug/habanalabs/hl<n>/timeout_locked
Date: Sep 2021
KernelVersion: 5.16
Contact: obitton@habana.ai
Description: Sets the command submission timeout value in seconds.
What: /sys/kernel/debug/habanalabs/hl<n>/stop_on_err
Date: Mar 2020
KernelVersion: 5.6
......
......@@ -203,6 +203,27 @@ Description:
both edges:
Any state transition.
What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id
What: /sys/bus/counter/devices/counterX/countY/floor_component_id
What: /sys/bus/counter/devices/counterX/countY/count_mode_component_id
What: /sys/bus/counter/devices/counterX/countY/direction_component_id
What: /sys/bus/counter/devices/counterX/countY/enable_component_id
What: /sys/bus/counter/devices/counterX/countY/error_noise_component_id
What: /sys/bus/counter/devices/counterX/countY/prescaler_component_id
What: /sys/bus/counter/devices/counterX/countY/preset_component_id
What: /sys/bus/counter/devices/counterX/countY/preset_enable_component_id
What: /sys/bus/counter/devices/counterX/countY/signalZ_action_component_id
What: /sys/bus/counter/devices/counterX/signalY/cable_fault_component_id
What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id
What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id
What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id
What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id
KernelVersion: 5.16
Contact: linux-iio@vger.kernel.org
Description:
Read-only attribute that indicates the component ID of the
respective extension or Synapse.
What: /sys/bus/counter/devices/counterX/countY/spike_filter_ns
KernelVersion: 5.14
Contact: linux-iio@vger.kernel.org
......@@ -212,6 +233,14 @@ Description:
shorter or equal to configured value are ignored. Value 0 means
filter is disabled.
What: /sys/bus/counter/devices/counterX/events_queue_size
KernelVersion: 5.16
Contact: linux-iio@vger.kernel.org
Description:
Size of the Counter events queue in number of struct
counter_event data structures. The number of elements will be
rounded-up to a power of 2.
What: /sys/bus/counter/devices/counterX/name
KernelVersion: 5.2
Contact: linux-iio@vger.kernel.org
......@@ -286,7 +315,14 @@ What: /sys/bus/counter/devices/counterX/signalY/signal
KernelVersion: 5.2
Contact: linux-iio@vger.kernel.org
Description:
Signal data of Signal Y represented as a string.
Signal level state of Signal Y. The following signal level
states are available:
low:
Low level state.
high:
High level state.
What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode
KernelVersion: 5.2
......
What: /sys/bus/fsi/devices/XX.XX.00:06/sbefifoX/timeout
KernelVersion: 5.15
Contact: eajames@linux.ibm.com
Description:
Indicates whether or not this SBE device has experienced a
timeout; i.e. the SBE did not respond within the time allotted
by the driver. A value of 1 indicates that a timeout has
ocurred and no transfers have completed since the timeout. A
value of 0 indicates that no timeout has ocurred, or if one
has, more recent transfers have completed successful.
......@@ -429,6 +429,7 @@ What: /sys/bus/iio/devices/iio:deviceX/in_angl_scale
What: /sys/bus/iio/devices/iio:deviceX/in_intensity_x_scale
What: /sys/bus/iio/devices/iio:deviceX/in_intensity_y_scale
What: /sys/bus/iio/devices/iio:deviceX/in_intensity_z_scale
What: /sys/bus/iio/devices/iio:deviceX/in_concentration_co2_scale
KernelVersion: 2.6.35
Contact: linux-iio@vger.kernel.org
Description:
......@@ -1957,3 +1958,44 @@ Description:
Specify the percent for light sensor relative to the channel
absolute value that a data field should change before an event
is generated. Units are a percentage of the prior reading.
What: /sys/bus/iio/devices/iio:deviceX/calibration_auto_enable
Date: June 2020
KernelVersion: 5.8
Contact: linux-iio@vger.kernel.org
Description:
Some sensors have the ability to apply auto calibration at
runtime. For example, it may be necessary to compensate for
contaminant build-up in a measurement chamber or optical
element deterioration that would otherwise lead to sensor drift.
Writing 1 or 0 to this attribute will respectively activate or
deactivate this auto calibration function.
Upon reading, the current status is returned.
What: /sys/bus/iio/devices/iio:deviceX/calibration_forced_value
Date: June 2020
KernelVersion: 5.8
Contact: linux-iio@vger.kernel.org
Description:
Some sensors have the ability to apply a manual calibration using
a known measurement value, perhaps obtained from an external
reference device.
Writing a value to this function will force such a calibration
change. For the scd30 the value should be from the range
[400 1 2000].
Note for the scd30 that a valid value may only be obtained once
it is has been written. Until then any read back of this value
should be ignored. As for the scd4x an error will be returned
immediately if the manual calibration has failed.
What: /sys/bus/iio/devices/iio:deviceX/calibration_forced_value_available
KernelVersion: 5.15
Contact: linux-iio@vger.kernel.org
Description:
Available range for the forced calibration value, expressed as:
- a range specified as "[min step max]"
What: /sys/bus/iio/devices/iio:deviceX/in_concentration_co2_calibration_factory
Date: August 2021
KernelVersion: 5.16
Contact: Jacopo Mondi <jacopo@jmondi.org>
Description:
Writing '1' triggers a 'Factory' calibration cycle.
What: /sys/bus/iio/devices/iio:deviceX/in_concentration_co2_calibration_background
Date: August 2021
KernelVersion: 5.16
Contact: Jacopo Mondi <jacopo@jmondi.org>
Description:
Writing '1' triggers a 'Background' calibration cycle.
What: /sys/bus/iio/devices/iio:deviceX/error_status_available
Date: August 2021
KernelVersion: 5.16
Contact: Jacopo Mondi <jacopo@jmondi.org>
Description:
Reading returns the list of possible chip error status.
Available options are:
- 'error_fatal': Analog front-end initialization error
- 'error_i2c': Read/write to non-existing register
- 'error_algorithm': Corrupted parameters
- 'error_calibration': Calibration has failed
- 'error_self_diagnostic': Internal interface failure
- 'error_out_of_range': Measured concentration out of scale
- 'error_memory': Error during memory operations
- 'error_no_measurement': Cleared at first measurement
- 'error_low_voltage': Sensor regulated voltage too low
- 'error_measurement_timeout': Unable to complete measurement
What: /sys/bus/iio/devices/iio:deviceX/error_status
Date: August 2021
KernelVersion: 5.16
Contact: Jacopo Mondi <jacopo@jmondi.org>
Description:
Reading returns the current chip error status.
What: /sys/bus/iio/devices/iio:deviceX/calibration_auto_enable
Date: June 2020
KernelVersion: 5.8
Contact: linux-iio@vger.kernel.org
Description:
Contaminants build-up in the measurement chamber or optical
elements deterioration leads to sensor drift.
One can compensate for sensor drift by using automatic self
calibration procedure (asc).
Writing 1 or 0 to this attribute will respectively activate or
deactivate asc.
Upon reading current asc status is returned.
What: /sys/bus/iio/devices/iio:deviceX/calibration_forced_value
Date: June 2020
KernelVersion: 5.8
Contact: linux-iio@vger.kernel.org
Description:
Contaminants build-up in the measurement chamber or optical
elements deterioration leads to sensor drift.
One can compensate for sensor drift by using forced
recalibration (frc). This is useful in case there's known
co2 reference available nearby the sensor.
Picking value from the range [400 1 2000] and writing it to the
sensor will set frc.
Upon reading current frc value is returned. Note that after
power cycling default value (i.e 400) is returned even though
internally sensor had recalibrated itself.
What: /sys/bus/iio/devices/iio:deviceX/fault_ovuv
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
Overvoltage or Undervoltage Input fault. The internal circuitry
is protected from excessive voltages applied to the thermocouple
cables at FORCE+, FORCE2, RTDIN+ & RTDIN-. This circuitry turn
off when the input voltage is negative or greater than VDD.
Reading returns '1' if input voltage is negative or greater
than VDD, otherwise '0'.
What: /sys/bus/iio/devices/iio:deviceX/in_filter_notch_center_frequency
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
Notch frequency in Hz for a noise rejection filter. Used i.e for
line noise rejection.
Valid notch filter values are 50 Hz and 60 Hz.
What: /sys/bus/platform/devices/occ-hwmon.X/ffdc
KernelVersion: 5.15
Contact: eajames@linux.ibm.com
Description:
Contains the First Failure Data Capture from the SBEFIFO
hardware, if there is any from a previous transfer. Otherwise,
the file is empty. The data is cleared when it's been
completely read by a user. As the name suggests, only the data
from the first error is saved, until it's cleared upon read. The OCC hwmon driver, running on
a Baseboard Management Controller (BMC), communicates with
POWER9 and up processors over the Self-Boot Engine (SBE) FIFO.
In many error conditions, the SBEFIFO will return error data
indicating the type of error and system state, etc.
What: /sys/bus/soundwire/devices/sdw-master-N/revision
/sys/bus/soundwire/devices/sdw-master-N/clk_stop_modes
/sys/bus/soundwire/devices/sdw-master-N/clk_freq
/sys/bus/soundwire/devices/sdw-master-N/clk_gears
/sys/bus/soundwire/devices/sdw-master-N/default_col
/sys/bus/soundwire/devices/sdw-master-N/default_frame_rate
/sys/bus/soundwire/devices/sdw-master-N/default_row
/sys/bus/soundwire/devices/sdw-master-N/dynamic_shape
/sys/bus/soundwire/devices/sdw-master-N/err_threshold
/sys/bus/soundwire/devices/sdw-master-N/max_clk_freq
What: /sys/bus/soundwire/devices/sdw-master-<N>/revision
/sys/bus/soundwire/devices/sdw-master-<N>/clk_stop_modes
/sys/bus/soundwire/devices/sdw-master-<N>/clk_freq
/sys/bus/soundwire/devices/sdw-master-<N>/clk_gears
/sys/bus/soundwire/devices/sdw-master-<N>/default_col
/sys/bus/soundwire/devices/sdw-master-<N>/default_frame_rate
/sys/bus/soundwire/devices/sdw-master-<N>/default_row
/sys/bus/soundwire/devices/sdw-master-<N>/dynamic_shape
/sys/bus/soundwire/devices/sdw-master-<N>/err_threshold
/sys/bus/soundwire/devices/sdw-master-<N>/max_clk_freq
Date: April 2020
......
......@@ -64,37 +64,37 @@ Description: SoundWire Slave Data Port-0 DisCo properties.
Data port 0 are used by the bus to configure the Data Port 0.
What: /sys/bus/soundwire/devices/sdw:.../dpN_src/max_word
/sys/bus/soundwire/devices/sdw:.../dpN_src/min_word
/sys/bus/soundwire/devices/sdw:.../dpN_src/words
/sys/bus/soundwire/devices/sdw:.../dpN_src/type
/sys/bus/soundwire/devices/sdw:.../dpN_src/max_grouping
/sys/bus/soundwire/devices/sdw:.../dpN_src/simple_ch_prep_sm
/sys/bus/soundwire/devices/sdw:.../dpN_src/ch_prep_timeout
/sys/bus/soundwire/devices/sdw:.../dpN_src/imp_def_interrupts
/sys/bus/soundwire/devices/sdw:.../dpN_src/min_ch
/sys/bus/soundwire/devices/sdw:.../dpN_src/max_ch
/sys/bus/soundwire/devices/sdw:.../dpN_src/channels
/sys/bus/soundwire/devices/sdw:.../dpN_src/ch_combinations
/sys/bus/soundwire/devices/sdw:.../dpN_src/max_async_buffer
/sys/bus/soundwire/devices/sdw:.../dpN_src/block_pack_mode
/sys/bus/soundwire/devices/sdw:.../dpN_src/port_encoding
/sys/bus/soundwire/devices/sdw:.../dpN_sink/max_word
/sys/bus/soundwire/devices/sdw:.../dpN_sink/min_word
/sys/bus/soundwire/devices/sdw:.../dpN_sink/words
/sys/bus/soundwire/devices/sdw:.../dpN_sink/type
/sys/bus/soundwire/devices/sdw:.../dpN_sink/max_grouping
/sys/bus/soundwire/devices/sdw:.../dpN_sink/simple_ch_prep_sm
/sys/bus/soundwire/devices/sdw:.../dpN_sink/ch_prep_timeout
/sys/bus/soundwire/devices/sdw:.../dpN_sink/imp_def_interrupts
/sys/bus/soundwire/devices/sdw:.../dpN_sink/min_ch
/sys/bus/soundwire/devices/sdw:.../dpN_sink/max_ch
/sys/bus/soundwire/devices/sdw:.../dpN_sink/channels
/sys/bus/soundwire/devices/sdw:.../dpN_sink/ch_combinations
/sys/bus/soundwire/devices/sdw:.../dpN_sink/max_async_buffer
/sys/bus/soundwire/devices/sdw:.../dpN_sink/block_pack_mode
/sys/bus/soundwire/devices/sdw:.../dpN_sink/port_encoding
What: /sys/bus/soundwire/devices/sdw:.../dp<N>_src/max_word
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/min_word
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/words
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/type
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/max_grouping
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/simple_ch_prep_sm
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/ch_prep_timeout
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/imp_def_interrupts
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/min_ch
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/max_ch
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/channels
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/ch_combinations
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/max_async_buffer
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/block_pack_mode
/sys/bus/soundwire/devices/sdw:.../dp<N>_src/port_encoding
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/max_word
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/min_word
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/words
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/type
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/max_grouping
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/simple_ch_prep_sm
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/ch_prep_timeout
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/imp_def_interrupts
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/min_ch
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/max_ch
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/channels
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/ch_combinations
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/max_async_buffer
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/block_pack_mode
/sys/bus/soundwire/devices/sdw:.../dp<N>_sink/port_encoding
Date: May 2020
......
......@@ -127,6 +127,11 @@ its hardware characteristcs.
* arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely
use the SG mode on this system.
* arm,max-burst-size: The maximum burst size initiated by TMC on the
AXI master interface. The burst size can be in the range [0..15],
the setting supports one data transfer per burst up to a maximum of
16 data transfers per burst.
* Optional property for CATU :
* interrupts : Exactly one SPI may be listed for reporting the address
error
......
......@@ -11,7 +11,9 @@ maintainers:
properties:
compatible:
const: ti,tusb320
enum:
- ti,tusb320
- ti,tusb320l
reg:
maxItems: 1
......
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/accel/adi,adxl313.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices ADXL313 3-Axis Digital Accelerometer
maintainers:
- Lucas Stankus <lucas.p.stankus@gmail.com>
description: |
Analog Devices ADXL313 3-Axis Digital Accelerometer that supports
both I2C & SPI interfaces.
https://www.analog.com/en/products/adxl313.html
properties:
compatible:
enum:
- adi,adxl313
reg:
maxItems: 1
spi-3wire: true
spi-max-frequency: true
vs-supply:
description: Regulator that supplies power to the accelerometer
vdd-supply:
description: Regulator that supplies the digital interface supply voltage
interrupts:
minItems: 1
maxItems: 2
interrupt-names:
minItems: 1
maxItems: 2
items:
enum:
- INT1
- INT2
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
#address-cells = <1>;
#size-cells = <0>;
/* Example for a I2C device node */
accelerometer@53 {
compatible = "adi,adxl313";
reg = <0x53>;
interrupt-parent = <&gpio0>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "INT1";
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
/* Example for a SPI device node */
accelerometer@0 {
compatible = "adi,adxl313";
reg = <0>;
spi-max-frequency = <5000000>;
interrupt-parent = <&gpio0>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "INT1";
};
};
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/accel/adi,adxl355.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices ADXL355 3-Axis, Low noise MEMS Accelerometer
maintainers:
- Puranjay Mohan <puranjay12@gmail.com>
description: |
Analog Devices ADXL355 3-Axis, Low noise MEMS Accelerometer that supports
both I2C & SPI interfaces
https://www.analog.com/en/products/adxl355.html
properties:
compatible:
enum:
- adi,adxl355
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 3
description: |
Type for DRDY should be IRQ_TYPE_EDGE_RISING.
Three configurable interrupt lines exist.
interrupt-names:
description: Specify which interrupt line is in use.
items:
enum:
- INT1
- INT2
- DRDY
minItems: 1
maxItems: 3
vdd-supply:
description: Regulator that provides power to the sensor
vddio-supply:
description: Regulator that provides power to the bus
spi-max-frequency: true
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
/* Example for a I2C device node */
accelerometer@1d {
compatible = "adi,adxl355";
reg = <0x1d>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
accelerometer@0 {
compatible = "adi,adxl355";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
};
......@@ -21,6 +21,9 @@ properties:
reg:
maxItems: 1
interrupts:
maxItems: 1
vdd-supply: true
vddio-supply: true
......
......@@ -26,19 +26,43 @@ properties:
reg:
maxItems: 1
vrefin-supply:
description:
Buffered ADC reference voltage supply.
vref-supply:
description:
ADC reference voltage supply
Unbuffered ADC reference voltage supply.
adi,internal-ref-microvolt:
description: |
Internal reference voltage selection in microvolts.
If no internal reference is specified, the channel will default to the
external reference defined by vrefin-supply (or vref-supply).
vrefin-supply will take precedence over vref-supply if both are defined.
If no supplies are defined, the reference selection will default to
4096mV internal reference.
enum: [2500000, 4096000]
default: 4096000
spi-max-frequency: true
"#io-channel-cells":
'#io-channel-cells':
const: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
required:
- compatible
- reg
- vref-supply
additionalProperties: false
......@@ -49,9 +73,30 @@ examples:
#size-cells = <0>;
adc@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,ad7949";
reg = <0>;
vref-supply = <&vdd_supply>;
};
adc@1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,ad7949";
reg = <1>;
vrefin-supply = <&vdd_supply>;
};
adc@2 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,ad7949";
reg = <2>;
adi,internal-ref-microvolt = <4096000>;
};
};
...
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad799x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD799x analog to digital converters
maintainers:
- Michael Hennerich <Michael.Hennerich@analog.com>
description: |
Support for Analog Devices AD7991, AD7992, AD7993, AD7994, AD7995, AD7997, AD7998,
AD7999 and similar analog to digital converters.
Specifications on the converters can be found at:
AD7991, AD7995, AD7999:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7991_7995_7999.pdf
AD7992:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7992.pdf
AD7993, AD7994:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7993_7994.pdf
AD7997, AD7998:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7997_7998.pdf
properties:
compatible:
enum:
- adi,ad7991
- adi,ad7992
- adi,ad7993
- adi,ad7994
- adi,ad7995
- adi,ad7997
- adi,ad7998
- adi,ad7999
reg:
maxItems: 1
interrupts:
maxItems: 1
vcc-supply:
description:
ADC power supply
vref-supply:
description:
ADC reference voltage supply, optional for AD7991, AD7995 and AD7999
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
adc1: adc@28 {
reg = <0x28>;
compatible = "adi,ad7991";
interrupts = <13 2>;
interrupt-parent = <&gpio6>;
vcc-supply = <&vcc_3v3>;
vref-supply = <&adc_vref>;
};
};
...
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ADC that forms part of an ASPEED server management processor.
maintainers:
- Billy Tsai <billy_tsai@aspeedtech.com>
description: |
• 10-bits resolution for 16 voltage channels.
• The device split into two individual engine and each contains 8 voltage
channels.
• Channel scanning can be non-continuous.
• Programmable ADC clock frequency.
• Programmable upper and lower threshold for each channels.
• Interrupt when larger or less than threshold for each channels.
• Support hysteresis for each channels.
• Built-in a compensating method.
• Built-in a register to trim internal reference voltage.
• Internal or External reference voltage.
• Support 2 Internal reference voltage 1.2v or 2.5v.
• Integrate dividing circuit for battery sensing.
properties:
compatible:
enum:
- aspeed,ast2600-adc0
- aspeed,ast2600-adc1
description:
Their trimming data, which is used to calibrate internal reference volage,
locates in different address of OTP.
reg:
maxItems: 1
clocks:
maxItems: 1
description:
Input clock used to derive the sample clock. Expected to be the
SoC's APB clock.
resets:
maxItems: 1
"#io-channel-cells":
const: 1
vref-supply:
description:
The external regulator supply ADC reference voltage.
aspeed,int-vref-microvolt:
enum: [1200000, 2500000]
description:
ADC internal reference voltage in microvolts.
aspeed,battery-sensing:
type: boolean
description:
Inform the driver that last channel will be used to sensor battery.
aspeed,trim-data-valid:
type: boolean
description: |
The ADC reference voltage can be calibrated to obtain the trimming
data which will be stored in otp. This property informs the driver that
the data store in the otp is valid.
required:
- compatible
- reg
- clocks
- resets
- "#io-channel-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/ast2600-clock.h>
adc0: adc@1e6e9000 {
compatible = "aspeed,ast2600-adc0";
reg = <0x1e6e9000 0x100>;
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_ADC>;
#io-channel-cells = <1>;
aspeed,int-vref-microvolt = <2500000>;
};
adc1: adc@1e6e9100 {
compatible = "aspeed,ast2600-adc1";
reg = <0x1e6e9100 0x100>;
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_ADC>;
#io-channel-cells = <1>;
aspeed,int-vref-microvolt = <2500000>;
};
...
......@@ -15,6 +15,7 @@ properties:
enum:
- atmel,sama5d2-adc
- microchip,sam9x60-adc
- microchip,sama7g5-adc
reg:
maxItems: 1
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP IMX8QXP ADC bindings
maintainers:
- Cai Huoqing <caihuoqing@baidu.com>
description:
Supports the ADC found on the IMX8QXP SoC.
properties:
compatible:
const: nxp,imx8qxp-adc
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 2
clock-names:
items:
- const: per
- const: ipg
assigned-clocks:
maxItems: 1
assigned-clock-rates:
maxItems: 1
power-domains:
maxItems: 1
"#io-channel-cells":
const: 1
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- assigned-clocks
- assigned-clock-rates
- power-domains
- "#io-channel-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/firmware/imx/rsrc.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
adc@5a880000 {
compatible = "nxp,imx8qxp-adc";
reg = <0x0 0x5a880000 0x0 0x10000>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX_SC_R_ADC_0>,
<&clk IMX_SC_R_ADC_0>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_ADC_0>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_ADC_0>;
#io-channel-cells = <1>;
};
};
...
......@@ -222,6 +222,12 @@ patternProperties:
'#io-channel-cells':
const: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
interrupts:
description: |
IRQ Line for the ADC instance. Valid values are:
......@@ -256,6 +262,7 @@ patternProperties:
- 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
stm32mp1.
$ref: /schemas/types.yaml#/definitions/uint32-array
deprecated: true
st,adc-diff-channels:
description: |
......@@ -265,7 +272,9 @@ patternProperties:
<vinp vinn>, <vinp vinn>,... vinp and vinn are numbered from 0 to 19.
Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is
required. Both properties can be used together. Some channels can be
required if no adc generic channel is defined. These legacy channel
properties are exclusive with adc generic channel bindings.
Both properties can be used together. Some channels can be
used as single-ended and some other ones as differential (mixed). But
channels can't be configured both as single-ended and differential.
$ref: /schemas/types.yaml#/definitions/uint32-matrix
......@@ -279,6 +288,7 @@ patternProperties:
"vinn" indicates negative input number
minimum: 0
maximum: 19
deprecated: true
st,min-sample-time-nsecs:
description:
......@@ -289,6 +299,50 @@ patternProperties:
list, to set sample time resp. for all channels, or independently for
each channel.
$ref: /schemas/types.yaml#/definitions/uint32-array
deprecated: true
nvmem-cells:
items:
- description: Phandle to the calibration vrefint data provided by otp
nvmem-cell-names:
items:
- const: vrefint
patternProperties:
"^channel@([0-9]|1[0-9])$":
type: object
$ref: "adc.yaml"
description: Represents the external channels which are connected to the ADC.
properties:
reg:
items:
minimum: 0
maximum: 19
label:
description: |
Unique name to identify which channel this is.
Reserved label names "vddcore", "vrefint" and "vbat"
are used to identify internal channels with matching names.
diff-channels:
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
minimum: 0
maximum: 19
st,min-sample-time-ns:
description: |
Minimum sampling time in nanoseconds. Depending on hardware (board)
e.g. high/low analog input source impedance, fine tune of ADC
sampling time may be recommended.
required:
- reg
additionalProperties: false
allOf:
- if:
......@@ -369,12 +423,6 @@ patternProperties:
additionalProperties: false
anyOf:
- required:
- st,adc-channels
- required:
- st,adc-diff-channels
required:
- compatible
- reg
......@@ -451,4 +499,50 @@ examples:
// other adc child node follow...
};
- |
// Example 3: with stm32mp157c to setup ADC2 with:
// - internal channels 13, 14, 15.
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
adc122: adc@48003000 {
compatible = "st,stm32mp1-adc-core";
reg = <0x48003000 0x400>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc ADC12>, <&rcc ADC12_K>;
clock-names = "bus", "adc";
booster-supply = <&booster>;
vdd-supply = <&vdd>;
vdda-supply = <&vdda>;
vref-supply = <&vref>;
st,syscfg = <&syscfg>;
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
adc@100 {
compatible = "st,stm32mp1-adc";
#io-channel-cells = <1>;
reg = <0x100>;
interrupts = <1>;
#address-cells = <1>;
#size-cells = <0>;
channel@13 {
reg = <13>;
label = "vrefint";
st,min-sample-time-ns = <9000>;
};
channel@14 {
reg = <14>;
label = "vddcore";
st,min-sample-time-ns = <9000>;
};
channel@15 {
reg = <15>;
label = "vbat";
st,min-sample-time-ns = <9000>;
};
};
};
...
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/chemical/senseair,sunrise.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Senseair Sunrise 006-0-0007 CO2 Sensor
maintainers:
- Jacopo Mondi <jacopo@jmondi.org>
description: |
Senseair Sunrise 006-0-0007 is a NDIR CO2 sensor. It supports I2C or UART buses
for communications and control.
Datasheets:
https://rmtplusstoragesenseair.blob.core.windows.net/docs/Dev/publicerat/PSP11704.pdf
https://rmtplusstoragesenseair.blob.core.windows.net/docs/Dev/publicerat/PSH11649.pdf
https://rmtplusstoragesenseair.blob.core.windows.net/docs/Dev/publicerat/TDE5531.pdf
https://rmtplusstoragesenseair.blob.core.windows.net/docs/Market/publicerat/TDE7318.pdf
properties:
compatible:
const: senseair,sunrise-006-0-0007
reg:
maxItems: 1
ndry-gpios:
maxItems: 1
description:
Phandle to the GPIO line connected to the nDRY pin. Typically active low.
en-gpios:
maxItems: 1
description:
Phandle to the GPIO line connected to the EN pin. Typically active high.
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
co2-sensor@68 {
compatible = "senseair,sunrise-006-0-0007";
reg = <0x68>;
};
};
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/chemical/sensirion,scd4x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sensirion SCD4X carbon dioxide sensor
maintainers:
- Roan van Dijk <roan@protonic.nl>
description: |
Air quality sensor capable of measuring co2 concentration, temperature
and relative humidity.
properties:
compatible:
enum:
- sensirion,scd40
- sensirion,scd41
reg:
maxItems: 1
interrupts:
maxItems: 1
vdd-supply: true
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
co2-sensor@62 {
compatible = "sensirion,scd41";
reg = <0x62>;
};
};
......@@ -54,7 +54,7 @@ examples:
ad5766@0 {
compatible = "adi,ad5766";
output-range-microvolts = <(-5000) 5000>;
output-range-microvolts = <(-5000000) 5000000>;
reg = <0>;
spi-cpol;
spi-max-frequency = <1000000>;
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/frequency/adi,adrf6780.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ADRF6780 Microwave Upconverter
maintainers:
- Antoniu Miclaus <antoniu.miclaus@analog.com>
description: |
Wideband, microwave upconverter optimized for point to point microwave
radio designs operating in the 5.9 GHz to 23.6 GHz frequency range.
https://www.analog.com/en/products/adrf6780.html
properties:
compatible:
enum:
- adi,adrf6780
reg:
maxItems: 1
spi-max-frequency:
maximum: 1000000
clocks:
description:
Definition of the external clock.
minItems: 1
clock-names:
items:
- const: lo_in
clock-output-names:
maxItems: 1
adi,vga-buff-en:
description:
RF Variable Gain Amplifier Buffer Enable. Gain is controlled by
the voltage on the VATT pin.
type: boolean
adi,lo-buff-en:
description:
Local Oscillator Amplifier Enable. Disable to put the part in
a power down state.
type: boolean
adi,if-mode-en:
description:
Intermediate Frequency Mode Enable. Either IF Mode or I/Q Mode
can be enabled at a time.
type: boolean
adi,iq-mode-en:
description:
I/Q Mode Enable. Either IF Mode or I/Q Mode can be enabled at a
time.
type: boolean
adi,lo-x2-en:
description:
Double the Local Oscillator output frequency from the Local
Oscillator Input Frequency. Either LOx1 or LOx2 can be enabled
at a time.
type: boolean
adi,lo-ppf-en:
description:
Local Oscillator input frequency equal to the Local Oscillator
output frequency (LO x1). Either LOx1 or LOx2 can be enabled
at a time.
type: boolean
adi,lo-en:
description:
Enable additional cirtuitry in the LO chain. Disable to put the
part in a power down state.
type: boolean
adi,uc-bias-en:
description:
Enable all bias circuitry thourghout the entire part.
Disable to put the part in a power down state.
type: boolean
adi,lo-sideband:
description:
Switch to the Lower LO Sideband. By default the Upper LO
sideband is enabled.
type: boolean
adi,vdet-out-en:
description:
VDET Output Select Enable. Expose the RF detector output to the
VDET external pin.
type: boolean
'#clock-cells':
const: 0
dependencies:
adi,lo-x2-en: [ "adi,lo-en" ]
adi,lo-ppf-en: [ "adi,lo-en" ]
required:
- compatible
- reg
- clocks
- clock-names
additionalProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
adrf6780@0 {
compatible = "adi,adrf6780";
reg = <0>;
spi-max-frequency = <1000000>;
clocks = <&adrf6780_lo>;
clock-names = "lo_in";
};
};
...
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/light/liteon,ltr501.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LiteON LTR501 I2C Proximity and Light sensor
maintainers:
- Nikita Travkin <nikita@trvn.ru>
properties:
compatible:
enum:
- liteon,ltr501
- liteon,ltr559
- liteon,ltr301
reg:
maxItems: 1
vdd-supply: true
vddio-supply: true
interrupts:
maxItems: 1
additionalProperties: false
required:
- compatible
- reg
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
light-sensor@23 {
compatible = "liteon,ltr559";
reg = <0x23>;
vdd-supply = <&pm8916_l17>;
vddio-supply = <&pm8916_l6>;
interrupt-parent = <&msmgpio>;
interrupts = <115 IRQ_TYPE_EDGE_FALLING>;
};
};
......@@ -17,11 +17,13 @@ properties:
- asahi-kasei,ak8963
- asahi-kasei,ak09911
- asahi-kasei,ak09912
- asahi-kasei,ak09916
- enum:
- ak8975
- ak8963
- ak09911
- ak09912
- ak09916
deprecated: true
reg:
......@@ -43,6 +45,11 @@ properties:
an optional regulator that needs to be on to provide VDD power to
the sensor.
vid-supply:
description: |
an optional regulator that needs to be on to provide VID power to
the sensor.
mount-matrix:
description: an optional 3x3 mounting rotation matrix.
......
......@@ -35,9 +35,18 @@ properties:
mux-control-names: true
channels:
$ref: /schemas/types.yaml#/definitions/string-array
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
description:
List of strings, labeling the mux controller states.
List of strings, labeling the mux controller states. An empty
string for a state means that the channel is not available.
settle-time-us:
default: 0
description:
Time required for analog signals to settle after muxing.
"#io-channel-cells":
const: 1
required:
- compatible
......
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/temperature/maxim,max31865.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Maxim MAX31865 Resistance Temperature Detector.
maintainers:
- Navin Sankar Velliangiri <navin@linumiz.com>
description: |
https://datasheets.maximintegrated.com/en/ds/MAX31865.pdf
properties:
compatible:
const: maxim,max31865
reg:
maxItems: 1
maxim,3-wire:
description:
Identifies the number of wires used by the RTD. Setting this property
enables 3-wire RTD connection. Else 2-wire or 4-wire RTD connection.
type: boolean
spi-max-frequency: true
spi-cpha: true
required:
- compatible
- reg
- spi-cpha
additionalProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
temp_sensor@0 {
compatible = "maxim,max31865";
reg = <0>;
spi-max-frequency = <400000>;
spi-cpha;
maxim,3-wire;
};
};
...
......@@ -18,13 +18,21 @@ properties:
const: brcm,ns-usb2-phy
reg:
items:
- description: iomem address range of DMU (Device Management Unit)
anyOf:
- maxItems: 1
description: PHY control register
- maxItems: 1
description: iomem address range of DMU (Device Management Unit)
deprecated: true
reg-names:
items:
- const: dmu
brcm,syscon-clkset:
description: phandle to syscon for clkset register
$ref: /schemas/types.yaml#/definitions/phandle
clocks:
items:
- description: USB PHY reference clock
......@@ -39,20 +47,25 @@ properties:
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- "#phy-cells"
oneOf:
- required:
- brcm,syscon-clkset
- required:
- reg-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/bcm-nsp.h>
phy@1800c000 {
phy@1800c164 {
compatible = "brcm,ns-usb2-phy";
reg = <0x1800c000 0x1000>;
reg-names = "dmu";
reg = <0x1800c164 0x4>;
brcm,syscon-clkset = <&clkset>;
clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
clock-names = "phy-ref-clk";
#phy-cells = <0>;
......
......@@ -81,6 +81,119 @@ patternProperties:
properties:
vbus-supply: true
# It can be necessary to adjust the PHY settings to compensate parasitics, which can be due
# to USB connector/receptacle, routing, ESD protection component,... Here is the list of
# all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full-
# Speed, LS for Low-Speed)
st,current-boost-microamp:
description: Current boosting in uA
enum: [ 1000, 2000 ]
st,no-lsfs-fb-cap:
description: Disables the LS/FS feedback capacitor
type: boolean
st,decrease-hs-slew-rate:
description: Decreases the HS driver slew rate by 10%
type: boolean
st,tune-hs-dc-level:
description: |
Tunes the HS driver DC level
- <0> normal level
- <1> increases the level by 5 to 7 mV
- <2> increases the level by 10 to 14 mV
- <3> decreases the level by 5 to 7 mV
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 0
st,enable-fs-rftime-tuning:
description: Enables the FS rise/fall tuning option
type: boolean
st,enable-hs-rftime-reduction:
description: Enables the HS rise/fall reduction feature
type: boolean
st,trim-hs-current:
description: |
Controls HS driver current trimming for choke compensation
- <0> = 18.87 mA target current / nominal + 0%
- <1> = 19.165 mA target current / nominal + 1.56%
- <2> = 19.46 mA target current / nominal + 3.12%
- <3> = 19.755 mA target current / nominal + 4.68%
- <4> = 20.05 mA target current / nominal + 6.24%
- <5> = 20.345 mA target current / nominal + 7.8%
- <6> = 20.64 mA target current / nominal + 9.36%
- <7> = 20.935 mA target current / nominal + 10.92%
- <8> = 21.23 mA target current / nominal + 12.48%
- <9> = 21.525 mA target current / nominal + 14.04%
- <10> = 21.82 mA target current / nominal + 15.6%
- <11> = 22.115 mA target current / nominal + 17.16%
- <12> = 22.458 mA target current / nominal + 19.01%
- <13> = 22.755 mA target current / nominal + 20.58%
- <14> = 23.052 mA target current / nominal + 22.16%
- <15> = 23.348 mA target current / nominal + 23.73%
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 0
st,trim-hs-impedance:
description: |
Controls HS driver impedance tuning for choke compensation
- <0> = no impedance offset
- <1> = reduce the impedance by 2 ohms
- <2> = reduce the impedance by 4 ohms
- <3> = reduce the impedance by 6 ohms
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 0
st,tune-squelch-level:
description: |
Tunes the squelch DC threshold value
- <0> = no shift in threshold
- <1> = threshold shift by +7 mV
- <2> = threshold shift by -5 mV
- <3> = threshold shift by +14 mV
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 0
st,enable-hs-rx-gain-eq:
description: Enables the HS Rx gain equalizer
type: boolean
st,tune-hs-rx-offset:
description: |
Adjusts the HS Rx offset
- <0> = no offset
- <1> = offset of +5 mV
- <2> = offset of +10 mV
- <3> = offset of -5 mV
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 0
st,no-hs-ftime-ctrl:
description: Disables the HS fall time control of single ended signals during pre-emphasis
type: boolean
st,no-lsfs-sc:
description: Disables the short circuit protection in LS/FS driver
type: boolean
st,enable-hs-tx-staggering:
description: Enables the basic staggering in HS Tx mode
type: boolean
allOf:
- if:
properties:
......@@ -137,6 +250,14 @@ examples:
reg = <0>;
phy-supply = <&vdd_usb>;
#phy-cells = <0>;
st,tune-hs-dc-level = <2>;
st,enable-fs-rftime-tuning;
st,enable-hs-rftime-reduction;
st,trim-hs-current = <15>;
st,trim-hs-impedance = <1>;
st,tune-squelch-level = <3>;
st,tune-hs-rx-offset = <2>;
st,no-lsfs-sc;
connector {
compatible = "usb-a-connector";
vbus-supply = <&vbus_sw>;
......@@ -147,6 +268,14 @@ examples:
reg = <1>;
phy-supply = <&vdd_usb>;
#phy-cells = <1>;
st,tune-hs-dc-level = <2>;
st,enable-fs-rftime-tuning;
st,enable-hs-rftime-reduction;
st,trim-hs-current = <15>;
st,trim-hs-impedance = <1>;
st,tune-squelch-level = <3>;
st,tune-hs-rx-offset = <2>;
st,no-lsfs-sc;
};
};
...
......@@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm QMP PHY controller
maintainers:
- Manu Gautam <mgautam@codeaurora.org>
- Vinod Koul <vkoul@kernel.org>
description:
QMP phy controller supports physical layer functionality for a number of
......@@ -27,6 +27,7 @@ properties:
- qcom,msm8998-qmp-pcie-phy
- qcom,msm8998-qmp-ufs-phy
- qcom,msm8998-qmp-usb3-phy
- qcom,qcm2290-qmp-usb3-phy
- qcom,sc7180-qmp-usb3-phy
- qcom,sc8180x-qmp-pcie-phy
- qcom,sc8180x-qmp-ufs-phy
......@@ -116,8 +117,6 @@ required:
- clock-names
- resets
- reset-names
- vdda-phy-supply
- vdda-pll-supply
additionalProperties: false
......@@ -150,6 +149,9 @@ allOf:
items:
- const: phy
- const: common
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
......@@ -176,6 +178,9 @@ allOf:
items:
- const: phy
- const: common
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
......@@ -204,6 +209,9 @@ allOf:
- const: phy
- const: common
- const: cfg
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
......@@ -233,6 +241,9 @@ allOf:
items:
- const: phy
- const: common
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
......@@ -253,6 +264,9 @@ allOf:
reset-names:
items:
- const: ufsphy
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
......@@ -278,34 +292,16 @@ allOf:
reset-names:
items:
- const: ufsphy
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq8074-qmp-pcie-phy
then:
properties:
clocks:
items:
- description: pipe clk.
clock-names:
items:
- const: pipe_clk
resets:
items:
- description: reset of phy block.
- description: phy common block reset.
reset-names:
items:
- const: phy
- const: common
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq6018-qmp-pcie-phy
- qcom,ipq8074-qmp-pcie-phy
then:
properties:
clocks:
......@@ -356,6 +352,9 @@ allOf:
reset-names:
items:
- const: phy
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
......@@ -387,6 +386,9 @@ allOf:
items:
- const: phy
- const: common
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
......@@ -414,6 +416,38 @@ allOf:
items:
- const: phy
- const: common
required:
- vdda-phy-supply
- vdda-pll-supply
- if:
properties:
compatible:
contains:
enum:
- qcom,qcm2290-qmp-usb3-phy
then:
properties:
clocks:
items:
- description: Phy config clock.
- description: 19.2 MHz ref clk.
- description: Phy common block aux clock.
clock-names:
items:
- const: cfg_ahb
- const: ref
- const: com_aux
resets:
items:
- description: phy_phy reset.
- description: reset of phy block.
reset-names:
items:
- const: phy_phy
- const: phy
required:
- vdda-phy-supply
- vdda-pll-supply
examples:
- |
......
......@@ -21,6 +21,7 @@ properties:
- qcom,ipq8074-qusb2-phy
- qcom,msm8996-qusb2-phy
- qcom,msm8998-qusb2-phy
- qcom,qcm2290-qusb2-phy
- qcom,sdm660-qusb2-phy
- qcom,ipq6018-qusb2-phy
- qcom,sm4250-qusb2-phy
......@@ -50,6 +51,10 @@ properties:
- const: ref
- const: iface
vdd-supply:
description:
Phandle to 0.9V regulator supply to PHY digital circuit.
vdda-pll-supply:
description:
Phandle to 1.8V regulator supply to PHY refclk pll block.
......@@ -156,6 +161,7 @@ required:
- "#phy-cells"
- clocks
- clock-names
- vdd-supply
- vdda-pll-supply
- vdda-phy-dpdm-supply
- resets
......@@ -174,6 +180,7 @@ examples:
<&gcc GCC_RX1_USB2_CLKREF_CLK>;
clock-names = "cfg_ahb", "ref";
vdd-supply = <&pm8994_l28>;
vdda-pll-supply = <&pm8994_l12>;
vdda-phy-dpdm-supply = <&pm8994_l24>;
......
......@@ -11,13 +11,10 @@ maintainers:
properties:
compatible:
oneOf:
- const: rockchip,rk3288-usb-phy
- items:
- enum:
- rockchip,rk3066a-usb-phy
- rockchip,rk3188-usb-phy
- const: rockchip,rk3288-usb-phy
enum:
- rockchip,rk3066a-usb-phy
- rockchip,rk3188-usb-phy
- rockchip,rk3288-usb-phy
"#address-cells":
const: 1
......
......@@ -667,6 +667,8 @@ patternProperties:
description: Linux-specific binding
"^linx,.*":
description: Linx Technologies
"^liteon,.*":
description: LITE-ON Technology Corp.
"^litex,.*":
description: LiteX SoC builder
"^lltc,.*":
......@@ -1032,6 +1034,8 @@ patternProperties:
description: Shenzhen SEI Robotics Co., Ltd
"^semtech,.*":
description: Semtech Corporation
"^senseair,.*":
description: Senseair AB
"^sensirion,.*":
description: Sensirion AG
"^sensortek,.*":
......
......@@ -287,6 +287,7 @@ IIO
devm_iio_device_register()
devm_iio_dmaengine_buffer_setup()
devm_iio_kfifo_buffer_setup()
devm_iio_map_array_register()
devm_iio_triggered_buffer_setup()
devm_iio_trigger_alloc()
devm_iio_trigger_register()
......
......@@ -223,19 +223,6 @@ whether an input line is differential or single-ended) and instead focus
on the core idea of what the data and process represent (e.g. position
as interpreted from quadrature encoding data).
Userspace Interface
===================
Several sysfs attributes are generated by the Generic Counter interface,
and reside under the /sys/bus/counter/devices/counterX directory, where
counterX refers to the respective counter device. Please see
Documentation/ABI/testing/sysfs-bus-counter for detailed
information on each Generic Counter interface sysfs attribute.
Through these sysfs attributes, programs and scripts may interact with
the Generic Counter paradigm Counts, Signals, and Synapses of respective
counter devices.
Driver API
==========
......@@ -247,11 +234,14 @@ for defining a counter device.
.. kernel-doc:: include/linux/counter.h
:internal:
.. kernel-doc:: drivers/counter/counter.c
.. kernel-doc:: drivers/counter/counter-core.c
:export:
.. kernel-doc:: drivers/counter/counter-chrdev.c
:export:
Implementation
==============
Driver Implementation
=====================
To support a counter device, a driver must first allocate the available
Counter Signals via counter_signal structures. These Signals should
......@@ -267,25 +257,61 @@ respective counter_count structure. These counter_count structures are
set to the counts array member of an allocated counter_device structure
before the Counter is registered to the system.
Driver callbacks should be provided to the counter_device structure via
a constant counter_ops structure in order to communicate with the
device: to read and write various Signals and Counts, and to set and get
the "action mode" and "function mode" for various Synapses and Counts
respectively.
Driver callbacks must be provided to the counter_device structure in
order to communicate with the device: to read and write various Signals
and Counts, and to set and get the "action mode" and "function mode" for
various Synapses and Counts respectively.
A defined counter_device structure may be registered to the system by
passing it to the counter_register function, and unregistered by passing
it to the counter_unregister function. Similarly, the
devm_counter_register and devm_counter_unregister functions may be used
if device memory-managed registration is desired.
Extension sysfs attributes can be created for auxiliary functionality
and data by passing in defined counter_device_ext, counter_count_ext,
and counter_signal_ext structures. In these cases, the
counter_device_ext structure is used for global/miscellaneous exposure
and configuration of the respective Counter device, while the
counter_count_ext and counter_signal_ext structures allow for auxiliary
exposure and configuration of a specific Count or Signal respectively.
devm_counter_register function may be used if device memory-managed
registration is desired.
The struct counter_comp structure is used to define counter extensions
for Signals, Synapses, and Counts.
The "type" member specifies the type of high-level data (e.g. BOOL,
COUNT_DIRECTION, etc.) handled by this extension. The "``*_read``" and
"``*_write``" members can then be set by the counter device driver with
callbacks to handle that data using native C data types (i.e. u8, u64,
etc.).
Convenience macros such as ``COUNTER_COMP_COUNT_U64`` are provided for
use by driver authors. In particular, driver authors are expected to use
the provided macros for standard Counter subsystem attributes in order
to maintain a consistent interface for userspace. For example, a counter
device driver may define several standard attributes like so::
struct counter_comp count_ext[] = {
COUNTER_COMP_DIRECTION(count_direction_read),
COUNTER_COMP_ENABLE(count_enable_read, count_enable_write),
COUNTER_COMP_CEILING(count_ceiling_read, count_ceiling_write),
};
This makes it simple to see, add, and modify the attributes that are
supported by this driver ("direction", "enable", and "ceiling") and to
maintain this code without getting lost in a web of struct braces.
Callbacks must match the function type expected for the respective
component or extension. These function types are defined in the struct
counter_comp structure as the "``*_read``" and "``*_write``" union
members.
The corresponding callback prototypes for the extensions mentioned in
the previous example above would be::
int count_direction_read(struct counter_device *counter,
struct counter_count *count,
enum counter_count_direction *direction);
int count_enable_read(struct counter_device *counter,
struct counter_count *count, u8 *enable);
int count_enable_write(struct counter_device *counter,
struct counter_count *count, u8 enable);
int count_ceiling_read(struct counter_device *counter,
struct counter_count *count, u64 *ceiling);
int count_ceiling_write(struct counter_device *counter,
struct counter_count *count, u64 ceiling);
Determining the type of extension to create is a matter of scope.
......@@ -313,52 +339,235 @@ Determining the type of extension to create is a matter of scope.
chip overheated via a device extension called "error_overtemp":
/sys/bus/counter/devices/counterX/error_overtemp
Architecture
============
When the Generic Counter interface counter module is loaded, the
counter_init function is called which registers a bus_type named
"counter" to the system. Subsequently, when the module is unloaded, the
counter_exit function is called which unregisters the bus_type named
"counter" from the system.
Subsystem Architecture
======================
Counter drivers pass and take data natively (i.e. ``u8``, ``u64``, etc.)
and the shared counter module handles the translation between the sysfs
interface. This guarantees a standard userspace interface for all
counter drivers, and enables a Generic Counter chrdev interface via a
generalized device driver ABI.
A high-level view of how a count value is passed down from a counter
driver is exemplified by the following. The driver callbacks are first
registered to the Counter core component for use by the Counter
userspace interface components::
Driver callbacks registration:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------------------------+
| Counter device driver |
+----------------------------+
| Processes data from device |
+----------------------------+
|
-------------------
/ driver callbacks /
-------------------
|
V
+----------------------+
| Counter core |
+----------------------+
| Routes device driver |
| callbacks to the |
| userspace interfaces |
+----------------------+
|
-------------------
/ driver callbacks /
-------------------
|
+---------------+---------------+
| |
V V
+--------------------+ +---------------------+
| Counter sysfs | | Counter chrdev |
+--------------------+ +---------------------+
| Translates to the | | Translates to the |
| standard Counter | | standard Counter |
| sysfs output | | character device |
+--------------------+ +---------------------+
Thereafter, data can be transferred directly between the Counter device
driver and Counter userspace interface::
Count data request:
~~~~~~~~~~~~~~~~~~~
----------------------
/ Counter device \
+----------------------+
| Count register: 0x28 |
+----------------------+
|
-----------------
/ raw count data /
-----------------
|
V
+----------------------------+
| Counter device driver |
+----------------------------+
| Processes data from device |
|----------------------------|
| Type: u64 |
| Value: 42 |
+----------------------------+
|
----------
/ u64 /
----------
|
+---------------+---------------+
| |
V V
+--------------------+ +---------------------+
| Counter sysfs | | Counter chrdev |
+--------------------+ +---------------------+
| Translates to the | | Translates to the |
| standard Counter | | standard Counter |
| sysfs output | | character device |
|--------------------| |---------------------|
| Type: const char * | | Type: u64 |
| Value: "42" | | Value: 42 |
+--------------------+ +---------------------+
| |
--------------- -----------------------
/ const char * / / struct counter_event /
--------------- -----------------------
| |
| V
| +-----------+
| | read |
| +-----------+
| \ Count: 42 /
| -----------
|
V
+--------------------------------------------------+
| `/sys/bus/counter/devices/counterX/countY/count` |
+--------------------------------------------------+
\ Count: "42" /
--------------------------------------------------
There are four primary components involved:
Counter device driver
---------------------
Communicates with the hardware device to read/write data; e.g. counter
drivers for quadrature encoders, timers, etc.
Counter core
------------
Registers the counter device driver to the system so that the respective
callbacks are called during userspace interaction.
Counter sysfs
-------------
Translates counter data to the standard Counter sysfs interface format
and vice versa.
Please refer to the ``Documentation/ABI/testing/sysfs-bus-counter`` file
for a detailed breakdown of the available Generic Counter interface
sysfs attributes.
Counter chrdev
--------------
Translates Counter events to the standard Counter character device; data
is transferred via standard character device read calls, while Counter
events are configured via ioctl calls.
Sysfs Interface
===============
Counter devices are registered to the system via the counter_register
function, and later removed via the counter_unregister function. The
counter_register function establishes a unique ID for the Counter
device and creates a respective sysfs directory, where X is the
mentioned unique ID:
/sys/bus/counter/devices/counterX
Sysfs attributes are created within the counterX directory to expose
functionality, configurations, and data relating to the Counts, Signals,
and Synapses of the Counter device, as well as options and information
for the Counter device itself.
Each Signal has a directory created to house its relevant sysfs
attributes, where Y is the unique ID of the respective Signal:
/sys/bus/counter/devices/counterX/signalY
Similarly, each Count has a directory created to house its relevant
sysfs attributes, where Y is the unique ID of the respective Count:
/sys/bus/counter/devices/counterX/countY
For a more detailed breakdown of the available Generic Counter interface
sysfs attributes, please refer to the
Documentation/ABI/testing/sysfs-bus-counter file.
Several sysfs attributes are generated by the Generic Counter interface,
and reside under the ``/sys/bus/counter/devices/counterX`` directory,
where ``X`` is to the respective counter device id. Please see
``Documentation/ABI/testing/sysfs-bus-counter`` for detailed information
on each Generic Counter interface sysfs attribute.
The Signals and Counts associated with the Counter device are registered
to the system as well by the counter_register function. The
signal_read/signal_write driver callbacks are associated with their
respective Signal attributes, while the count_read/count_write and
function_get/function_set driver callbacks are associated with their
respective Count attributes; similarly, the same is true for the
action_get/action_set driver callbacks and their respective Synapse
attributes. If a driver callback is left undefined, then the respective
read/write permission is left disabled for the relevant attributes.
Through these sysfs attributes, programs and scripts may interact with
the Generic Counter paradigm Counts, Signals, and Synapses of respective
counter devices.
Similarly, extension sysfs attributes are created for the defined
counter_device_ext, counter_count_ext, and counter_signal_ext
structures that are passed in.
Counter Character Device
========================
Counter character device nodes are created under the ``/dev`` directory
as ``counterX``, where ``X`` is the respective counter device id.
Defines for the standard Counter data types are exposed via the
userspace ``include/uapi/linux/counter.h`` file.
Counter events
--------------
Counter device drivers can support Counter events by utilizing the
``counter_push_event`` function::
void counter_push_event(struct counter_device *const counter, const u8 event,
const u8 channel);
The event id is specified by the ``event`` parameter; the event channel
id is specified by the ``channel`` parameter. When this function is
called, the Counter data associated with the respective event is
gathered, and a ``struct counter_event`` is generated for each datum and
pushed to userspace.
Counter events can be configured by users to report various Counter
data of interest. This can be conceptualized as a list of Counter
component read calls to perform. For example:
+------------------------+------------------------+
| COUNTER_EVENT_OVERFLOW | COUNTER_EVENT_INDEX |
+========================+========================+
| Channel 0 | Channel 0 |
+------------------------+------------------------+
| * Count 0 | * Signal 0 |
| * Count 1 | * Signal 0 Extension 0 |
| * Signal 3 | * Extension 4 |
| * Count 4 Extension 2 +------------------------+
| * Signal 5 Extension 0 | Channel 1 |
| +------------------------+
| | * Signal 4 |
| | * Signal 4 Extension 0 |
| | * Count 7 |
+------------------------+------------------------+
When ``counter_push_event(counter, COUNTER_EVENT_INDEX, 1)`` is called
for example, it will go down the list for the ``COUNTER_EVENT_INDEX``
event channel 1 and execute the read callbacks for Signal 4, Signal 4
Extension 0, and Count 7 -- the data returned for each is pushed to a
kfifo as a ``struct counter_event``, which userspace can retrieve via a
standard read operation on the respective character device node.
Userspace
---------
Userspace applications can configure Counter events via ioctl operations
on the Counter character device node. There following ioctl codes are
supported and provided by the ``linux/counter.h`` userspace header file:
* :c:macro:`COUNTER_ADD_WATCH_IOCTL`
* :c:macro:`COUNTER_ENABLE_EVENTS_IOCTL`
* :c:macro:`COUNTER_DISABLE_EVENTS_IOCTL`
To configure events to gather Counter data, users first populate a
``struct counter_watch`` with the relevant event id, event channel id,
and the information for the desired Counter component from which to
read, and then pass it via the ``COUNTER_ADD_WATCH_IOCTL`` ioctl
command.
Note that an event can be watched without gathering Counter data by
setting the ``component.type`` member equal to
``COUNTER_COMPONENT_NONE``. With this configuration the Counter
character device will simply populate the event timestamps for those
respective ``struct counter_event`` elements and ignore the component
value.
The ``COUNTER_ADD_WATCH_IOCTL`` command will buffer these Counter
watches. When ready, the ``COUNTER_ENABLE_EVENTS_IOCTL`` ioctl command
may be used to activate these Counter watches.
Userspace applications can then execute a ``read`` operation (optionally
calling ``poll`` first) on the Counter character device node to retrieve
``struct counter_event`` elements with the desired data.
......@@ -88,6 +88,7 @@ Code Seq# Include File Comments
<http://infiniband.sourceforge.net/>
0x20 all drivers/cdrom/cm206.h
0x22 all scsi/sg.h
0x3E 00-0F linux/counter.h <mailto:linux-iio@vger.kernel.org>
'!' 00-1F uapi/linux/seccomp.h
'#' 00-3F IEEE 1394 Subsystem
Block for the entire subsystem
......
......@@ -14,12 +14,15 @@ instances [1].
For example, an application that processes sensitive data and runs in a VM,
can be separated from other applications running in the same VM. This
application then runs in a separate VM than the primary VM, namely an enclave.
It runs alongside the VM that spawned it. This setup matches low latency
applications needs.
An enclave runs alongside the VM that spawned it. This setup matches low latency
applications needs. The resources that are allocated for the enclave, such as
memory and CPUs, are carved out of the primary VM. Each enclave is mapped to a
process running in the primary VM, that communicates with the NE driver via an
ioctl interface.
The current supported architectures for the NE kernel driver, available in the
upstream Linux kernel, are x86 and ARM64.
The resources that are allocated for the enclave, such as memory and CPUs, are
carved out of the primary VM. Each enclave is mapped to a process running in the
primary VM, that communicates with the NE kernel driver via an ioctl interface.
In this sense, there are two components:
......@@ -43,8 +46,8 @@ for the enclave VM. An enclave does not have persistent storage attached.
The memory regions carved out of the primary VM and given to an enclave need to
be aligned 2 MiB / 1 GiB physically contiguous memory regions (or multiple of
this size e.g. 8 MiB). The memory can be allocated e.g. by using hugetlbfs from
user space [2][3]. The memory size for an enclave needs to be at least 64 MiB.
The enclave memory and CPUs need to be from the same NUMA node.
user space [2][3][7]. The memory size for an enclave needs to be at least
64 MiB. The enclave memory and CPUs need to be from the same NUMA node.
An enclave runs on dedicated cores. CPU 0 and its CPU siblings need to remain
available for the primary VM. A CPU pool has to be set for NE purposes by an
......@@ -61,7 +64,7 @@ device is placed in memory below the typical 4 GiB.
The application that runs in the enclave needs to be packaged in an enclave
image together with the OS ( e.g. kernel, ramdisk, init ) that will run in the
enclave VM. The enclave VM has its own kernel and follows the standard Linux
boot protocol [6].
boot protocol [6][8].
The kernel bzImage, the kernel command line, the ramdisk(s) are part of the
Enclave Image Format (EIF); plus an EIF header including metadata such as magic
......@@ -93,3 +96,5 @@ enclave process can exit.
[4] https://www.kernel.org/doc/html/latest/admin-guide/kernel-parameters.html
[5] https://man7.org/linux/man-pages/man7/vsock.7.html
[6] https://www.kernel.org/doc/html/latest/x86/boot.html
[7] https://www.kernel.org/doc/html/latest/arm64/hugetlbpage.html
[8] https://www.kernel.org/doc/html/latest/arm64/booting.html
......@@ -581,6 +581,12 @@ L: platform-driver-x86@vger.kernel.org
S: Maintained
F: drivers/platform/x86/adv_swbutton.c
ADXL313 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
M: Lucas Stankus <lucas.p.stankus@gmail.com>
S: Supported
F: Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml
F: drivers/iio/accel/adxl313*
ADXL34X THREE-AXIS DIGITAL ACCELEROMETER DRIVER (ADXL345/ADXL346)
M: Michael Hennerich <michael.hennerich@analog.com>
S: Supported
......@@ -589,6 +595,16 @@ W: http://ez.analog.com/community/linux-device-drivers
F: Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml
F: drivers/input/misc/adxl34x.c
ADXL355 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
M: Puranjay Mohan <puranjay12@gmail.com>
L: linux-iio@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
F: drivers/iio/accel/adxl355.h
F: drivers/iio/accel/adxl355_core.c
F: drivers/iio/accel/adxl355_i2c.c
F: drivers/iio/accel/adxl355_spi.c
ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
M: Michael Hennerich <michael.hennerich@analog.com>
S: Supported
......@@ -4852,7 +4868,8 @@ F: Documentation/ABI/testing/sysfs-bus-counter
F: Documentation/driver-api/generic-counter.rst
F: drivers/counter/
F: include/linux/counter.h
F: include/linux/counter_enum.h
F: include/uapi/linux/counter.h
F: tools/counter/
CP2615 I2C DRIVER
M: Bence Csókás <bence98@sch.bme.hu>
......@@ -12326,7 +12343,8 @@ F: arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
MHI BUS
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
M: Hemant Kumar <hemantk@codeaurora.org>
R: Hemant Kumar <hemantk@codeaurora.org>
L: mhi@lists.linux.dev
L: linux-arm-msm@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi.git
......@@ -13614,6 +13632,13 @@ S: Maintained
F: Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
F: drivers/gpu/drm/imx/dcss/
NXP i.MX 8QXP ADC DRIVER
M: Cai Huoqing <caihuoqing@baidu.com>
L: linux-iio@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
F: drivers/iio/adc/imx8qxp-adc.c
NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
......@@ -17027,6 +17052,13 @@ S: Maintained
F: drivers/misc/phantom.c
F: include/uapi/linux/phantom.h
SENSEAIR SUNRISE 006-0-0007
M: Jacopo Mondi <jacopo@jmondi.org>
S: Maintained
F: Documentation/ABI/testing/sysfs-bus-iio-chemical-sunrise-co2
F: Documentation/devicetree/bindings/iio/chemical/senseair,sunrise.yaml
F: drivers/iio/chemical/sunrise_co2.c
SENSIRION SCD30 CARBON DIOXIDE SENSOR DRIVER
M: Tomasz Duszynski <tomasz.duszynski@octakon.com>
S: Maintained
......@@ -17036,6 +17068,12 @@ F: drivers/iio/chemical/scd30_core.c
F: drivers/iio/chemical/scd30_i2c.c
F: drivers/iio/chemical/scd30_serial.c
SENSIRION SCD4X CARBON DIOXIDE SENSOR DRIVER
M: Roan van Dijk <roan@protonic.nl>
S: Maintained
F: Documentation/devicetree/bindings/iio/chemical/sensirion,scd4x.yaml
F: drivers/iio/chemical/scd4x.c
SENSIRION SGP40 GAS SENSOR DRIVER
M: Andreas Klinger <ak@it-klinger.de>
S: Maintained
......
......@@ -673,7 +673,6 @@ config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
config ARM64_ERRATUM_2119858
bool "Cortex-A710: 2119858: workaround TRBE overwriting trace data in FILL mode"
default y
depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
depends on CORESIGHT_TRBE
select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
help
......@@ -692,7 +691,6 @@ config ARM64_ERRATUM_2119858
config ARM64_ERRATUM_2139208
bool "Neoverse-N2: 2139208: workaround TRBE overwriting trace data in FILL mode"
default y
depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
depends on CORESIGHT_TRBE
select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
help
......@@ -746,7 +744,6 @@ config ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE
config ARM64_ERRATUM_2253138
bool "Neoverse-N2: 2253138: workaround TRBE writing to address out-of-range"
depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
depends on CORESIGHT_TRBE
default y
select ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE
......@@ -765,7 +762,6 @@ config ARM64_ERRATUM_2253138
config ARM64_ERRATUM_2224489
bool "Cortex-A710: 2224489: workaround TRBE writing to address out-of-range"
depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
depends on CORESIGHT_TRBE
default y
select ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE
......
......@@ -1870,7 +1870,7 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
binder_dec_node(buffer->target_node, 1, 0);
off_start_offset = ALIGN(buffer->data_size, sizeof(void *));
off_end_offset = is_failure ? failed_at :
off_end_offset = is_failure && failed_at ? failed_at :
off_start_offset + buffer->offsets_size;
for (buffer_offset = off_start_offset; buffer_offset < off_end_offset;
buffer_offset += sizeof(binder_size_t)) {
......@@ -1956,9 +1956,8 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
binder_size_t fd_buf_size;
binder_size_t num_valid;
if (proc->tsk != current->group_leader) {
if (is_failure) {
/*
* Nothing to do if running in sender context
* The fd fixups have not been applied so no
* fds need to be closed.
*/
......@@ -3176,6 +3175,7 @@ static void binder_transaction(struct binder_proc *proc,
* binder_free_buf() - free the specified buffer
* @proc: binder proc that owns buffer
* @buffer: buffer to be freed
* @is_failure: failed to send transaction
*
* If buffer for an async transaction, enqueue the next async
* transaction from the node.
......@@ -3185,7 +3185,7 @@ static void binder_transaction(struct binder_proc *proc,
static void
binder_free_buf(struct binder_proc *proc,
struct binder_thread *thread,
struct binder_buffer *buffer)
struct binder_buffer *buffer, bool is_failure)
{
binder_inner_proc_lock(proc);
if (buffer->transaction) {
......@@ -3213,7 +3213,7 @@ binder_free_buf(struct binder_proc *proc,
binder_node_inner_unlock(buf_node);
}
trace_binder_transaction_buffer_release(buffer);
binder_transaction_buffer_release(proc, thread, buffer, 0, false);
binder_transaction_buffer_release(proc, thread, buffer, 0, is_failure);
binder_alloc_free_buf(&proc->alloc, buffer);
}
......@@ -3415,7 +3415,7 @@ static int binder_thread_write(struct binder_proc *proc,
proc->pid, thread->pid, (u64)data_ptr,
buffer->debug_id,
buffer->transaction ? "active" : "finished");
binder_free_buf(proc, thread, buffer);
binder_free_buf(proc, thread, buffer, false);
break;
}
......@@ -4108,7 +4108,7 @@ static int binder_thread_read(struct binder_proc *proc,
buffer->transaction = NULL;
binder_cleanup_transaction(t, "fd fixups failed",
BR_FAILED_REPLY);
binder_free_buf(proc, thread, buffer);
binder_free_buf(proc, thread, buffer, true);
binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
"%d:%d %stransaction %d fd fixups failed %d/%d, line %d\n",
proc->pid, thread->pid,
......
......@@ -495,6 +495,10 @@ static ssize_t read_iter_zero(struct kiocb *iocb, struct iov_iter *iter)
written += n;
if (signal_pending(current))
return written ? written : -ERESTARTSYS;
if (!need_resched())
continue;
if (iocb->ki_flags & IOCB_NOWAIT)
return written ? written : -EAGAIN;
cond_resched();
}
return written;
......@@ -696,11 +700,11 @@ static const struct memdev {
#ifdef CONFIG_DEVMEM
[DEVMEM_MINOR] = { "mem", 0, &mem_fops, FMODE_UNSIGNED_OFFSET },
#endif
[3] = { "null", 0666, &null_fops, 0 },
[3] = { "null", 0666, &null_fops, FMODE_NOWAIT },
#ifdef CONFIG_DEVPORT
[4] = { "port", 0, &port_fops, 0 },
#endif
[5] = { "zero", 0666, &zero_fops, 0 },
[5] = { "zero", 0666, &zero_fops, FMODE_NOWAIT },
[7] = { "full", 0666, &full_fops, 0 },
[8] = { "random", 0666, &random_fops, 0 },
[9] = { "urandom", 0666, &urandom_fops, 0 },
......
......@@ -87,13 +87,8 @@ struct xilly_channel {
};
struct xilly_endpoint {
/*
* One of pdev and dev is always NULL, and the other is a valid
* pointer, depending on the type of device
*/
struct pci_dev *pdev;
struct device *dev;
struct xilly_endpoint_hardware *ephw;
struct module *owner;
int dma_using_dac; /* =1 if 64-bit DMA is used, =0 otherwise. */
__iomem void *registers;
......@@ -113,25 +108,8 @@ struct xilly_endpoint {
unsigned int msg_buf_size;
};
struct xilly_endpoint_hardware {
struct module *owner;
void (*hw_sync_sgl_for_cpu)(struct xilly_endpoint *,
dma_addr_t,
size_t,
int);
void (*hw_sync_sgl_for_device)(struct xilly_endpoint *,
dma_addr_t,
size_t,
int);
int (*map_single)(struct xilly_endpoint *,
void *,
size_t,
int,
dma_addr_t *);
};
struct xilly_mapping {
void *device;
struct device *device;
dma_addr_t dma_addr;
size_t size;
int direction;
......@@ -139,10 +117,7 @@ struct xilly_mapping {
irqreturn_t xillybus_isr(int irq, void *data);
struct xilly_endpoint *xillybus_init_endpoint(struct pci_dev *pdev,
struct device *dev,
struct xilly_endpoint_hardware
*ephw);
struct xilly_endpoint *xillybus_init_endpoint(struct device *dev);
int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint);
......
......@@ -122,10 +122,8 @@ irqreturn_t xillybus_isr(int irq, void *data)
buf = ep->msgbuf_addr;
buf_size = ep->msg_buf_size/sizeof(u32);
ep->ephw->hw_sync_sgl_for_cpu(ep,
ep->msgbuf_dma_addr,
ep->msg_buf_size,
DMA_FROM_DEVICE);
dma_sync_single_for_cpu(ep->dev, ep->msgbuf_dma_addr,
ep->msg_buf_size, DMA_FROM_DEVICE);
for (i = 0; i < buf_size; i += 2) {
if (((buf[i+1] >> 28) & 0xf) != ep->msg_counter) {
......@@ -140,11 +138,10 @@ irqreturn_t xillybus_isr(int irq, void *data)
dev_err(ep->dev,
"Lost sync with interrupt messages. Stopping.\n");
} else {
ep->ephw->hw_sync_sgl_for_device(
ep,
ep->msgbuf_dma_addr,
ep->msg_buf_size,
DMA_FROM_DEVICE);
dma_sync_single_for_device(ep->dev,
ep->msgbuf_dma_addr,
ep->msg_buf_size,
DMA_FROM_DEVICE);
iowrite32(0x01, /* Message NACK */
ep->registers + fpga_msg_ctrl_reg);
......@@ -275,10 +272,8 @@ irqreturn_t xillybus_isr(int irq, void *data)
}
}
ep->ephw->hw_sync_sgl_for_device(ep,
ep->msgbuf_dma_addr,
ep->msg_buf_size,
DMA_FROM_DEVICE);
dma_sync_single_for_device(ep->dev, ep->msgbuf_dma_addr,
ep->msg_buf_size, DMA_FROM_DEVICE);
ep->msg_counter = (ep->msg_counter + 1) & 0xf;
ep->failed_messages = 0;
......@@ -304,6 +299,47 @@ struct xilly_alloc_state {
u32 regdirection;
};
static void xilly_unmap(void *ptr)
{
struct xilly_mapping *data = ptr;
dma_unmap_single(data->device, data->dma_addr,
data->size, data->direction);
kfree(ptr);
}
static int xilly_map_single(struct xilly_endpoint *ep,
void *ptr,
size_t size,
int direction,
dma_addr_t *ret_dma_handle
)
{
dma_addr_t addr;
struct xilly_mapping *this;
this = kzalloc(sizeof(*this), GFP_KERNEL);
if (!this)
return -ENOMEM;
addr = dma_map_single(ep->dev, ptr, size, direction);
if (dma_mapping_error(ep->dev, addr)) {
kfree(this);
return -ENODEV;
}
this->device = ep->dev;
this->dma_addr = addr;
this->size = size;
this->direction = direction;
*ret_dma_handle = addr;
return devm_add_action_or_reset(ep->dev, xilly_unmap, this);
}
static int xilly_get_dma_buffers(struct xilly_endpoint *ep,
struct xilly_alloc_state *s,
struct xilly_buffer **buffers,
......@@ -355,9 +391,9 @@ static int xilly_get_dma_buffers(struct xilly_endpoint *ep,
s->left_of_salami = allocsize;
}
rc = ep->ephw->map_single(ep, s->salami,
bytebufsize, s->direction,
&dma_addr);
rc = xilly_map_single(ep, s->salami,
bytebufsize, s->direction,
&dma_addr);
if (rc)
return rc;
......@@ -620,11 +656,10 @@ static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
return -ENODEV;
}
endpoint->ephw->hw_sync_sgl_for_cpu(
channel->endpoint,
channel->wr_buffers[0]->dma_addr,
channel->wr_buf_size,
DMA_FROM_DEVICE);
dma_sync_single_for_cpu(channel->endpoint->dev,
channel->wr_buffers[0]->dma_addr,
channel->wr_buf_size,
DMA_FROM_DEVICE);
if (channel->wr_buffers[0]->end_offset != endpoint->idtlen) {
dev_err(endpoint->dev,
......@@ -735,11 +770,10 @@ static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
if (!empty) { /* Go on, now without the spinlock */
if (bufpos == 0) /* Position zero means it's virgin */
channel->endpoint->ephw->hw_sync_sgl_for_cpu(
channel->endpoint,
channel->wr_buffers[bufidx]->dma_addr,
channel->wr_buf_size,
DMA_FROM_DEVICE);
dma_sync_single_for_cpu(channel->endpoint->dev,
channel->wr_buffers[bufidx]->dma_addr,
channel->wr_buf_size,
DMA_FROM_DEVICE);
if (copy_to_user(
userbuf,
......@@ -751,11 +785,10 @@ static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
bytes_done += howmany;
if (bufferdone) {
channel->endpoint->ephw->hw_sync_sgl_for_device(
channel->endpoint,
channel->wr_buffers[bufidx]->dma_addr,
channel->wr_buf_size,
DMA_FROM_DEVICE);
dma_sync_single_for_device(channel->endpoint->dev,
channel->wr_buffers[bufidx]->dma_addr,
channel->wr_buf_size,
DMA_FROM_DEVICE);
/*
* Tell FPGA the buffer is done with. It's an
......@@ -1055,11 +1088,10 @@ static int xillybus_myflush(struct xilly_channel *channel, long timeout)
else
channel->rd_host_buf_idx++;
channel->endpoint->ephw->hw_sync_sgl_for_device(
channel->endpoint,
channel->rd_buffers[bufidx]->dma_addr,
channel->rd_buf_size,
DMA_TO_DEVICE);
dma_sync_single_for_device(channel->endpoint->dev,
channel->rd_buffers[bufidx]->dma_addr,
channel->rd_buf_size,
DMA_TO_DEVICE);
mutex_lock(&channel->endpoint->register_mutex);
......@@ -1275,11 +1307,10 @@ static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
if ((bufpos == 0) || /* Zero means it's virgin */
(channel->rd_leftovers[3] != 0)) {
channel->endpoint->ephw->hw_sync_sgl_for_cpu(
channel->endpoint,
channel->rd_buffers[bufidx]->dma_addr,
channel->rd_buf_size,
DMA_TO_DEVICE);
dma_sync_single_for_cpu(channel->endpoint->dev,
channel->rd_buffers[bufidx]->dma_addr,
channel->rd_buf_size,
DMA_TO_DEVICE);
/* Virgin, but leftovers are due */
for (i = 0; i < bufpos; i++)
......@@ -1297,11 +1328,10 @@ static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
bytes_done += howmany;
if (bufferdone) {
channel->endpoint->ephw->hw_sync_sgl_for_device(
channel->endpoint,
channel->rd_buffers[bufidx]->dma_addr,
channel->rd_buf_size,
DMA_TO_DEVICE);
dma_sync_single_for_device(channel->endpoint->dev,
channel->rd_buffers[bufidx]->dma_addr,
channel->rd_buf_size,
DMA_TO_DEVICE);
mutex_lock(&channel->endpoint->register_mutex);
......@@ -1772,10 +1802,7 @@ static const struct file_operations xillybus_fops = {
.poll = xillybus_poll,
};
struct xilly_endpoint *xillybus_init_endpoint(struct pci_dev *pdev,
struct device *dev,
struct xilly_endpoint_hardware
*ephw)
struct xilly_endpoint *xillybus_init_endpoint(struct device *dev)
{
struct xilly_endpoint *endpoint;
......@@ -1783,9 +1810,7 @@ struct xilly_endpoint *xillybus_init_endpoint(struct pci_dev *pdev,
if (!endpoint)
return NULL;
endpoint->pdev = pdev;
endpoint->dev = dev;
endpoint->ephw = ephw;
endpoint->msg_counter = 0x0b;
endpoint->failed_messages = 0;
endpoint->fatal_error = 0;
......@@ -1912,7 +1937,7 @@ int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
goto failed_idt;
rc = xillybus_init_chrdev(dev, &xillybus_fops,
endpoint->ephw->owner, endpoint,
endpoint->owner, endpoint,
idt_handle.names,
idt_handle.names_len,
endpoint->num_channels,
......
......@@ -31,102 +31,22 @@ static const struct of_device_id xillybus_of_match[] = {
MODULE_DEVICE_TABLE(of, xillybus_of_match);
static void xilly_dma_sync_single_for_cpu_of(struct xilly_endpoint *ep,
dma_addr_t dma_handle,
size_t size,
int direction)
{
dma_sync_single_for_cpu(ep->dev, dma_handle, size, direction);
}
static void xilly_dma_sync_single_for_device_of(struct xilly_endpoint *ep,
dma_addr_t dma_handle,
size_t size,
int direction)
{
dma_sync_single_for_device(ep->dev, dma_handle, size, direction);
}
static void xilly_dma_sync_single_nop(struct xilly_endpoint *ep,
dma_addr_t dma_handle,
size_t size,
int direction)
{
}
static void xilly_of_unmap(void *ptr)
{
struct xilly_mapping *data = ptr;
dma_unmap_single(data->device, data->dma_addr,
data->size, data->direction);
kfree(ptr);
}
static int xilly_map_single_of(struct xilly_endpoint *ep,
void *ptr,
size_t size,
int direction,
dma_addr_t *ret_dma_handle
)
{
dma_addr_t addr;
struct xilly_mapping *this;
this = kzalloc(sizeof(*this), GFP_KERNEL);
if (!this)
return -ENOMEM;
addr = dma_map_single(ep->dev, ptr, size, direction);
if (dma_mapping_error(ep->dev, addr)) {
kfree(this);
return -ENODEV;
}
this->device = ep->dev;
this->dma_addr = addr;
this->size = size;
this->direction = direction;
*ret_dma_handle = addr;
return devm_add_action_or_reset(ep->dev, xilly_of_unmap, this);
}
static struct xilly_endpoint_hardware of_hw = {
.owner = THIS_MODULE,
.hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_of,
.hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_of,
.map_single = xilly_map_single_of,
};
static struct xilly_endpoint_hardware of_hw_coherent = {
.owner = THIS_MODULE,
.hw_sync_sgl_for_cpu = xilly_dma_sync_single_nop,
.hw_sync_sgl_for_device = xilly_dma_sync_single_nop,
.map_single = xilly_map_single_of,
};
static int xilly_drv_probe(struct platform_device *op)
{
struct device *dev = &op->dev;
struct xilly_endpoint *endpoint;
int rc;
int irq;
struct xilly_endpoint_hardware *ephw = &of_hw;
if (of_property_read_bool(dev->of_node, "dma-coherent"))
ephw = &of_hw_coherent;
endpoint = xillybus_init_endpoint(NULL, dev, ephw);
endpoint = xillybus_init_endpoint(dev);
if (!endpoint)
return -ENOMEM;
dev_set_drvdata(dev, endpoint);
endpoint->owner = THIS_MODULE;
endpoint->registers = devm_platform_ioremap_resource(op, 0);
if (IS_ERR(endpoint->registers))
return PTR_ERR(endpoint->registers);
......
......@@ -32,110 +32,21 @@ static const struct pci_device_id xillyids[] = {
{ /* End: all zeroes */ }
};
static int xilly_pci_direction(int direction)
{
switch (direction) {
case DMA_TO_DEVICE:
return PCI_DMA_TODEVICE;
case DMA_FROM_DEVICE:
return PCI_DMA_FROMDEVICE;
default:
return PCI_DMA_BIDIRECTIONAL;
}
}
static void xilly_dma_sync_single_for_cpu_pci(struct xilly_endpoint *ep,
dma_addr_t dma_handle,
size_t size,
int direction)
{
pci_dma_sync_single_for_cpu(ep->pdev,
dma_handle,
size,
xilly_pci_direction(direction));
}
static void xilly_dma_sync_single_for_device_pci(struct xilly_endpoint *ep,
dma_addr_t dma_handle,
size_t size,
int direction)
{
pci_dma_sync_single_for_device(ep->pdev,
dma_handle,
size,
xilly_pci_direction(direction));
}
static void xilly_pci_unmap(void *ptr)
{
struct xilly_mapping *data = ptr;
pci_unmap_single(data->device, data->dma_addr,
data->size, data->direction);
kfree(ptr);
}
/*
* Map either through the PCI DMA mapper or the non_PCI one. Behind the
* scenes exactly the same functions are called with the same parameters,
* but that can change.
*/
static int xilly_map_single_pci(struct xilly_endpoint *ep,
void *ptr,
size_t size,
int direction,
dma_addr_t *ret_dma_handle
)
{
int pci_direction;
dma_addr_t addr;
struct xilly_mapping *this;
this = kzalloc(sizeof(*this), GFP_KERNEL);
if (!this)
return -ENOMEM;
pci_direction = xilly_pci_direction(direction);
addr = pci_map_single(ep->pdev, ptr, size, pci_direction);
if (pci_dma_mapping_error(ep->pdev, addr)) {
kfree(this);
return -ENODEV;
}
this->device = ep->pdev;
this->dma_addr = addr;
this->size = size;
this->direction = pci_direction;
*ret_dma_handle = addr;
return devm_add_action_or_reset(ep->dev, xilly_pci_unmap, this);
}
static struct xilly_endpoint_hardware pci_hw = {
.owner = THIS_MODULE,
.hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_pci,
.hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_pci,
.map_single = xilly_map_single_pci,
};
static int xilly_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct xilly_endpoint *endpoint;
int rc;
endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw);
endpoint = xillybus_init_endpoint(&pdev->dev);
if (!endpoint)
return -ENOMEM;
pci_set_drvdata(pdev, endpoint);
endpoint->owner = THIS_MODULE;
rc = pcim_enable_device(pdev);
if (rc) {
dev_err(endpoint->dev,
......@@ -185,9 +96,9 @@ static int xilly_probe(struct pci_dev *pdev,
* So go for the 64-bit mask only when failing is the other option.
*/
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
endpoint->dma_using_dac = 0;
} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
} else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
endpoint->dma_using_dac = 1;
} else {
dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n");
......
......@@ -1912,6 +1912,7 @@ static int xillyusb_setup_base_eps(struct xillyusb_dev *xdev)
dealloc:
endpoint_dealloc(xdev->msg_ep); /* Also frees FIFO mem if allocated */
xdev->msg_ep = NULL;
return -ENOMEM;
}
......
......@@ -32,6 +32,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include "../comedi_usb.h"
......@@ -237,22 +238,42 @@ static int dt9812_read_info(struct comedi_device *dev,
{
struct usb_device *usb = comedi_to_usb_dev(dev);
struct dt9812_private *devpriv = dev->private;
struct dt9812_usb_cmd cmd;
struct dt9812_usb_cmd *cmd;
size_t tbuf_size;
int count, ret;
void *tbuf;
cmd.cmd = cpu_to_le32(DT9812_R_FLASH_DATA);
cmd.u.flash_data_info.address =
tbuf_size = max(sizeof(*cmd), buf_size);
tbuf = kzalloc(tbuf_size, GFP_KERNEL);
if (!tbuf)
return -ENOMEM;
cmd = tbuf;
cmd->cmd = cpu_to_le32(DT9812_R_FLASH_DATA);
cmd->u.flash_data_info.address =
cpu_to_le16(DT9812_DIAGS_BOARD_INFO_ADDR + offset);
cmd.u.flash_data_info.numbytes = cpu_to_le16(buf_size);
cmd->u.flash_data_info.numbytes = cpu_to_le16(buf_size);
/* DT9812 only responds to 32 byte writes!! */
ret = usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
&cmd, 32, &count, DT9812_USB_TIMEOUT);
cmd, sizeof(*cmd), &count, DT9812_USB_TIMEOUT);
if (ret)
return ret;
goto out;
ret = usb_bulk_msg(usb, usb_rcvbulkpipe(usb, devpriv->cmd_rd.addr),
tbuf, buf_size, &count, DT9812_USB_TIMEOUT);
if (!ret) {
if (count == buf_size)
memcpy(buf, tbuf, buf_size);
else
ret = -EREMOTEIO;
}
out:
kfree(tbuf);
return usb_bulk_msg(usb, usb_rcvbulkpipe(usb, devpriv->cmd_rd.addr),
buf, buf_size, &count, DT9812_USB_TIMEOUT);
return ret;
}
static int dt9812_read_multiple_registers(struct comedi_device *dev,
......@@ -261,22 +282,42 @@ static int dt9812_read_multiple_registers(struct comedi_device *dev,
{
struct usb_device *usb = comedi_to_usb_dev(dev);
struct dt9812_private *devpriv = dev->private;
struct dt9812_usb_cmd cmd;
struct dt9812_usb_cmd *cmd;
int i, count, ret;
size_t buf_size;
void *buf;
cmd.cmd = cpu_to_le32(DT9812_R_MULTI_BYTE_REG);
cmd.u.read_multi_info.count = reg_count;
buf_size = max_t(size_t, sizeof(*cmd), reg_count);
buf = kzalloc(buf_size, GFP_KERNEL);
if (!buf)
return -ENOMEM;
cmd = buf;
cmd->cmd = cpu_to_le32(DT9812_R_MULTI_BYTE_REG);
cmd->u.read_multi_info.count = reg_count;
for (i = 0; i < reg_count; i++)
cmd.u.read_multi_info.address[i] = address[i];
cmd->u.read_multi_info.address[i] = address[i];
/* DT9812 only responds to 32 byte writes!! */
ret = usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
&cmd, 32, &count, DT9812_USB_TIMEOUT);
cmd, sizeof(*cmd), &count, DT9812_USB_TIMEOUT);
if (ret)
return ret;
goto out;
ret = usb_bulk_msg(usb, usb_rcvbulkpipe(usb, devpriv->cmd_rd.addr),
buf, reg_count, &count, DT9812_USB_TIMEOUT);
if (!ret) {
if (count == reg_count)
memcpy(value, buf, reg_count);
else
ret = -EREMOTEIO;
}
out:
kfree(buf);
return usb_bulk_msg(usb, usb_rcvbulkpipe(usb, devpriv->cmd_rd.addr),
value, reg_count, &count, DT9812_USB_TIMEOUT);
return ret;
}
static int dt9812_write_multiple_registers(struct comedi_device *dev,
......@@ -285,19 +326,27 @@ static int dt9812_write_multiple_registers(struct comedi_device *dev,
{
struct usb_device *usb = comedi_to_usb_dev(dev);
struct dt9812_private *devpriv = dev->private;
struct dt9812_usb_cmd cmd;
struct dt9812_usb_cmd *cmd;
int i, count;
int ret;
cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
cmd.cmd = cpu_to_le32(DT9812_W_MULTI_BYTE_REG);
cmd.u.read_multi_info.count = reg_count;
cmd->cmd = cpu_to_le32(DT9812_W_MULTI_BYTE_REG);
cmd->u.read_multi_info.count = reg_count;
for (i = 0; i < reg_count; i++) {
cmd.u.write_multi_info.write[i].address = address[i];
cmd.u.write_multi_info.write[i].value = value[i];
cmd->u.write_multi_info.write[i].address = address[i];
cmd->u.write_multi_info.write[i].value = value[i];
}
/* DT9812 only responds to 32 byte writes!! */
return usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
&cmd, 32, &count, DT9812_USB_TIMEOUT);
ret = usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
cmd, sizeof(*cmd), &count, DT9812_USB_TIMEOUT);
kfree(cmd);
return ret;
}
static int dt9812_rmw_multiple_registers(struct comedi_device *dev,
......@@ -306,17 +355,25 @@ static int dt9812_rmw_multiple_registers(struct comedi_device *dev,
{
struct usb_device *usb = comedi_to_usb_dev(dev);
struct dt9812_private *devpriv = dev->private;
struct dt9812_usb_cmd cmd;
struct dt9812_usb_cmd *cmd;
int i, count;
int ret;
cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
cmd.cmd = cpu_to_le32(DT9812_RMW_MULTI_BYTE_REG);
cmd.u.rmw_multi_info.count = reg_count;
cmd->cmd = cpu_to_le32(DT9812_RMW_MULTI_BYTE_REG);
cmd->u.rmw_multi_info.count = reg_count;
for (i = 0; i < reg_count; i++)
cmd.u.rmw_multi_info.rmw[i] = rmw[i];
cmd->u.rmw_multi_info.rmw[i] = rmw[i];
/* DT9812 only responds to 32 byte writes!! */
return usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
&cmd, 32, &count, DT9812_USB_TIMEOUT);
ret = usb_bulk_msg(usb, usb_sndbulkpipe(usb, devpriv->cmd_wr.addr),
cmd, sizeof(*cmd), &count, DT9812_USB_TIMEOUT);
kfree(cmd);
return ret;
}
static int dt9812_digital_in(struct comedi_device *dev, u8 *bits)
......
......@@ -144,6 +144,10 @@ static const u8 READ_COUNTER_RESPONSE[] = {0x00, 0x01, 0x00, 0x10,
0x00, 0x00, 0x00, 0x02,
0x00, 0x00, 0x00, 0x00};
/* Largest supported packets */
static const size_t TX_MAX_SIZE = sizeof(SET_PORT_DIR_REQUEST);
static const size_t RX_MAX_SIZE = sizeof(READ_PORT_RESPONSE);
enum commands {
READ_PORT,
WRITE_PORT,
......@@ -501,6 +505,12 @@ static int ni6501_find_endpoints(struct comedi_device *dev)
if (!devpriv->ep_rx || !devpriv->ep_tx)
return -ENODEV;
if (usb_endpoint_maxp(devpriv->ep_rx) < RX_MAX_SIZE)
return -ENODEV;
if (usb_endpoint_maxp(devpriv->ep_tx) < TX_MAX_SIZE)
return -ENODEV;
return 0;
}
......
......@@ -90,6 +90,9 @@ enum {
#define IC3_VERSION BIT(0)
#define IC6_VERSION BIT(1)
#define MIN_BUF_SIZE 64
#define PACKET_TIMEOUT 10000 /* ms */
enum vmk80xx_model {
VMK8055_MODEL,
VMK8061_MODEL
......@@ -157,22 +160,21 @@ static void vmk80xx_do_bulk_msg(struct comedi_device *dev)
__u8 rx_addr;
unsigned int tx_pipe;
unsigned int rx_pipe;
size_t size;
size_t tx_size;
size_t rx_size;
tx_addr = devpriv->ep_tx->bEndpointAddress;
rx_addr = devpriv->ep_rx->bEndpointAddress;
tx_pipe = usb_sndbulkpipe(usb, tx_addr);
rx_pipe = usb_rcvbulkpipe(usb, rx_addr);
tx_size = usb_endpoint_maxp(devpriv->ep_tx);
rx_size = usb_endpoint_maxp(devpriv->ep_rx);
/*
* The max packet size attributes of the K8061
* input/output endpoints are identical
*/
size = usb_endpoint_maxp(devpriv->ep_tx);
usb_bulk_msg(usb, tx_pipe, devpriv->usb_tx_buf, tx_size, NULL,
PACKET_TIMEOUT);
usb_bulk_msg(usb, tx_pipe, devpriv->usb_tx_buf,
size, NULL, devpriv->ep_tx->bInterval);
usb_bulk_msg(usb, rx_pipe, devpriv->usb_rx_buf, size, NULL, HZ * 10);
usb_bulk_msg(usb, rx_pipe, devpriv->usb_rx_buf, rx_size, NULL,
PACKET_TIMEOUT);
}
static int vmk80xx_read_packet(struct comedi_device *dev)
......@@ -191,7 +193,7 @@ static int vmk80xx_read_packet(struct comedi_device *dev)
pipe = usb_rcvintpipe(usb, ep->bEndpointAddress);
return usb_interrupt_msg(usb, pipe, devpriv->usb_rx_buf,
usb_endpoint_maxp(ep), NULL,
HZ * 10);
PACKET_TIMEOUT);
}
static int vmk80xx_write_packet(struct comedi_device *dev, int cmd)
......@@ -212,7 +214,7 @@ static int vmk80xx_write_packet(struct comedi_device *dev, int cmd)
pipe = usb_sndintpipe(usb, ep->bEndpointAddress);
return usb_interrupt_msg(usb, pipe, devpriv->usb_tx_buf,
usb_endpoint_maxp(ep), NULL,
HZ * 10);
PACKET_TIMEOUT);
}
static int vmk80xx_reset_device(struct comedi_device *dev)
......@@ -678,12 +680,12 @@ static int vmk80xx_alloc_usb_buffers(struct comedi_device *dev)
struct vmk80xx_private *devpriv = dev->private;
size_t size;
size = usb_endpoint_maxp(devpriv->ep_rx);
size = max(usb_endpoint_maxp(devpriv->ep_rx), MIN_BUF_SIZE);
devpriv->usb_rx_buf = kzalloc(size, GFP_KERNEL);
if (!devpriv->usb_rx_buf)
return -ENOMEM;
size = usb_endpoint_maxp(devpriv->ep_tx);
size = max(usb_endpoint_maxp(devpriv->ep_rx), MIN_BUF_SIZE);
devpriv->usb_tx_buf = kzalloc(size, GFP_KERNEL);
if (!devpriv->usb_tx_buf)
return -ENOMEM;
......
此差异已折叠。
......@@ -23,11 +23,11 @@ config 104_QUAD_8
A counter's respective error flag may be cleared by performing a write
operation on the respective count value attribute. Although the
104-QUAD-8 counters have a 25-bit range, only the lower 24 bits may be
set, either directly or via the counter's preset attribute. Interrupts
are not supported by this driver.
set, either directly or via the counter's preset attribute.
The base port addresses for the devices may be configured via the base
array module parameter.
array module parameter. The interrupt line numbers for the devices may
be configured via the irq array module parameter.
config INTERRUPT_CNT
tristate "Interrupt counter driver"
......
......@@ -4,6 +4,7 @@
#
obj-$(CONFIG_COUNTER) += counter.o
counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
......
此差异已折叠。
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Counter character device interface
* Copyright (C) 2020 William Breathitt Gray
*/
#ifndef _COUNTER_CHRDEV_H_
#define _COUNTER_CHRDEV_H_
#include <linux/counter.h>
int counter_chrdev_add(struct counter_device *const counter);
void counter_chrdev_remove(struct counter_device *const counter);
#endif /* _COUNTER_CHRDEV_H_ */
// SPDX-License-Identifier: GPL-2.0
/*
* Generic Counter interface
* Copyright (C) 2020 William Breathitt Gray
*/
#include <linux/cdev.h>
#include <linux/counter.h>
#include <linux/device.h>
#include <linux/device/bus.h>
#include <linux/export.h>
#include <linux/fs.h>
#include <linux/gfp.h>
#include <linux/idr.h>
#include <linux/init.h>
#include <linux/kdev_t.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/types.h>
#include <linux/wait.h>
#include "counter-chrdev.h"
#include "counter-sysfs.h"
/* Provides a unique ID for each counter device */
static DEFINE_IDA(counter_ida);
static void counter_device_release(struct device *dev)
{
struct counter_device *const counter = dev_get_drvdata(dev);
counter_chrdev_remove(counter);
ida_free(&counter_ida, dev->id);
}
static struct device_type counter_device_type = {
.name = "counter_device",
.release = counter_device_release,
};
static struct bus_type counter_bus_type = {
.name = "counter",
.dev_name = "counter",
};
static dev_t counter_devt;
/**
* counter_register - register Counter to the system
* @counter: pointer to Counter to register
*
* This function registers a Counter to the system. A sysfs "counter" directory
* will be created and populated with sysfs attributes correlating with the
* Counter Signals, Synapses, and Counts respectively.
*
* RETURNS:
* 0 on success, negative error number on failure.
*/
int counter_register(struct counter_device *const counter)
{
struct device *const dev = &counter->dev;
int id;
int err;
/* Acquire unique ID */
id = ida_alloc(&counter_ida, GFP_KERNEL);
if (id < 0)
return id;
mutex_init(&counter->ops_exist_lock);
/* Configure device structure for Counter */
dev->id = id;
dev->type = &counter_device_type;
dev->bus = &counter_bus_type;
dev->devt = MKDEV(MAJOR(counter_devt), id);
if (counter->parent) {
dev->parent = counter->parent;
dev->of_node = counter->parent->of_node;
}
device_initialize(dev);
dev_set_drvdata(dev, counter);
err = counter_sysfs_add(counter);
if (err < 0)
goto err_free_id;
err = counter_chrdev_add(counter);
if (err < 0)
goto err_free_id;
err = cdev_device_add(&counter->chrdev, dev);
if (err < 0)
goto err_remove_chrdev;
return 0;
err_remove_chrdev:
counter_chrdev_remove(counter);
err_free_id:
put_device(dev);
return err;
}
EXPORT_SYMBOL_GPL(counter_register);
/**
* counter_unregister - unregister Counter from the system
* @counter: pointer to Counter to unregister
*
* The Counter is unregistered from the system.
*/
void counter_unregister(struct counter_device *const counter)
{
if (!counter)
return;
cdev_device_del(&counter->chrdev, &counter->dev);
mutex_lock(&counter->ops_exist_lock);
counter->ops = NULL;
wake_up(&counter->events_wait);
mutex_unlock(&counter->ops_exist_lock);
put_device(&counter->dev);
}
EXPORT_SYMBOL_GPL(counter_unregister);
static void devm_counter_release(void *counter)
{
counter_unregister(counter);
}
/**
* devm_counter_register - Resource-managed counter_register
* @dev: device to allocate counter_device for
* @counter: pointer to Counter to register
*
* Managed counter_register. The Counter registered with this function is
* automatically unregistered on driver detach. This function calls
* counter_register internally. Refer to that function for more information.
*
* RETURNS:
* 0 on success, negative error number on failure.
*/
int devm_counter_register(struct device *dev,
struct counter_device *const counter)
{
int err;
err = counter_register(counter);
if (err < 0)
return err;
return devm_add_action_or_reset(dev, devm_counter_release, counter);
}
EXPORT_SYMBOL_GPL(devm_counter_register);
#define COUNTER_DEV_MAX 256
static int __init counter_init(void)
{
int err;
err = bus_register(&counter_bus_type);
if (err < 0)
return err;
err = alloc_chrdev_region(&counter_devt, 0, COUNTER_DEV_MAX, "counter");
if (err < 0)
goto err_unregister_bus;
return 0;
err_unregister_bus:
bus_unregister(&counter_bus_type);
return err;
}
static void __exit counter_exit(void)
{
unregister_chrdev_region(counter_devt, COUNTER_DEV_MAX);
bus_unregister(&counter_bus_type);
}
subsys_initcall(counter_init);
module_exit(counter_exit);
MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
MODULE_DESCRIPTION("Generic Counter interface");
MODULE_LICENSE("GPL v2");
此差异已折叠。
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Counter sysfs interface
* Copyright (C) 2020 William Breathitt Gray
*/
#ifndef _COUNTER_SYSFS_H_
#define _COUNTER_SYSFS_H_
#include <linux/counter.h>
int counter_sysfs_add(struct counter_device *const counter);
#endif /* _COUNTER_SYSFS_H_ */
此差异已折叠。
......@@ -14,6 +14,7 @@
#include <linux/mutex.h>
#include <linux/counter.h>
#include <linux/bitfield.h>
#include <linux/types.h>
#define FTM_FIELD_UPDATE(ftm, offset, mask, val) \
({ \
......@@ -115,8 +116,7 @@ static void ftm_quaddec_disable(void *ftm)
}
static int ftm_quaddec_get_prescaler(struct counter_device *counter,
struct counter_count *count,
size_t *cnt_mode)
struct counter_count *count, u32 *cnt_mode)
{
struct ftm_quaddec *ftm = counter->priv;
uint32_t scflags;
......@@ -129,8 +129,7 @@ static int ftm_quaddec_get_prescaler(struct counter_device *counter,
}
static int ftm_quaddec_set_prescaler(struct counter_device *counter,
struct counter_count *count,
size_t cnt_mode)
struct counter_count *count, u32 cnt_mode)
{
struct ftm_quaddec *ftm = counter->priv;
......@@ -151,33 +150,17 @@ static const char * const ftm_quaddec_prescaler[] = {
"1", "2", "4", "8", "16", "32", "64", "128"
};
static struct counter_count_enum_ext ftm_quaddec_prescaler_enum = {
.items = ftm_quaddec_prescaler,
.num_items = ARRAY_SIZE(ftm_quaddec_prescaler),
.get = ftm_quaddec_get_prescaler,
.set = ftm_quaddec_set_prescaler
};
enum ftm_quaddec_synapse_action {
FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES,
};
static const enum counter_synapse_action ftm_quaddec_synapse_actions[] = {
[FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES] =
COUNTER_SYNAPSE_ACTION_BOTH_EDGES
};
enum ftm_quaddec_count_function {
FTM_QUADDEC_COUNT_ENCODER_MODE_1,
};
static const enum counter_function ftm_quaddec_count_functions[] = {
[FTM_QUADDEC_COUNT_ENCODER_MODE_1] = COUNTER_FUNCTION_QUADRATURE_X4
COUNTER_FUNCTION_QUADRATURE_X4
};
static int ftm_quaddec_count_read(struct counter_device *counter,
struct counter_count *count,
unsigned long *val)
u64 *val)
{
struct ftm_quaddec *const ftm = counter->priv;
uint32_t cntval;
......@@ -191,7 +174,7 @@ static int ftm_quaddec_count_read(struct counter_device *counter,
static int ftm_quaddec_count_write(struct counter_device *counter,
struct counter_count *count,
const unsigned long val)
const u64 val)
{
struct ftm_quaddec *const ftm = counter->priv;
......@@ -205,21 +188,21 @@ static int ftm_quaddec_count_write(struct counter_device *counter,
return 0;
}
static int ftm_quaddec_count_function_get(struct counter_device *counter,
struct counter_count *count,
size_t *function)
static int ftm_quaddec_count_function_read(struct counter_device *counter,
struct counter_count *count,
enum counter_function *function)
{
*function = FTM_QUADDEC_COUNT_ENCODER_MODE_1;
*function = COUNTER_FUNCTION_QUADRATURE_X4;
return 0;
}
static int ftm_quaddec_action_get(struct counter_device *counter,
struct counter_count *count,
struct counter_synapse *synapse,
size_t *action)
static int ftm_quaddec_action_read(struct counter_device *counter,
struct counter_count *count,
struct counter_synapse *synapse,
enum counter_synapse_action *action)
{
*action = FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES;
*action = COUNTER_SYNAPSE_ACTION_BOTH_EDGES;
return 0;
}
......@@ -227,8 +210,8 @@ static int ftm_quaddec_action_get(struct counter_device *counter,
static const struct counter_ops ftm_quaddec_cnt_ops = {
.count_read = ftm_quaddec_count_read,
.count_write = ftm_quaddec_count_write,
.function_get = ftm_quaddec_count_function_get,
.action_get = ftm_quaddec_action_get,
.function_read = ftm_quaddec_count_function_read,
.action_read = ftm_quaddec_action_read,
};
static struct counter_signal ftm_quaddec_signals[] = {
......@@ -255,9 +238,12 @@ static struct counter_synapse ftm_quaddec_count_synapses[] = {
}
};
static const struct counter_count_ext ftm_quaddec_count_ext[] = {
COUNTER_COUNT_ENUM("prescaler", &ftm_quaddec_prescaler_enum),
COUNTER_COUNT_ENUM_AVAILABLE("prescaler", &ftm_quaddec_prescaler_enum),
static DEFINE_COUNTER_ENUM(ftm_quaddec_prescaler_enum, ftm_quaddec_prescaler);
static struct counter_comp ftm_quaddec_count_ext[] = {
COUNTER_COMP_COUNT_ENUM("prescaler", ftm_quaddec_get_prescaler,
ftm_quaddec_set_prescaler,
ftm_quaddec_prescaler_enum),
};
static struct counter_count ftm_quaddec_counts = {
......
此差异已折叠。
......@@ -10,6 +10,7 @@
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#define INTERRUPT_CNT_NAME "interrupt-cnt"
......@@ -33,30 +34,23 @@ static irqreturn_t interrupt_cnt_isr(int irq, void *dev_id)
return IRQ_HANDLED;
}
static ssize_t interrupt_cnt_enable_read(struct counter_device *counter,
struct counter_count *count,
void *private, char *buf)
static int interrupt_cnt_enable_read(struct counter_device *counter,
struct counter_count *count, u8 *enable)
{
struct interrupt_cnt_priv *priv = counter->priv;
return sysfs_emit(buf, "%d\n", priv->enabled);
*enable = priv->enabled;
return 0;
}
static ssize_t interrupt_cnt_enable_write(struct counter_device *counter,
struct counter_count *count,
void *private, const char *buf,
size_t len)
static int interrupt_cnt_enable_write(struct counter_device *counter,
struct counter_count *count, u8 enable)
{
struct interrupt_cnt_priv *priv = counter->priv;
bool enable;
ssize_t ret;
ret = kstrtobool(buf, &enable);
if (ret)
return ret;
if (priv->enabled == enable)
return len;
return 0;
if (enable) {
priv->enabled = true;
......@@ -66,33 +60,30 @@ static ssize_t interrupt_cnt_enable_write(struct counter_device *counter,
priv->enabled = false;
}
return len;
return 0;
}
static const struct counter_count_ext interrupt_cnt_ext[] = {
{
.name = "enable",
.read = interrupt_cnt_enable_read,
.write = interrupt_cnt_enable_write,
},
static struct counter_comp interrupt_cnt_ext[] = {
COUNTER_COMP_ENABLE(interrupt_cnt_enable_read,
interrupt_cnt_enable_write),
};
static const enum counter_synapse_action interrupt_cnt_synapse_actions[] = {
COUNTER_SYNAPSE_ACTION_RISING_EDGE,
};
static int interrupt_cnt_action_get(struct counter_device *counter,
struct counter_count *count,
struct counter_synapse *synapse,
size_t *action)
static int interrupt_cnt_action_read(struct counter_device *counter,
struct counter_count *count,
struct counter_synapse *synapse,
enum counter_synapse_action *action)
{
*action = 0;
*action = COUNTER_SYNAPSE_ACTION_RISING_EDGE;
return 0;
}
static int interrupt_cnt_read(struct counter_device *counter,
struct counter_count *count, unsigned long *val)
struct counter_count *count, u64 *val)
{
struct interrupt_cnt_priv *priv = counter->priv;
......@@ -102,8 +93,7 @@ static int interrupt_cnt_read(struct counter_device *counter,
}
static int interrupt_cnt_write(struct counter_device *counter,
struct counter_count *count,
const unsigned long val)
struct counter_count *count, const u64 val)
{
struct interrupt_cnt_priv *priv = counter->priv;
......@@ -119,11 +109,11 @@ static const enum counter_function interrupt_cnt_functions[] = {
COUNTER_FUNCTION_INCREASE,
};
static int interrupt_cnt_function_get(struct counter_device *counter,
struct counter_count *count,
size_t *function)
static int interrupt_cnt_function_read(struct counter_device *counter,
struct counter_count *count,
enum counter_function *function)
{
*function = 0;
*function = COUNTER_FUNCTION_INCREASE;
return 0;
}
......@@ -148,10 +138,10 @@ static int interrupt_cnt_signal_read(struct counter_device *counter,
}
static const struct counter_ops interrupt_cnt_ops = {
.action_get = interrupt_cnt_action_get,
.action_read = interrupt_cnt_action_read,
.count_read = interrupt_cnt_read,
.count_write = interrupt_cnt_write,
.function_get = interrupt_cnt_function_get,
.function_read = interrupt_cnt_function_read,
.signal_read = interrupt_cnt_signal_read,
};
......
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......@@ -23,7 +23,7 @@ config EXTCON_ADC_JACK
config EXTCON_AXP288
tristate "X-Power AXP288 EXTCON support"
depends on MFD_AXP20X && USB_SUPPORT && X86 && ACPI
depends on MFD_AXP20X && USB_SUPPORT && X86 && ACPI && IOSF_MBI
select USB_ROLE_SWITCH
help
Say Y here to enable support for USB peripheral detection
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......@@ -7,7 +7,6 @@
*/
#include <linux/extcon-provider.h>
#include <linux/gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/interrupt.h>
#include <linux/module.h>
......
......@@ -7,18 +7,17 @@
*/
#include <linux/extcon-provider.h>
#include <linux/gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_gpio.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
#include <linux/pinctrl/consumer.h>
#include <linux/mod_devicetable.h>
#define USB_GPIO_DEBOUNCE_MS 20 /* ms */
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......@@ -41,6 +41,7 @@
#include <linux/swiotlb.h>
#include <linux/dma-buf.h>
#include <linux/sizes.h>
#include <linux/module.h>
#include <drm/ttm/ttm_bo_api.h>
#include <drm/ttm/ttm_bo_driver.h>
......@@ -59,6 +60,8 @@
#include "amdgpu_res_cursor.h"
#include "bif/bif_4_1_d.h"
MODULE_IMPORT_NS(DMA_BUF);
#define AMDGPU_TTM_VRAM_MAX_DW_READ (size_t)128
static int amdgpu_ttm_backend_bind(struct ttm_device *bdev,
......
......@@ -15,6 +15,8 @@
#include "armada_gem.h"
#include "armada_ioctlP.h"
MODULE_IMPORT_NS(DMA_BUF);
static vm_fault_t armada_gem_vm_fault(struct vm_fault *vmf)
{
struct drm_gem_object *gobj = vmf->vma->vm_private_data;
......
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