media: camss: csiphy: Ensure clock mux config is done before the rest

Add a write memory barier after clock mux config and before the rest
of the csiphy config.
Signed-off-by: NTodor Tomov <todor.tomov@linaro.org>
Signed-off-by: NHans Verkuil <hansverk@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>

drivers/media/platform/qcom/camss/camss-csiphy.c

@@ -364,6 +364,7 @@ static int csiphy_stream_on(struct csiphy_device *csiphy)
 		val |= cfg->csid_id;
 	}
 	writel_relaxed(val, csiphy->base_clk_mux);
+	wmb();
 
 	writel_relaxed(0x1, csiphy->base +
 		       CAMSS_CSI_PHY_GLBL_T_INIT_CFG0);