提交 5746cc2a 编写于 作者: J John W. Linville

Merge branch 'master' of...

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem
...@@ -358,6 +358,14 @@ static void ath9k_hw_init_config(struct ath_hw *ah) ...@@ -358,6 +358,14 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
ah->config.rx_intr_mitigation = true; ah->config.rx_intr_mitigation = true;
if (AR_SREV_9300_20_OR_LATER(ah)) {
ah->config.rimt_last = 500;
ah->config.rimt_first = 2000;
} else {
ah->config.rimt_last = 250;
ah->config.rimt_first = 700;
}
/* /*
* We need this for PCI devices only (Cardbus, PCI, miniPCI) * We need this for PCI devices only (Cardbus, PCI, miniPCI)
* _and_ if on non-uniprocessor systems (Multiprocessor/HT). * _and_ if on non-uniprocessor systems (Multiprocessor/HT).
...@@ -1876,8 +1884,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, ...@@ -1876,8 +1884,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
REG_WRITE(ah, AR_OBS, 8); REG_WRITE(ah, AR_OBS, 8);
if (ah->config.rx_intr_mitigation) { if (ah->config.rx_intr_mitigation) {
REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500); REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, ah->config.rimt_last);
REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000); REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, ah->config.rimt_first);
} }
if (ah->config.tx_intr_mitigation) { if (ah->config.tx_intr_mitigation) {
......
...@@ -310,6 +310,8 @@ struct ath9k_ops_config { ...@@ -310,6 +310,8 @@ struct ath9k_ops_config {
u8 max_txtrig_level; u8 max_txtrig_level;
u16 ani_poll_interval; /* ANI poll interval in ms */ u16 ani_poll_interval; /* ANI poll interval in ms */
u16 hw_hang_checks; u16 hw_hang_checks;
u16 rimt_first;
u16 rimt_last;
/* Platform specific config */ /* Platform specific config */
u32 aspm_l1_fix; u32 aspm_l1_fix;
......
...@@ -524,7 +524,7 @@ void ath9k_tasklet(unsigned long data) ...@@ -524,7 +524,7 @@ void ath9k_tasklet(unsigned long data)
* successfully after a GTT interrupt, the GTT counter * successfully after a GTT interrupt, the GTT counter
* gets reset to zero here. * gets reset to zero here.
*/ */
/* sc->gtt_cnt = 0; */ sc->gtt_cnt = 0;
ath_tx_edma_tasklet(sc); ath_tx_edma_tasklet(sc);
} else { } else {
......
...@@ -821,10 +821,10 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr) ...@@ -821,10 +821,10 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
* channel number in b43. */ * channel number in b43. */
if (chanstat & B43_RX_CHAN_5GHZ) { if (chanstat & B43_RX_CHAN_5GHZ) {
status.band = IEEE80211_BAND_5GHZ; status.band = IEEE80211_BAND_5GHZ;
status.freq = b43_freq_to_channel_5ghz(chanid); status.freq = b43_channel_to_freq_5ghz(chanid);
} else { } else {
status.band = IEEE80211_BAND_2GHZ; status.band = IEEE80211_BAND_2GHZ;
status.freq = b43_freq_to_channel_2ghz(chanid); status.freq = b43_channel_to_freq_2ghz(chanid);
} }
break; break;
default: default:
......
...@@ -289,13 +289,15 @@ static void iwl_pcie_txq_inval_byte_cnt_tbl(struct iwl_trans *trans, ...@@ -289,13 +289,15 @@ static void iwl_pcie_txq_inval_byte_cnt_tbl(struct iwl_trans *trans,
*/ */
void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, struct iwl_txq *txq) void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, struct iwl_txq *txq)
{ {
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
u32 reg = 0; u32 reg = 0;
int txq_id = txq->q.id; int txq_id = txq->q.id;
if (txq->need_update == 0) if (txq->need_update == 0)
return; return;
if (trans->cfg->base_params->shadow_reg_enable) { if (trans->cfg->base_params->shadow_reg_enable ||
txq_id == trans_pcie->cmd_queue) {
/* shadow register enabled */ /* shadow register enabled */
iwl_write32(trans, HBUS_TARG_WRPTR, iwl_write32(trans, HBUS_TARG_WRPTR,
txq->q.write_ptr | (txq_id << 8)); txq->q.write_ptr | (txq_id << 8));
......
...@@ -2449,7 +2449,7 @@ static int mwifiex_cfg80211_suspend(struct wiphy *wiphy, ...@@ -2449,7 +2449,7 @@ static int mwifiex_cfg80211_suspend(struct wiphy *wiphy,
ETH_ALEN); ETH_ALEN);
mef_entry->filter[filt_num].byte_seq[MWIFIEX_MEF_MAX_BYTESEQ] = mef_entry->filter[filt_num].byte_seq[MWIFIEX_MEF_MAX_BYTESEQ] =
ETH_ALEN; ETH_ALEN;
mef_entry->filter[filt_num].offset = 14; mef_entry->filter[filt_num].offset = 28;
mef_entry->filter[filt_num].filt_type = TYPE_EQ; mef_entry->filter[filt_num].filt_type = TYPE_EQ;
if (filt_num) if (filt_num)
mef_entry->filter[filt_num].filt_action = TYPE_OR; mef_entry->filter[filt_num].filt_action = TYPE_OR;
......
...@@ -989,6 +989,7 @@ static struct usb_device_id rt2800usb_device_table[] = { ...@@ -989,6 +989,7 @@ static struct usb_device_id rt2800usb_device_table[] = {
{ USB_DEVICE(0x07d1, 0x3c15) }, { USB_DEVICE(0x07d1, 0x3c15) },
{ USB_DEVICE(0x07d1, 0x3c16) }, { USB_DEVICE(0x07d1, 0x3c16) },
{ USB_DEVICE(0x07d1, 0x3c17) }, { USB_DEVICE(0x07d1, 0x3c17) },
{ USB_DEVICE(0x2001, 0x3317) },
{ USB_DEVICE(0x2001, 0x3c1b) }, { USB_DEVICE(0x2001, 0x3c1b) },
/* Draytek */ /* Draytek */
{ USB_DEVICE(0x07fa, 0x7712) }, { USB_DEVICE(0x07fa, 0x7712) },
......
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