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Kernel
提交 52aa8c53 编写于 作者: T Tony Lindgren
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Merge branch 'ctrl-wip/mux-omap4-v4' of git://gitorious.org/omap-pm/linux into omap-for-linus

上级 55a4e789 032a6424
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arch/arm/mach-omap2/Kconfig
浏览文件 @ 52aa8c53
...@@ -85,6 +85,12 @@ config OMAP_PACKAGE_CUS ...@@ -85,6 +85,12 @@ config OMAP_PACKAGE_CUS
config OMAP_PACKAGE_CBP config OMAP_PACKAGE_CBP
bool bool
config OMAP_PACKAGE_CBL
bool
config OMAP_PACKAGE_CBS
bool
comment "OMAP Board Type" comment "OMAP Board Type"
depends on ARCH_OMAP2PLUS depends on ARCH_OMAP2PLUS
...@@ -282,11 +288,15 @@ config MACH_OMAP_4430SDP ...@@ -282,11 +288,15 @@ config MACH_OMAP_4430SDP
bool "OMAP 4430 SDP board" bool "OMAP 4430 SDP board"
default y default y
depends on ARCH_OMAP4 depends on ARCH_OMAP4
select OMAP_PACKAGE_CBL
select OMAP_PACKAGE_CBS
config MACH_OMAP4_PANDA config MACH_OMAP4_PANDA
bool "OMAP4 Panda Board" bool "OMAP4 Panda Board"
default y default y
depends on ARCH_OMAP4 depends on ARCH_OMAP4
select OMAP_PACKAGE_CBL
select OMAP_PACKAGE_CBS
config OMAP3_EMU config OMAP3_EMU
bool "OMAP3 debugging peripherals" bool "OMAP3 debugging peripherals"
......
arch/arm/mach-omap2/Makefile
浏览文件 @ 52aa8c53
...@@ -42,6 +42,7 @@ AFLAGS_sram34xx.o :=-Wa,-march=armv7-a ...@@ -42,6 +42,7 @@ AFLAGS_sram34xx.o :=-Wa,-march=armv7-a
obj-$(CONFIG_ARCH_OMAP2420) += mux2420.o obj-$(CONFIG_ARCH_OMAP2420) += mux2420.o
obj-$(CONFIG_ARCH_OMAP2430) += mux2430.o obj-$(CONFIG_ARCH_OMAP2430) += mux2430.o
obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o
obj-$(CONFIG_ARCH_OMAP4) += mux44xx.o
# SMS/SDRC # SMS/SDRC
obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
......
arch/arm/mach-omap2/board-4430sdp.c
浏览文件 @ 52aa8c53
...@@ -35,6 +35,7 @@ ...@@ -35,6 +35,7 @@
#include <plat/usb.h> #include <plat/usb.h>
#include <plat/mmc.h> #include <plat/mmc.h>
#include "mux.h"
#include "hsmmc.h" #include "hsmmc.h"
#include "timer-gp.h" #include "timer-gp.h"
#include "control.h" #include "control.h"
...@@ -505,9 +506,22 @@ static void __init omap_sfh7741prox_init(void) ...@@ -505,9 +506,22 @@ static void __init omap_sfh7741prox_init(void)
} }
} }
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
#define board_mux NULL
#endif
static void __init omap_4430sdp_init(void) static void __init omap_4430sdp_init(void)
{ {
int status; int status;
int package = OMAP_PACKAGE_CBS;
if (omap_rev() == OMAP4430_REV_ES1_0)
package = OMAP_PACKAGE_CBL;
omap4_mux_init(board_mux, package);
omap4_i2c_init(); omap4_i2c_init();
omap_sfh7741prox_init(); omap_sfh7741prox_init();
......
arch/arm/mach-omap2/board-omap4panda.c
浏览文件 @ 52aa8c53
...@@ -40,6 +40,7 @@ ...@@ -40,6 +40,7 @@
#include "hsmmc.h" #include "hsmmc.h"
#include "control.h" #include "control.h"
#include "mux.h"
#define GPIO_HUB_POWER 1 #define GPIO_HUB_POWER 1
#define GPIO_HUB_NRESET 62 #define GPIO_HUB_NRESET 62
...@@ -368,8 +369,23 @@ static int __init omap4_panda_i2c_init(void) ...@@ -368,8 +369,23 @@ static int __init omap4_panda_i2c_init(void)
omap_register_i2c_bus(4, 400, NULL, 0); omap_register_i2c_bus(4, 400, NULL, 0);
return 0; return 0;
} }
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
#define board_mux NULL
#endif
static void __init omap4_panda_init(void) static void __init omap4_panda_init(void)
{ {
int package = OMAP_PACKAGE_CBS;
if (omap_rev() == OMAP4430_REV_ES1_0)
package = OMAP_PACKAGE_CBL;
omap4_mux_init(board_mux, package);
omap4_panda_i2c_init(); omap4_panda_i2c_init();
platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
omap_serial_init(); omap_serial_init();
......
arch/arm/mach-omap2/board-rx51-peripherals.c
浏览文件 @ 52aa8c53
...@@ -293,6 +293,8 @@ static struct omap_board_mux rx51_mmc2_off_mux[] = { ...@@ -293,6 +293,8 @@ static struct omap_board_mux rx51_mmc2_off_mux[] = {
{ .reg_offset = OMAP_MUX_TERMINATOR }, { .reg_offset = OMAP_MUX_TERMINATOR },
}; };
static struct omap_mux_partition *partition;
/* /*
* Current flows to eMMC when eMMC is off and the data lines are pulled up, * Current flows to eMMC when eMMC is off and the data lines are pulled up,
* so pull them down. N.B. we pull 8 lines because we are using 8 lines. * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
...@@ -300,9 +302,9 @@ static struct omap_board_mux rx51_mmc2_off_mux[] = { ...@@ -300,9 +302,9 @@ static struct omap_board_mux rx51_mmc2_off_mux[] = {
static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
{ {
if (power_on) if (power_on)
omap_mux_write_array(rx51_mmc2_on_mux); omap_mux_write_array(partition, rx51_mmc2_on_mux);
else else
omap_mux_write_array(rx51_mmc2_off_mux); omap_mux_write_array(partition, rx51_mmc2_off_mux);
} }
static struct omap2_hsmmc_info mmc[] __initdata = { static struct omap2_hsmmc_info mmc[] __initdata = {
...@@ -922,7 +924,11 @@ void __init rx51_peripherals_init(void) ...@@ -922,7 +924,11 @@ void __init rx51_peripherals_init(void)
rx51_init_wl1251(); rx51_init_wl1251();
spi_register_board_info(rx51_peripherals_spi_board_info, spi_register_board_info(rx51_peripherals_spi_board_info,
ARRAY_SIZE(rx51_peripherals_spi_board_info)); ARRAY_SIZE(rx51_peripherals_spi_board_info));
omap2_hsmmc_init(mmc);
partition = omap_mux_get("core");
if (partition)
omap2_hsmmc_init(mmc);
platform_device_register(&rx51_charger_device); platform_device_register(&rx51_charger_device);
} }
arch/arm/mach-omap2/mux.c
浏览文件 @ 52aa8c53
/* /*
* linux/arch/arm/mach-omap2/mux.c * linux/arch/arm/mach-omap2/mux.c
* *
* OMAP2 and OMAP3 pin multiplexing configurations * OMAP2, OMAP3 and OMAP4 pin multiplexing configurations
* *
* Copyright (C) 2004 - 2008 Texas Instruments Inc. * Copyright (C) 2004 - 2010 Texas Instruments Inc.
* Copyright (C) 2003 - 2008 Nokia Corporation * Copyright (C) 2003 - 2008 Nokia Corporation
* *
* Written by Tony Lindgren * Written by Tony Lindgren
...@@ -40,60 +40,72 @@ ...@@ -40,60 +40,72 @@
#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
#define OMAP_MUX_BASE_SZ 0x5ca #define OMAP_MUX_BASE_SZ 0x5ca
#define MUXABLE_GPIO_MODE3 BIT(0)
struct omap_mux_entry { struct omap_mux_entry {
struct omap_mux mux; struct omap_mux mux;
struct list_head node; struct list_head node;
}; };
static unsigned long mux_phys; static LIST_HEAD(mux_partitions);
static void __iomem *mux_base; static DEFINE_MUTEX(muxmode_mutex);
static u8 omap_mux_flags;
u16 omap_mux_read(u16 reg) struct omap_mux_partition *omap_mux_get(const char *name)
{ {
if (cpu_is_omap24xx()) struct omap_mux_partition *partition;
return __raw_readb(mux_base + reg);
list_for_each_entry(partition, &mux_partitions, node) {
if (!strcmp(name, partition->name))
return partition;
}
return NULL;
}
u16 omap_mux_read(struct omap_mux_partition *partition, u16 reg)
{
if (partition->flags & OMAP_MUX_REG_8BIT)
return __raw_readb(partition->base + reg);
else else
return __raw_readw(mux_base + reg); return __raw_readw(partition->base + reg);
} }
void omap_mux_write(u16 val, u16 reg) void omap_mux_write(struct omap_mux_partition *partition, u16 val,
u16 reg)
{ {
if (cpu_is_omap24xx()) if (partition->flags & OMAP_MUX_REG_8BIT)
__raw_writeb(val, mux_base + reg); __raw_writeb(val, partition->base + reg);
else else
__raw_writew(val, mux_base + reg); __raw_writew(val, partition->base + reg);
} }
void omap_mux_write_array(struct omap_board_mux *board_mux) void omap_mux_write_array(struct omap_mux_partition *partition,
struct omap_board_mux *board_mux)
{ {
while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
omap_mux_write(board_mux->value, board_mux->reg_offset); omap_mux_write(partition, board_mux->value,
board_mux->reg_offset);
board_mux++; board_mux++;
} }
} }
static LIST_HEAD(muxmodes);
static DEFINE_MUTEX(muxmode_mutex);
#ifdef CONFIG_OMAP_MUX #ifdef CONFIG_OMAP_MUX
static char *omap_mux_options; static char *omap_mux_options;
int __init omap_mux_init_gpio(int gpio, int val) static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition,
int gpio, int val)
{ {
struct omap_mux_entry *e; struct omap_mux_entry *e;
struct omap_mux *gpio_mux = NULL; struct omap_mux *gpio_mux = NULL;
u16 old_mode; u16 old_mode;
u16 mux_mode; u16 mux_mode;
int found = 0; int found = 0;
struct list_head *muxmodes = &partition->muxmodes;
if (!gpio) if (!gpio)
return -EINVAL; return -EINVAL;
list_for_each_entry(e, &muxmodes, node) { list_for_each_entry(e, muxmodes, node) {
struct omap_mux *m = &e->mux; struct omap_mux *m = &e->mux;
if (gpio == m->gpio) { if (gpio == m->gpio) {
gpio_mux = m; gpio_mux = m;
...@@ -102,34 +114,50 @@ int __init omap_mux_init_gpio(int gpio, int val) ...@@ -102,34 +114,50 @@ int __init omap_mux_init_gpio(int gpio, int val)
} }
if (found == 0) { if (found == 0) {
printk(KERN_ERR "mux: Could not set gpio%i\n", gpio); pr_err("%s: Could not set gpio%i\n", __func__, gpio);
return -ENODEV; return -ENODEV;
} }
if (found > 1) { if (found > 1) {
printk(KERN_INFO "mux: Multiple gpio paths (%d) for gpio%i\n", pr_info("%s: Multiple gpio paths (%d) for gpio%i\n", __func__,
found, gpio); found, gpio);
return -EINVAL; return -EINVAL;
} }
old_mode = omap_mux_read(gpio_mux->reg_offset); old_mode = omap_mux_read(partition, gpio_mux->reg_offset);
mux_mode = val & ~(OMAP_MUX_NR_MODES - 1); mux_mode = val & ~(OMAP_MUX_NR_MODES - 1);
if (omap_mux_flags & MUXABLE_GPIO_MODE3) if (partition->flags & OMAP_MUX_GPIO_IN_MODE3)
mux_mode |= OMAP_MUX_MODE3; mux_mode |= OMAP_MUX_MODE3;
else else
mux_mode |= OMAP_MUX_MODE4; mux_mode |= OMAP_MUX_MODE4;
printk(KERN_DEBUG "mux: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n", pr_debug("%s: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n", __func__,
gpio_mux->muxnames[0], gpio, old_mode, mux_mode); gpio_mux->muxnames[0], gpio, old_mode, mux_mode);
omap_mux_write(mux_mode, gpio_mux->reg_offset); omap_mux_write(partition, mux_mode, gpio_mux->reg_offset);
return 0; return 0;
} }
int __init omap_mux_init_signal(const char *muxname, int val) int __init omap_mux_init_gpio(int gpio, int val)
{
struct omap_mux_partition *partition;
int ret;
list_for_each_entry(partition, &mux_partitions, node) {
ret = _omap_mux_init_gpio(partition, gpio, val);
if (!ret)
return ret;
}
return -ENODEV;
}
static int __init _omap_mux_init_signal(struct omap_mux_partition *partition,
const char *muxname, int val)
{ {
struct omap_mux_entry *e; struct omap_mux_entry *e;
const char *mode_name; const char *mode_name;
int found = 0, mode0_len = 0; int found = 0, mode0_len = 0;
struct list_head *muxmodes = &partition->muxmodes;
mode_name = strchr(muxname, '.'); mode_name = strchr(muxname, '.');
if (mode_name) { if (mode_name) {
...@@ -139,7 +167,7 @@ int __init omap_mux_init_signal(const char *muxname, int val) ...@@ -139,7 +167,7 @@ int __init omap_mux_init_signal(const char *muxname, int val)
mode_name = muxname; mode_name = muxname;
} }
list_for_each_entry(e, &muxmodes, node) { list_for_each_entry(e, muxmodes, node) {
struct omap_mux *m = &e->mux; struct omap_mux *m = &e->mux;
char *m0_entry = m->muxnames[0]; char *m0_entry = m->muxnames[0];
int i; int i;
...@@ -159,12 +187,14 @@ int __init omap_mux_init_signal(const char *muxname, int val) ...@@ -159,12 +187,14 @@ int __init omap_mux_init_signal(const char *muxname, int val)
u16 old_mode; u16 old_mode;
u16 mux_mode; u16 mux_mode;
old_mode = omap_mux_read(m->reg_offset); old_mode = omap_mux_read(partition,
m->reg_offset);
mux_mode = val | i; mux_mode = val | i;
printk(KERN_DEBUG "mux: Setting signal " pr_debug("%s: Setting signal "
"%s.%s 0x%04x -> 0x%04x\n", "%s.%s 0x%04x -> 0x%04x\n", __func__,
m0_entry, muxname, old_mode, mux_mode); m0_entry, muxname, old_mode, mux_mode);
omap_mux_write(mux_mode, m->reg_offset); omap_mux_write(partition, mux_mode,
m->reg_offset);
found++; found++;
} }
} }
...@@ -174,16 +204,31 @@ int __init omap_mux_init_signal(const char *muxname, int val) ...@@ -174,16 +204,31 @@ int __init omap_mux_init_signal(const char *muxname, int val)
return 0; return 0;
if (found > 1) { if (found > 1) {
printk(KERN_ERR "mux: Multiple signal paths (%i) for %s\n", pr_err("%s: Multiple signal paths (%i) for %s\n", __func__,
found, muxname); found, muxname);
return -EINVAL; return -EINVAL;
} }
printk(KERN_ERR "mux: Could not set signal %s\n", muxname); pr_err("%s: Could not set signal %s\n", __func__, muxname);
return -ENODEV; return -ENODEV;
} }
int __init omap_mux_init_signal(const char *muxname, int val)
{
struct omap_mux_partition *partition;
int ret;
list_for_each_entry(partition, &mux_partitions, node) {
ret = _omap_mux_init_signal(partition, muxname, val);
if (!ret)
return ret;
}
return -ENODEV;
}
#ifdef CONFIG_DEBUG_FS #ifdef CONFIG_DEBUG_FS
#define OMAP_MUX_MAX_NR_FLAGS 10 #define OMAP_MUX_MAX_NR_FLAGS 10
...@@ -248,13 +293,15 @@ static inline void omap_mux_decode(struct seq_file *s, u16 val) ...@@ -248,13 +293,15 @@ static inline void omap_mux_decode(struct seq_file *s, u16 val)
} while (i-- > 0); } while (i-- > 0);
} }
#define OMAP_MUX_DEFNAME_LEN 16 #define OMAP_MUX_DEFNAME_LEN 32
static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
{ {
struct omap_mux_partition *partition = s->private;
struct omap_mux_entry *e; struct omap_mux_entry *e;
u8 omap_gen = omap_rev() >> 28;
list_for_each_entry(e, &muxmodes, node) { list_for_each_entry(e, &partition->muxmodes, node) {
struct omap_mux *m = &e->mux; struct omap_mux *m = &e->mux;
char m0_def[OMAP_MUX_DEFNAME_LEN]; char m0_def[OMAP_MUX_DEFNAME_LEN];
char *m0_name = m->muxnames[0]; char *m0_name = m->muxnames[0];
...@@ -272,11 +319,16 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) ...@@ -272,11 +319,16 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
} }
m0_def[i] = toupper(m0_name[i]); m0_def[i] = toupper(m0_name[i]);
} }
val = omap_mux_read(m->reg_offset); val = omap_mux_read(partition, m->reg_offset);
mode = val & OMAP_MUX_MODE7; mode = val & OMAP_MUX_MODE7;
if (mode != 0)
seq_printf(s, "OMAP%i_MUX(%s, ", seq_printf(s, "/* %s */\n", m->muxnames[mode]);
cpu_is_omap34xx() ? 3 : 0, m0_def);
/*
* XXX: Might be revisited to support differences accross
* same OMAP generation.
*/
seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def);
omap_mux_decode(s, val); omap_mux_decode(s, val);
seq_printf(s, "),\n"); seq_printf(s, "),\n");
} }
...@@ -286,7 +338,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) ...@@ -286,7 +338,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
static int omap_mux_dbg_board_open(struct inode *inode, struct file *file) static int omap_mux_dbg_board_open(struct inode *inode, struct file *file)
{ {
return single_open(file, omap_mux_dbg_board_show, &inode->i_private); return single_open(file, omap_mux_dbg_board_show, inode->i_private);
} }
static const struct file_operations omap_mux_dbg_board_fops = { static const struct file_operations omap_mux_dbg_board_fops = {
...@@ -296,19 +348,43 @@ static const struct file_operations omap_mux_dbg_board_fops = { ...@@ -296,19 +348,43 @@ static const struct file_operations omap_mux_dbg_board_fops = {
.release = single_release, .release = single_release,
}; };
static struct omap_mux_partition *omap_mux_get_partition(struct omap_mux *mux)
{
struct omap_mux_partition *partition;
list_for_each_entry(partition, &mux_partitions, node) {
struct list_head *muxmodes = &partition->muxmodes;
struct omap_mux_entry *e;
list_for_each_entry(e, muxmodes, node) {
struct omap_mux *m = &e->mux;
if (m == mux)
return partition;
}
}
return NULL;
}
static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused) static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused)
{ {
struct omap_mux *m = s->private; struct omap_mux *m = s->private;
struct omap_mux_partition *partition;
const char *none = "NA"; const char *none = "NA";
u16 val; u16 val;
int mode; int mode;
val = omap_mux_read(m->reg_offset); partition = omap_mux_get_partition(m);
if (!partition)
return 0;
val = omap_mux_read(partition, m->reg_offset);
mode = val & OMAP_MUX_MODE7; mode = val & OMAP_MUX_MODE7;
seq_printf(s, "name: %s.%s (0x%08lx/0x%03x = 0x%04x), b %s, t %s\n", seq_printf(s, "name: %s.%s (0x%08x/0x%03x = 0x%04x), b %s, t %s\n",
m->muxnames[0], m->muxnames[mode], m->muxnames[0], m->muxnames[mode],
mux_phys + m->reg_offset, m->reg_offset, val, partition->phys + m->reg_offset, m->reg_offset, val,
m->balls[0] ? m->balls[0] : none, m->balls[0] ? m->balls[0] : none,
m->balls[1] ? m->balls[1] : none); m->balls[1] ? m->balls[1] : none);
seq_printf(s, "mode: "); seq_printf(s, "mode: ");
...@@ -330,14 +406,15 @@ static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused) ...@@ -330,14 +406,15 @@ static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused)
#define OMAP_MUX_MAX_ARG_CHAR 7 #define OMAP_MUX_MAX_ARG_CHAR 7
static ssize_t omap_mux_dbg_signal_write(struct file *file, static ssize_t omap_mux_dbg_signal_write(struct file *file,
const char __user *user_buf, const char __user *user_buf,
size_t count, loff_t *ppos) size_t count, loff_t *ppos)
{ {
char buf[OMAP_MUX_MAX_ARG_CHAR]; char buf[OMAP_MUX_MAX_ARG_CHAR];
struct seq_file *seqf; struct seq_file *seqf;
struct omap_mux *m; struct omap_mux *m;
unsigned long val; unsigned long val;
int buf_size, ret; int buf_size, ret;
struct omap_mux_partition *partition;
if (count > OMAP_MUX_MAX_ARG_CHAR) if (count > OMAP_MUX_MAX_ARG_CHAR)
return -EINVAL; return -EINVAL;
...@@ -358,7 +435,11 @@ static ssize_t omap_mux_dbg_signal_write(struct file *file, ...@@ -358,7 +435,11 @@ static ssize_t omap_mux_dbg_signal_write(struct file *file,
seqf = file->private_data; seqf = file->private_data;
m = seqf->private; m = seqf->private;
omap_mux_write((u16)val, m->reg_offset); partition = omap_mux_get_partition(m);
if (!partition)
return -ENODEV;
omap_mux_write(partition, (u16)val, m->reg_offset);
*ppos += count; *ppos += count;
return count; return count;
...@@ -379,22 +460,38 @@ static const struct file_operations omap_mux_dbg_signal_fops = { ...@@ -379,22 +460,38 @@ static const struct file_operations omap_mux_dbg_signal_fops = {
static struct dentry *mux_dbg_dir; static struct dentry *mux_dbg_dir;
static void __init omap_mux_dbg_init(void) static void __init omap_mux_dbg_create_entry(
struct omap_mux_partition *partition,
struct dentry *mux_dbg_dir)
{ {
struct omap_mux_entry *e; struct omap_mux_entry *e;
list_for_each_entry(e, &partition->muxmodes, node) {
struct omap_mux *m = &e->mux;
(void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir,
m, &omap_mux_dbg_signal_fops);
}
}
static void __init omap_mux_dbg_init(void)
{
struct omap_mux_partition *partition;
static struct dentry *mux_dbg_board_dir;
mux_dbg_dir = debugfs_create_dir("omap_mux", NULL); mux_dbg_dir = debugfs_create_dir("omap_mux", NULL);
if (!mux_dbg_dir) if (!mux_dbg_dir)
return; return;
(void)debugfs_create_file("board", S_IRUGO, mux_dbg_dir, mux_dbg_board_dir = debugfs_create_dir("board", mux_dbg_dir);
NULL, &omap_mux_dbg_board_fops); if (!mux_dbg_board_dir)
return;
list_for_each_entry(e, &muxmodes, node) {
struct omap_mux *m = &e->mux;
(void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir, list_for_each_entry(partition, &mux_partitions, node) {
m, &omap_mux_dbg_signal_fops); omap_mux_dbg_create_entry(partition, mux_dbg_dir);
(void)debugfs_create_file(partition->name, S_IRUGO,
mux_dbg_board_dir, partition,
&omap_mux_dbg_board_fops);
} }
} }
...@@ -421,23 +518,25 @@ static void __init omap_mux_free_names(struct omap_mux *m) ...@@ -421,23 +518,25 @@ static void __init omap_mux_free_names(struct omap_mux *m)
/* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */ /* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */
static int __init omap_mux_late_init(void) static int __init omap_mux_late_init(void)
{ {
struct omap_mux_entry *e, *tmp; struct omap_mux_partition *partition;
list_for_each_entry_safe(e, tmp, &muxmodes, node) { list_for_each_entry(partition, &mux_partitions, node) {
struct omap_mux *m = &e->mux; struct omap_mux_entry *e, *tmp;
u16 mode = omap_mux_read(m->reg_offset); list_for_each_entry_safe(e, tmp, &partition->muxmodes, node) {
struct omap_mux *m = &e->mux;
u16 mode = omap_mux_read(partition, m->reg_offset);
if (OMAP_MODE_GPIO(mode)) if (OMAP_MODE_GPIO(mode))
continue; continue;
#ifndef CONFIG_DEBUG_FS #ifndef CONFIG_DEBUG_FS
mutex_lock(&muxmode_mutex); mutex_lock(&muxmode_mutex);
list_del(&e->node); list_del(&e->node);
mutex_unlock(&muxmode_mutex); mutex_unlock(&muxmode_mutex);
omap_mux_free_names(m); omap_mux_free_names(m);
kfree(m); kfree(m);
#endif #endif
}
} }
omap_mux_dbg_init(); omap_mux_dbg_init();
...@@ -462,8 +561,8 @@ static void __init omap_mux_package_fixup(struct omap_mux *p, ...@@ -462,8 +561,8 @@ static void __init omap_mux_package_fixup(struct omap_mux *p,
s++; s++;
} }
if (!found) if (!found)
printk(KERN_ERR "mux: Unknown entry offset 0x%x\n", pr_err("%s: Unknown entry offset 0x%x\n", __func__,
p->reg_offset); p->reg_offset);
p++; p++;
} }
} }
...@@ -487,8 +586,8 @@ static void __init omap_mux_package_init_balls(struct omap_ball *b, ...@@ -487,8 +586,8 @@ static void __init omap_mux_package_init_balls(struct omap_ball *b,
s++; s++;
} }
if (!found) if (!found)
printk(KERN_ERR "mux: Unknown ball offset 0x%x\n", pr_err("%s: Unknown ball offset 0x%x\n", __func__,
b->reg_offset); b->reg_offset);
b++; b++;
} }
} }
...@@ -554,7 +653,7 @@ static void __init omap_mux_set_cmdline_signals(void) ...@@ -554,7 +653,7 @@ static void __init omap_mux_set_cmdline_signals(void)
} }
static int __init omap_mux_copy_names(struct omap_mux *src, static int __init omap_mux_copy_names(struct omap_mux *src,
struct omap_mux *dst) struct omap_mux *dst)
{ {
int i; int i;
...@@ -592,51 +691,63 @@ static int __init omap_mux_copy_names(struct omap_mux *src, ...@@ -592,51 +691,63 @@ static int __init omap_mux_copy_names(struct omap_mux *src,
#endif /* CONFIG_OMAP_MUX */ #endif /* CONFIG_OMAP_MUX */
static u16 omap_mux_get_by_gpio(int gpio) static struct omap_mux *omap_mux_get_by_gpio(
struct omap_mux_partition *partition,
int gpio)
{ {
struct omap_mux_entry *e; struct omap_mux_entry *e;
u16 offset = OMAP_MUX_TERMINATOR; struct omap_mux *ret = NULL;
list_for_each_entry(e, &muxmodes, node) { list_for_each_entry(e, &partition->muxmodes, node) {
struct omap_mux *m = &e->mux; struct omap_mux *m = &e->mux;
if (m->gpio == gpio) { if (m->gpio == gpio) {
offset = m->reg_offset; ret = m;
break; break;
} }
} }
return offset; return ret;
} }
/* Needed for dynamic muxing of GPIO pins for off-idle */ /* Needed for dynamic muxing of GPIO pins for off-idle */
u16 omap_mux_get_gpio(int gpio) u16 omap_mux_get_gpio(int gpio)
{ {
u16 offset; struct omap_mux_partition *partition;
struct omap_mux *m;
offset = omap_mux_get_by_gpio(gpio); list_for_each_entry(partition, &mux_partitions, node) {
if (offset == OMAP_MUX_TERMINATOR) { m = omap_mux_get_by_gpio(partition, gpio);
printk(KERN_ERR "mux: Could not get gpio%i\n", gpio); if (m)
return offset; return omap_mux_read(partition, m->reg_offset);
} }
return omap_mux_read(offset); if (!m || m->reg_offset == OMAP_MUX_TERMINATOR)
pr_err("%s: Could not get gpio%i\n", __func__, gpio);
return OMAP_MUX_TERMINATOR;
} }
/* Needed for dynamic muxing of GPIO pins for off-idle */ /* Needed for dynamic muxing of GPIO pins for off-idle */
void omap_mux_set_gpio(u16 val, int gpio) void omap_mux_set_gpio(u16 val, int gpio)
{ {
u16 offset; struct omap_mux_partition *partition;
struct omap_mux *m = NULL;
offset = omap_mux_get_by_gpio(gpio); list_for_each_entry(partition, &mux_partitions, node) {
if (offset == OMAP_MUX_TERMINATOR) { m = omap_mux_get_by_gpio(partition, gpio);
printk(KERN_ERR "mux: Could not set gpio%i\n", gpio); if (m) {
return; omap_mux_write(partition, val, m->reg_offset);
return;
}
} }
omap_mux_write(val, offset); if (!m || m->reg_offset == OMAP_MUX_TERMINATOR)
pr_err("%s: Could not set gpio%i\n", __func__, gpio);
} }
static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src) static struct omap_mux * __init omap_mux_list_add(
struct omap_mux_partition *partition,
struct omap_mux *src)
{ {
struct omap_mux_entry *entry; struct omap_mux_entry *entry;
struct omap_mux *m; struct omap_mux *m;
...@@ -656,7 +767,7 @@ static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src) ...@@ -656,7 +767,7 @@ static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src)
#endif #endif
mutex_lock(&muxmode_mutex); mutex_lock(&muxmode_mutex);
list_add_tail(&entry->node, &muxmodes); list_add_tail(&entry->node, &partition->muxmodes);
mutex_unlock(&muxmode_mutex); mutex_unlock(&muxmode_mutex);
return m; return m;
...@@ -667,7 +778,8 @@ static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src) ...@@ -667,7 +778,8 @@ static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src)
* the GPIO to mux offset mapping that is needed for dynamic muxing * the GPIO to mux offset mapping that is needed for dynamic muxing
* of GPIO pins for off-idle. * of GPIO pins for off-idle.
*/ */
static void __init omap_mux_init_list(struct omap_mux *superset) static void __init omap_mux_init_list(struct omap_mux_partition *partition,
struct omap_mux *superset)
{ {
while (superset->reg_offset != OMAP_MUX_TERMINATOR) { while (superset->reg_offset != OMAP_MUX_TERMINATOR) {
struct omap_mux *entry; struct omap_mux *entry;
...@@ -679,15 +791,16 @@ static void __init omap_mux_init_list(struct omap_mux *superset) ...@@ -679,15 +791,16 @@ static void __init omap_mux_init_list(struct omap_mux *superset)
} }
#else #else
/* Skip pins that are not muxed as GPIO by bootloader */ /* Skip pins that are not muxed as GPIO by bootloader */
if (!OMAP_MODE_GPIO(omap_mux_read(superset->reg_offset))) { if (!OMAP_MODE_GPIO(omap_mux_read(partition,
superset->reg_offset))) {
superset++; superset++;
continue; continue;
} }
#endif #endif
entry = omap_mux_list_add(superset); entry = omap_mux_list_add(partition, superset);
if (!entry) { if (!entry) {
printk(KERN_ERR "mux: Could not add entry\n"); pr_err("%s: Could not add entry\n", __func__);
return; return;
} }
superset++; superset++;
...@@ -706,10 +819,11 @@ static void omap_mux_init_package(struct omap_mux *superset, ...@@ -706,10 +819,11 @@ static void omap_mux_init_package(struct omap_mux *superset,
omap_mux_package_init_balls(package_balls, superset); omap_mux_package_init_balls(package_balls, superset);
} }
static void omap_mux_init_signals(struct omap_board_mux *board_mux) static void omap_mux_init_signals(struct omap_mux_partition *partition,
struct omap_board_mux *board_mux)
{ {
omap_mux_set_cmdline_signals(); omap_mux_set_cmdline_signals();
omap_mux_write_array(board_mux); omap_mux_write_array(partition, board_mux);
} }
#else #else
...@@ -720,34 +834,49 @@ static void omap_mux_init_package(struct omap_mux *superset, ...@@ -720,34 +834,49 @@ static void omap_mux_init_package(struct omap_mux *superset,
{ {
} }
static void omap_mux_init_signals(struct omap_board_mux *board_mux) static void omap_mux_init_signals(struct omap_mux_partition *partition,
struct omap_board_mux *board_mux)
{ {
} }
#endif #endif
int __init omap_mux_init(u32 mux_pbase, u32 mux_size, static u32 mux_partitions_cnt;
struct omap_mux *superset,
struct omap_mux *package_subset,
struct omap_board_mux *board_mux,
struct omap_ball *package_balls)
{
if (mux_base)
return -EBUSY;
mux_phys = mux_pbase; int __init omap_mux_init(const char *name, u32 flags,
mux_base = ioremap(mux_pbase, mux_size); u32 mux_pbase, u32 mux_size,
if (!mux_base) { struct omap_mux *superset,
printk(KERN_ERR "mux: Could not ioremap\n"); struct omap_mux *package_subset,
struct omap_board_mux *board_mux,
struct omap_ball *package_balls)
{
struct omap_mux_partition *partition;
partition = kzalloc(sizeof(struct omap_mux_partition), GFP_KERNEL);
if (!partition)
return -ENOMEM;
partition->name = name;
partition->flags = flags;
partition->size = mux_size;
partition->phys = mux_pbase;
partition->base = ioremap(mux_pbase, mux_size);
if (!partition->base) {
pr_err("%s: Could not ioremap mux partition at 0x%08x\n",
__func__, partition->phys);
return -ENODEV; return -ENODEV;
} }
if (cpu_is_omap24xx()) INIT_LIST_HEAD(&partition->muxmodes);
omap_mux_flags = MUXABLE_GPIO_MODE3;
list_add_tail(&partition->node, &mux_partitions);
mux_partitions_cnt++;
pr_info("%s: Add partition: #%d: %s, flags: %x\n", __func__,
mux_partitions_cnt, partition->name, partition->flags);
omap_mux_init_package(superset, package_subset, package_balls); omap_mux_init_package(superset, package_subset, package_balls);
omap_mux_init_list(superset); omap_mux_init_list(partition, superset);
omap_mux_init_signals(board_mux); omap_mux_init_signals(partition, board_mux);
return 0; return 0;
} }
......
arch/arm/mach-omap2/mux.h
浏览文件 @ 52aa8c53
/* /*
* Copyright (C) 2009 Nokia * Copyright (C) 2009 Nokia
* Copyright (C) 2009 Texas Instruments * Copyright (C) 2009-2010 Texas Instruments
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#include "mux2420.h" #include "mux2420.h"
#include "mux2430.h" #include "mux2430.h"
#include "mux34xx.h" #include "mux34xx.h"
#include "mux44xx.h"
#define OMAP_MUX_TERMINATOR 0xffff #define OMAP_MUX_TERMINATOR 0xffff
...@@ -37,6 +38,9 @@ ...@@ -37,6 +38,9 @@
#define OMAP_OFF_PULL_UP (1 << 13) #define OMAP_OFF_PULL_UP (1 << 13)
#define OMAP_WAKEUP_EN (1 << 14) #define OMAP_WAKEUP_EN (1 << 14)
/* 44xx specific mux bit defines */
#define OMAP_WAKEUP_EVENT (1 << 15)
/* Active pin states */ /* Active pin states */
#define OMAP_PIN_OUTPUT 0 #define OMAP_PIN_OUTPUT 0
#define OMAP_PIN_INPUT OMAP_INPUT_EN #define OMAP_PIN_INPUT OMAP_INPUT_EN
...@@ -56,8 +60,10 @@ ...@@ -56,8 +60,10 @@
#define OMAP_MODE_GPIO(x) (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE4) #define OMAP_MODE_GPIO(x) (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE4)
/* Flags for omap_mux_init */ /* Flags for omapX_mux_init */
#define OMAP_PACKAGE_MASK 0xffff #define OMAP_PACKAGE_MASK 0xffff
#define OMAP_PACKAGE_CBS 8 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBL 7 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */ #define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */
#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */ #define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */
#define OMAP_PACKAGE_CBB 4 /* 515-pin 0.40 0.50 */ #define OMAP_PACKAGE_CBB 4 /* 515-pin 0.40 0.50 */
...@@ -66,14 +72,47 @@ ...@@ -66,14 +72,47 @@
#define OMAP_PACKAGE_ZAF 1 /* 2420 447-pin SIP */ #define OMAP_PACKAGE_ZAF 1 /* 2420 447-pin SIP */
#define OMAP_MUX_NR_MODES 8 /* Available modes */ #define OMAP_MUX_NR_MODES 8 /* Available modes */
#define OMAP_MUX_NR_SIDES 2 /* Bottom & top */ #define OMAP_MUX_NR_SIDES 2 /* Bottom & top */
/*
* omap_mux_init flags definition:
*
* OMAP_MUX_REG_8BIT: Ensure that access to padconf is done in 8 bits.
* The default value is 16 bits.
* OMAP_MUX_GPIO_IN_MODE3: The GPIO is selected in mode3.
* The default is mode4.
*/
#define OMAP_MUX_REG_8BIT (1 << 0)
#define OMAP_MUX_GPIO_IN_MODE3 (1 << 1)
/**
* struct mux_partition - contain partition related information
* @name: name of the current partition
* @flags: flags specific to this partition
* @phys: physical address
* @size: partition size
* @base: virtual address after ioremap
* @muxmodes: list of nodes that belong to a partition
* @node: list node for the partitions linked list
*/
struct omap_mux_partition {
const char *name;
u32 flags;
u32 phys;
u32 size;
void __iomem *base;
struct list_head muxmodes;
struct list_head node;
};
/** /**
* struct omap_mux - data for omap mux register offset and it's value * struct omap_mux - data for omap mux register offset and it's value
* @reg_offset: mux register offset from the mux base * @reg_offset: mux register offset from the mux base
* @gpio: GPIO number * @gpio: GPIO number
* @muxnames: available signal modes for a ball * @muxnames: available signal modes for a ball
* @balls: available balls on the package
* @partition: mux partition
*/ */
struct omap_mux { struct omap_mux {
u16 reg_offset; u16 reg_offset;
...@@ -150,29 +189,40 @@ u16 omap_mux_get_gpio(int gpio); ...@@ -150,29 +189,40 @@ u16 omap_mux_get_gpio(int gpio);
*/ */
void omap_mux_set_gpio(u16 val, int gpio); void omap_mux_set_gpio(u16 val, int gpio);
/**
* omap_mux_get() - get a mux partition by name
* @name: Name of the mux partition
*
*/
struct omap_mux_partition *omap_mux_get(const char *name);
/** /**
* omap_mux_read() - read mux register * omap_mux_read() - read mux register
* @partition: Mux partition
* @mux_offset: Offset of the mux register * @mux_offset: Offset of the mux register
* *
*/ */
u16 omap_mux_read(u16 mux_offset); u16 omap_mux_read(struct omap_mux_partition *p, u16 mux_offset);
/** /**
* omap_mux_write() - write mux register * omap_mux_write() - write mux register
* @partition: Mux partition
* @val: New mux register value * @val: New mux register value
* @mux_offset: Offset of the mux register * @mux_offset: Offset of the mux register
* *
* This should be only needed for dynamic remuxing of non-gpio signals. * This should be only needed for dynamic remuxing of non-gpio signals.
*/ */
void omap_mux_write(u16 val, u16 mux_offset); void omap_mux_write(struct omap_mux_partition *p, u16 val, u16 mux_offset);
/** /**
* omap_mux_write_array() - write an array of mux registers * omap_mux_write_array() - write an array of mux registers
* @partition: Mux partition
* @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR * @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR
* *
* This should be only needed for dynamic remuxing of non-gpio signals. * This should be only needed for dynamic remuxing of non-gpio signals.
*/ */
void omap_mux_write_array(struct omap_board_mux *board_mux); void omap_mux_write_array(struct omap_mux_partition *p,
struct omap_board_mux *board_mux);
/** /**
* omap2420_mux_init() - initialize mux system with board specific set * omap2420_mux_init() - initialize mux system with board specific set
...@@ -195,11 +245,20 @@ int omap2430_mux_init(struct omap_board_mux *board_mux, int flags); ...@@ -195,11 +245,20 @@ int omap2430_mux_init(struct omap_board_mux *board_mux, int flags);
*/ */
int omap3_mux_init(struct omap_board_mux *board_mux, int flags); int omap3_mux_init(struct omap_board_mux *board_mux, int flags);
/**
* omap4_mux_init() - initialize mux system with board specific set
* @board_mux: Board specific mux table
* @flags: OMAP package type used for the board
*/
int omap4_mux_init(struct omap_board_mux *board_mux, int flags);
/** /**
* omap_mux_init - private mux init function, do not call * omap_mux_init - private mux init function, do not call
*/ */
int omap_mux_init(u32 mux_pbase, u32 mux_size, int omap_mux_init(const char *name, u32 flags,
struct omap_mux *superset, u32 mux_pbase, u32 mux_size,
struct omap_mux *package_subset, struct omap_mux *superset,
struct omap_board_mux *board_mux, struct omap_mux *package_subset,
struct omap_ball *package_balls); struct omap_board_mux *board_mux,
struct omap_ball *package_balls);
arch/arm/mach-omap2/mux2420.c
浏览文件 @ 52aa8c53
...@@ -678,11 +678,13 @@ int __init omap2420_mux_init(struct omap_board_mux *board_subset, int flags) ...@@ -678,11 +678,13 @@ int __init omap2420_mux_init(struct omap_board_mux *board_subset, int flags)
case OMAP_PACKAGE_ZAF: case OMAP_PACKAGE_ZAF:
/* REVISIT: Please add data */ /* REVISIT: Please add data */
default: default:
pr_warning("mux: No ball data available for omap2420 package\n"); pr_warning("%s: No ball data available for omap2420 package\n",
__func__);
} }
return omap_mux_init(OMAP2420_CONTROL_PADCONF_MUX_PBASE, return omap_mux_init("core", OMAP_MUX_REG_8BIT | OMAP_MUX_GPIO_IN_MODE3,
OMAP2420_CONTROL_PADCONF_MUX_PBASE,
OMAP2420_CONTROL_PADCONF_MUX_SIZE, OMAP2420_CONTROL_PADCONF_MUX_SIZE,
omap2420_muxmodes, NULL, board_subset, omap2420_muxmodes, NULL, board_subset,
package_balls); package_balls);
} }
arch/arm/mach-omap2/mux2430.c
浏览文件 @ 52aa8c53
...@@ -781,11 +781,13 @@ int __init omap2430_mux_init(struct omap_board_mux *board_subset, int flags) ...@@ -781,11 +781,13 @@ int __init omap2430_mux_init(struct omap_board_mux *board_subset, int flags)
package_balls = omap2430_pop_ball; package_balls = omap2430_pop_ball;
break; break;
default: default:
pr_warning("mux: No ball data available for omap2420 package\n"); pr_warning("%s: No ball data available for omap2420 package\n",
__func__);
} }
return omap_mux_init(OMAP2430_CONTROL_PADCONF_MUX_PBASE, return omap_mux_init("core", OMAP_MUX_REG_8BIT | OMAP_MUX_GPIO_IN_MODE3,
OMAP2430_CONTROL_PADCONF_MUX_PBASE,
OMAP2430_CONTROL_PADCONF_MUX_SIZE, OMAP2430_CONTROL_PADCONF_MUX_SIZE,
omap2430_muxmodes, NULL, board_subset, omap2430_muxmodes, NULL, board_subset,
package_balls); package_balls);
} }
arch/arm/mach-omap2/mux34xx.c
浏览文件 @ 52aa8c53
...@@ -2049,12 +2049,13 @@ int __init omap3_mux_init(struct omap_board_mux *board_subset, int flags) ...@@ -2049,12 +2049,13 @@ int __init omap3_mux_init(struct omap_board_mux *board_subset, int flags)
package_balls = omap36xx_cbp_ball; package_balls = omap36xx_cbp_ball;
break; break;
default: default:
printk(KERN_ERR "mux: Unknown omap package, mux disabled\n"); pr_err("%s Unknown omap package, mux disabled\n", __func__);
return -EINVAL; return -EINVAL;
} }
return omap_mux_init(OMAP3_CONTROL_PADCONF_MUX_PBASE, return omap_mux_init("core", 0,
OMAP3_CONTROL_PADCONF_MUX_PBASE,
OMAP3_CONTROL_PADCONF_MUX_SIZE, OMAP3_CONTROL_PADCONF_MUX_SIZE,
omap3_muxmodes, package_subset, board_subset, omap3_muxmodes, package_subset, board_subset,
package_balls); package_balls);
} }
arch/arm/mach-omap2/mux44xx.c 0 → 100644
浏览文件 @ 52aa8c53
此差异已折叠。
arch/arm/mach-omap2/mux44xx.h 0 → 100644
浏览文件 @ 52aa8c53
/*
* OMAP44xx MUX registers and bitfields
*
* Copyright (C) 2009-2010 Texas Instruments, Inc.
*
* Benoit Cousson (b-cousson@ti.com)
*
* This file is automatically generated from the OMAP hardware databases.
* We respectfully ask that any modifications to this file be coordinated
* with the public linux-omap@vger.kernel.org mailing list and the
* authors above to ensure that the autogeneration scripts are kept
* up-to-date with the file contents.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_OMAP2_MUX_44XX_H
#define __ARCH_ARM_MACH_OMAP2_MUX_44XX_H
#define OMAP4_MUX(M0, mux_value) \
{ \
.reg_offset = (OMAP4_CTRL_MODULE_PAD_##M0##_OFFSET), \
.value = (mux_value), \
}
/* ctrl_module_pad_core base address */
#define OMAP4_CTRL_MODULE_PAD_CORE_MUX_PBASE 0x4a100000
/* ctrl_module_pad_core registers offset */
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD0_OFFSET 0x0040
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD1_OFFSET 0x0042
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD2_OFFSET 0x0044
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD3_OFFSET 0x0046
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD4_OFFSET 0x0048
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD5_OFFSET 0x004a
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD6_OFFSET 0x004c
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD7_OFFSET 0x004e
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD8_OFFSET 0x0050
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD9_OFFSET 0x0052
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD10_OFFSET 0x0054
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD11_OFFSET 0x0056
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD12_OFFSET 0x0058
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD13_OFFSET 0x005a
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD14_OFFSET 0x005c
#define OMAP4_CTRL_MODULE_PAD_GPMC_AD15_OFFSET 0x005e
#define OMAP4_CTRL_MODULE_PAD_GPMC_A16_OFFSET 0x0060
#define OMAP4_CTRL_MODULE_PAD_GPMC_A17_OFFSET 0x0062
#define OMAP4_CTRL_MODULE_PAD_GPMC_A18_OFFSET 0x0064
#define OMAP4_CTRL_MODULE_PAD_GPMC_A19_OFFSET 0x0066
#define OMAP4_CTRL_MODULE_PAD_GPMC_A20_OFFSET 0x0068
#define OMAP4_CTRL_MODULE_PAD_GPMC_A21_OFFSET 0x006a
#define OMAP4_CTRL_MODULE_PAD_GPMC_A22_OFFSET 0x006c
#define OMAP4_CTRL_MODULE_PAD_GPMC_A23_OFFSET 0x006e
#define OMAP4_CTRL_MODULE_PAD_GPMC_A24_OFFSET 0x0070
#define OMAP4_CTRL_MODULE_PAD_GPMC_A25_OFFSET 0x0072
#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS0_OFFSET 0x0074
#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS1_OFFSET 0x0076
#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS2_OFFSET 0x0078
#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS3_OFFSET 0x007a
#define OMAP4_CTRL_MODULE_PAD_GPMC_NWP_OFFSET 0x007c
#define OMAP4_CTRL_MODULE_PAD_GPMC_CLK_OFFSET 0x007e
#define OMAP4_CTRL_MODULE_PAD_GPMC_NADV_ALE_OFFSET 0x0080
#define OMAP4_CTRL_MODULE_PAD_GPMC_NOE_OFFSET 0x0082
#define OMAP4_CTRL_MODULE_PAD_GPMC_NWE_OFFSET 0x0084
#define OMAP4_CTRL_MODULE_PAD_GPMC_NBE0_CLE_OFFSET 0x0086
#define OMAP4_CTRL_MODULE_PAD_GPMC_NBE1_OFFSET 0x0088
#define OMAP4_CTRL_MODULE_PAD_GPMC_WAIT0_OFFSET 0x008a
#define OMAP4_CTRL_MODULE_PAD_GPMC_WAIT1_OFFSET 0x008c
#define OMAP4_CTRL_MODULE_PAD_C2C_DATA11_OFFSET 0x008e
#define OMAP4_CTRL_MODULE_PAD_C2C_DATA12_OFFSET 0x0090
#define OMAP4_CTRL_MODULE_PAD_C2C_DATA13_OFFSET 0x0092
#define OMAP4_CTRL_MODULE_PAD_C2C_DATA14_OFFSET 0x0094
#define OMAP4_CTRL_MODULE_PAD_C2C_DATA15_OFFSET 0x0096
#define OMAP4_CTRL_MODULE_PAD_HDMI_HPD_OFFSET 0x0098
#define OMAP4_CTRL_MODULE_PAD_HDMI_CEC_OFFSET 0x009a
#define OMAP4_CTRL_MODULE_PAD_HDMI_DDC_SCL_OFFSET 0x009c
#define OMAP4_CTRL_MODULE_PAD_HDMI_DDC_SDA_OFFSET 0x009e
#define OMAP4_CTRL_MODULE_PAD_CSI21_DX0_OFFSET 0x00a0
#define OMAP4_CTRL_MODULE_PAD_CSI21_DY0_OFFSET 0x00a2
#define OMAP4_CTRL_MODULE_PAD_CSI21_DX1_OFFSET 0x00a4
#define OMAP4_CTRL_MODULE_PAD_CSI21_DY1_OFFSET 0x00a6
#define OMAP4_CTRL_MODULE_PAD_CSI21_DX2_OFFSET 0x00a8
#define OMAP4_CTRL_MODULE_PAD_CSI21_DY2_OFFSET 0x00aa
#define OMAP4_CTRL_MODULE_PAD_CSI21_DX3_OFFSET 0x00ac
#define OMAP4_CTRL_MODULE_PAD_CSI21_DY3_OFFSET 0x00ae
#define OMAP4_CTRL_MODULE_PAD_CSI21_DX4_OFFSET 0x00b0
#define OMAP4_CTRL_MODULE_PAD_CSI21_DY4_OFFSET 0x00b2
#define OMAP4_CTRL_MODULE_PAD_CSI22_DX0_OFFSET 0x00b4
#define OMAP4_CTRL_MODULE_PAD_CSI22_DY0_OFFSET 0x00b6
#define OMAP4_CTRL_MODULE_PAD_CSI22_DX1_OFFSET 0x00b8
#define OMAP4_CTRL_MODULE_PAD_CSI22_DY1_OFFSET 0x00ba
#define OMAP4_CTRL_MODULE_PAD_CAM_SHUTTER_OFFSET 0x00bc
#define OMAP4_CTRL_MODULE_PAD_CAM_STROBE_OFFSET 0x00be
#define OMAP4_CTRL_MODULE_PAD_CAM_GLOBALRESET_OFFSET 0x00c0
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_CLK_OFFSET 0x00c2
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_STP_OFFSET 0x00c4
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DIR_OFFSET 0x00c6
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_NXT_OFFSET 0x00c8
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT0_OFFSET 0x00ca
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT1_OFFSET 0x00cc
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT2_OFFSET 0x00ce
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT3_OFFSET 0x00d0
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT4_OFFSET 0x00d2
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT5_OFFSET 0x00d4
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT6_OFFSET 0x00d6
#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT7_OFFSET 0x00d8
#define OMAP4_CTRL_MODULE_PAD_USBB1_HSIC_DATA_OFFSET 0x00da
#define OMAP4_CTRL_MODULE_PAD_USBB1_HSIC_STROBE_OFFSET 0x00dc
#define OMAP4_CTRL_MODULE_PAD_USBC1_ICUSB_DP_OFFSET 0x00de
#define OMAP4_CTRL_MODULE_PAD_USBC1_ICUSB_DM_OFFSET 0x00e0
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_CLK_OFFSET 0x00e2
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_CMD_OFFSET 0x00e4
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT0_OFFSET 0x00e6
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT1_OFFSET 0x00e8
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT2_OFFSET 0x00ea
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT3_OFFSET 0x00ec
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT4_OFFSET 0x00ee
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT5_OFFSET 0x00f0
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT6_OFFSET 0x00f2
#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT7_OFFSET 0x00f4
#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP2_CLKX_OFFSET 0x00f6
#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP2_DR_OFFSET 0x00f8
#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP2_DX_OFFSET 0x00fa
#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP2_FSX_OFFSET 0x00fc
#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP1_CLKX_OFFSET 0x00fe
#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP1_DR_OFFSET 0x0100
#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP1_DX_OFFSET 0x0102
#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP1_FSX_OFFSET 0x0104
#define OMAP4_CTRL_MODULE_PAD_ABE_PDM_UL_DATA_OFFSET 0x0106
#define OMAP4_CTRL_MODULE_PAD_ABE_PDM_DL_DATA_OFFSET 0x0108
#define OMAP4_CTRL_MODULE_PAD_ABE_PDM_FRAME_OFFSET 0x010a
#define OMAP4_CTRL_MODULE_PAD_ABE_PDM_LB_CLK_OFFSET 0x010c
#define OMAP4_CTRL_MODULE_PAD_ABE_CLKS_OFFSET 0x010e
#define OMAP4_CTRL_MODULE_PAD_ABE_DMIC_CLK1_OFFSET 0x0110
#define OMAP4_CTRL_MODULE_PAD_ABE_DMIC_DIN1_OFFSET 0x0112
#define OMAP4_CTRL_MODULE_PAD_ABE_DMIC_DIN2_OFFSET 0x0114
#define OMAP4_CTRL_MODULE_PAD_ABE_DMIC_DIN3_OFFSET 0x0116
#define OMAP4_CTRL_MODULE_PAD_UART2_CTS_OFFSET 0x0118
#define OMAP4_CTRL_MODULE_PAD_UART2_RTS_OFFSET 0x011a
#define OMAP4_CTRL_MODULE_PAD_UART2_RX_OFFSET 0x011c
#define OMAP4_CTRL_MODULE_PAD_UART2_TX_OFFSET 0x011e
#define OMAP4_CTRL_MODULE_PAD_HDQ_SIO_OFFSET 0x0120
#define OMAP4_CTRL_MODULE_PAD_I2C1_SCL_OFFSET 0x0122
#define OMAP4_CTRL_MODULE_PAD_I2C1_SDA_OFFSET 0x0124
#define OMAP4_CTRL_MODULE_PAD_I2C2_SCL_OFFSET 0x0126
#define OMAP4_CTRL_MODULE_PAD_I2C2_SDA_OFFSET 0x0128
#define OMAP4_CTRL_MODULE_PAD_I2C3_SCL_OFFSET 0x012a
#define OMAP4_CTRL_MODULE_PAD_I2C3_SDA_OFFSET 0x012c
#define OMAP4_CTRL_MODULE_PAD_I2C4_SCL_OFFSET 0x012e
#define OMAP4_CTRL_MODULE_PAD_I2C4_SDA_OFFSET 0x0130
#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CLK_OFFSET 0x0132
#define OMAP4_CTRL_MODULE_PAD_MCSPI1_SOMI_OFFSET 0x0134
#define OMAP4_CTRL_MODULE_PAD_MCSPI1_SIMO_OFFSET 0x0136
#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CS0_OFFSET 0x0138
#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CS1_OFFSET 0x013a
#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CS2_OFFSET 0x013c
#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CS3_OFFSET 0x013e
#define OMAP4_CTRL_MODULE_PAD_UART3_CTS_RCTX_OFFSET 0x0140
#define OMAP4_CTRL_MODULE_PAD_UART3_RTS_SD_OFFSET 0x0142
#define OMAP4_CTRL_MODULE_PAD_UART3_RX_IRRX_OFFSET 0x0144
#define OMAP4_CTRL_MODULE_PAD_UART3_TX_IRTX_OFFSET 0x0146
#define OMAP4_CTRL_MODULE_PAD_SDMMC5_CLK_OFFSET 0x0148
#define OMAP4_CTRL_MODULE_PAD_SDMMC5_CMD_OFFSET 0x014a
#define OMAP4_CTRL_MODULE_PAD_SDMMC5_DAT0_OFFSET 0x014c
#define OMAP4_CTRL_MODULE_PAD_SDMMC5_DAT1_OFFSET 0x014e
#define OMAP4_CTRL_MODULE_PAD_SDMMC5_DAT2_OFFSET 0x0150
#define OMAP4_CTRL_MODULE_PAD_SDMMC5_DAT3_OFFSET 0x0152
#define OMAP4_CTRL_MODULE_PAD_MCSPI4_CLK_OFFSET 0x0154
#define OMAP4_CTRL_MODULE_PAD_MCSPI4_SIMO_OFFSET 0x0156
#define OMAP4_CTRL_MODULE_PAD_MCSPI4_SOMI_OFFSET 0x0158
#define OMAP4_CTRL_MODULE_PAD_MCSPI4_CS0_OFFSET 0x015a
#define OMAP4_CTRL_MODULE_PAD_UART4_RX_OFFSET 0x015c
#define OMAP4_CTRL_MODULE_PAD_UART4_TX_OFFSET 0x015e
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_CLK_OFFSET 0x0160
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_STP_OFFSET 0x0162
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DIR_OFFSET 0x0164
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_NXT_OFFSET 0x0166
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT0_OFFSET 0x0168
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT1_OFFSET 0x016a
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT2_OFFSET 0x016c
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT3_OFFSET 0x016e
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT4_OFFSET 0x0170
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT5_OFFSET 0x0172
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT6_OFFSET 0x0174
#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT7_OFFSET 0x0176
#define OMAP4_CTRL_MODULE_PAD_USBB2_HSIC_DATA_OFFSET 0x0178
#define OMAP4_CTRL_MODULE_PAD_USBB2_HSIC_STROBE_OFFSET 0x017a
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TX0_OFFSET 0x017c
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TY0_OFFSET 0x017e
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TX1_OFFSET 0x0180
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TY1_OFFSET 0x0182
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TX2_OFFSET 0x0184
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TY2_OFFSET 0x0186
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RX0_OFFSET 0x0188
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RY0_OFFSET 0x018a
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RX1_OFFSET 0x018c
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RY1_OFFSET 0x018e
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RX2_OFFSET 0x0190
#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RY2_OFFSET 0x0192
#define OMAP4_CTRL_MODULE_PAD_USBA0_OTG_CE_OFFSET 0x0194
#define OMAP4_CTRL_MODULE_PAD_USBA0_OTG_DP_OFFSET 0x0196
#define OMAP4_CTRL_MODULE_PAD_USBA0_OTG_DM_OFFSET 0x0198
#define OMAP4_CTRL_MODULE_PAD_FREF_CLK1_OUT_OFFSET 0x019a
#define OMAP4_CTRL_MODULE_PAD_FREF_CLK2_OUT_OFFSET 0x019c
#define OMAP4_CTRL_MODULE_PAD_SYS_NIRQ1_OFFSET 0x019e
#define OMAP4_CTRL_MODULE_PAD_SYS_NIRQ2_OFFSET 0x01a0
#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT0_OFFSET 0x01a2
#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT1_OFFSET 0x01a4
#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT2_OFFSET 0x01a6
#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT3_OFFSET 0x01a8
#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT4_OFFSET 0x01aa
#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT5_OFFSET 0x01ac
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU0_OFFSET 0x01ae
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU1_OFFSET 0x01b0
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU2_OFFSET 0x01b2
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU3_OFFSET 0x01b4
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU4_OFFSET 0x01b6
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU5_OFFSET 0x01b8
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU6_OFFSET 0x01ba
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU7_OFFSET 0x01bc
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU8_OFFSET 0x01be
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU9_OFFSET 0x01c0
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU10_OFFSET 0x01c2
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU11_OFFSET 0x01c4
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU12_OFFSET 0x01c6
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU13_OFFSET 0x01c8
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU14_OFFSET 0x01ca
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU15_OFFSET 0x01cc
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU16_OFFSET 0x01ce
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU17_OFFSET 0x01d0
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU18_OFFSET 0x01d2
#define OMAP4_CTRL_MODULE_PAD_DPM_EMU19_OFFSET 0x01d4
/* ES2.0 only */
#define OMAP4_CTRL_MODULE_PAD_GPMC_WAIT2_OFFSET 0x008e
#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS4_OFFSET 0x0090
#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS5_OFFSET 0x0092
#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS6_OFFSET 0x0094
#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS7_OFFSET 0x0096
#define OMAP4_CTRL_MODULE_PAD_KPD_COL3_OFFSET 0x017c
#define OMAP4_CTRL_MODULE_PAD_KPD_COL4_OFFSET 0x017e
#define OMAP4_CTRL_MODULE_PAD_KPD_COL5_OFFSET 0x0180
#define OMAP4_CTRL_MODULE_PAD_KPD_COL0_OFFSET 0x0182
#define OMAP4_CTRL_MODULE_PAD_KPD_COL1_OFFSET 0x0184
#define OMAP4_CTRL_MODULE_PAD_KPD_COL2_OFFSET 0x0186
#define OMAP4_CTRL_MODULE_PAD_KPD_ROW3_OFFSET 0x0188
#define OMAP4_CTRL_MODULE_PAD_KPD_ROW4_OFFSET 0x018a
#define OMAP4_CTRL_MODULE_PAD_KPD_ROW5_OFFSET 0x018c
#define OMAP4_CTRL_MODULE_PAD_KPD_ROW0_OFFSET 0x018e
#define OMAP4_CTRL_MODULE_PAD_KPD_ROW1_OFFSET 0x0190
#define OMAP4_CTRL_MODULE_PAD_KPD_ROW2_OFFSET 0x0192
#define OMAP4_CTRL_MODULE_PAD_CORE_MUX_SIZE \
(OMAP4_CTRL_MODULE_PAD_DPM_EMU19_OFFSET \
- OMAP4_CTRL_MODULE_PAD_GPMC_AD0_OFFSET + 2)
/* ctrl_module_pad_wkup base address */
#define OMAP4_CTRL_MODULE_PAD_WKUP_MUX_PBASE 0x4a31e000
/* ctrl_module_pad_wkup registers offset */
#define OMAP4_CTRL_MODULE_PAD_SIM_IO_OFFSET 0x0040
#define OMAP4_CTRL_MODULE_PAD_SIM_CLK_OFFSET 0x0042
#define OMAP4_CTRL_MODULE_PAD_SIM_RESET_OFFSET 0x0044
#define OMAP4_CTRL_MODULE_PAD_SIM_CD_OFFSET 0x0046
#define OMAP4_CTRL_MODULE_PAD_SIM_PWRCTRL_OFFSET 0x0048
#define OMAP4_CTRL_MODULE_PAD_SR_SCL_OFFSET 0x004a
#define OMAP4_CTRL_MODULE_PAD_SR_SDA_OFFSET 0x004c
#define OMAP4_CTRL_MODULE_PAD_FREF_XTAL_IN_OFFSET 0x004e
#define OMAP4_CTRL_MODULE_PAD_FREF_SLICER_IN_OFFSET 0x0050
#define OMAP4_CTRL_MODULE_PAD_FREF_CLK_IOREQ_OFFSET 0x0052
#define OMAP4_CTRL_MODULE_PAD_FREF_CLK0_OUT_OFFSET 0x0054
#define OMAP4_CTRL_MODULE_PAD_FREF_CLK3_REQ_OFFSET 0x0056
#define OMAP4_CTRL_MODULE_PAD_FREF_CLK3_OUT_OFFSET 0x0058
#define OMAP4_CTRL_MODULE_PAD_FREF_CLK4_REQ_OFFSET 0x005a
#define OMAP4_CTRL_MODULE_PAD_FREF_CLK4_OUT_OFFSET 0x005c
#define OMAP4_CTRL_MODULE_PAD_SYS_32K_OFFSET 0x005e
#define OMAP4_CTRL_MODULE_PAD_SYS_NRESPWRON_OFFSET 0x0060
#define OMAP4_CTRL_MODULE_PAD_SYS_NRESWARM_OFFSET 0x0062
#define OMAP4_CTRL_MODULE_PAD_SYS_PWR_REQ_OFFSET 0x0064
#define OMAP4_CTRL_MODULE_PAD_SYS_PWRON_RESET_OUT_OFFSET 0x0066
#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT6_OFFSET 0x0068
#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT7_OFFSET 0x006a
#define OMAP4_CTRL_MODULE_PAD_JTAG_NTRST_OFFSET 0x006c
#define OMAP4_CTRL_MODULE_PAD_JTAG_TCK_OFFSET 0x006e
#define OMAP4_CTRL_MODULE_PAD_JTAG_RTCK_OFFSET 0x0070
#define OMAP4_CTRL_MODULE_PAD_JTAG_TMS_TMSC_OFFSET 0x0072
#define OMAP4_CTRL_MODULE_PAD_JTAG_TDI_OFFSET 0x0074
#define OMAP4_CTRL_MODULE_PAD_JTAG_TDO_OFFSET 0x0076
#define OMAP4_CTRL_MODULE_PAD_WKUP_MUX_SIZE \
(OMAP4_CTRL_MODULE_PAD_JTAG_TDO_OFFSET \
- OMAP4_CTRL_MODULE_PAD_SIM_IO_OFFSET + 2)
#endif
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