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52a2e4fc
编写于
10月 14, 2009
作者:
M
Mauro Carvalho Chehab
浏览文件
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差异文件
i7core_edac: Add initial support for Lynnfield
Signed-off-by:
N
Mauro Carvalho Chehab
<
mchehab@redhat.com
>
上级
4f7b9e7c
变更
2
隐藏空白更改
内联
并排
Showing
2 changed file
with
52 addition
and
2 deletion
+52
-2
drivers/edac/i7core_edac.c
drivers/edac/i7core_edac.c
+37
-2
include/linux/pci_ids.h
include/linux/pci_ids.h
+15
-0
未找到文件。
drivers/edac/i7core_edac.c
浏览文件 @
52a2e4fc
...
...
@@ -299,11 +299,30 @@ struct pci_id_descr pci_dev_descr_i7core[] = {
};
struct
pci_id_descr
pci_dev_descr_lynnfield
[]
=
{
{
PCI_DESCR
(
3
,
0
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR
)
},
{
PCI_DESCR
(
3
,
1
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD
)
},
{
PCI_DESCR
(
3
,
4
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST
)
},
{
PCI_DESCR
(
4
,
0
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL
)
},
{
PCI_DESCR
(
4
,
1
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR
)
},
{
PCI_DESCR
(
4
,
2
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK
)
},
{
PCI_DESCR
(
4
,
3
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC
)
},
{
PCI_DESCR
(
4
,
0
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL
)
},
{
PCI_DESCR
(
4
,
1
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR
)
},
{
PCI_DESCR
(
4
,
2
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK
)
},
{
PCI_DESCR
(
4
,
3
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC
)
},
{
PCI_DESCR
(
0
,
0
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE
)
},
};
/*
* pci_device_id table for which devices we are looking for
*/
static
const
struct
pci_device_id
i7core_pci_tbl
[]
__devinitdata
=
{
{
PCI_DEVICE
(
PCI_VENDOR_ID_INTEL
,
PCI_DEVICE_ID_INTEL_X58_HUB_MGMT
)},
{
PCI_DEVICE
(
PCI_VENDOR_ID_INTEL
,
PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE
)},
{
0
,}
/* 0 terminated list. */
};
...
...
@@ -522,6 +541,9 @@ static int get_dimm_config(struct mem_ctl_info *mci, int *csrow)
for
(
i
=
0
;
i
<
NUM_CHANS
;
i
++
)
{
u32
data
,
dimm_dod
[
3
],
value
[
8
];
if
(
!
pvt
->
pci_ch
[
i
][
0
])
continue
;
if
(
!
CH_ACTIVE
(
pvt
,
i
))
{
debugf0
(
"Channel %i is not active
\n
"
,
i
);
continue
;
...
...
@@ -1001,6 +1023,9 @@ static ssize_t i7core_inject_enable_show(struct mem_ctl_info *mci,
struct
i7core_pvt
*
pvt
=
mci
->
pvt_info
;
u32
injectmask
;
if
(
!
pvt
->
pci_ch
[
pvt
->
inject
.
channel
][
0
])
return
0
;
pci_read_config_dword
(
pvt
->
pci_ch
[
pvt
->
inject
.
channel
][
0
],
MC_CHANNEL_ERROR_INJECT
,
&
injectmask
);
...
...
@@ -1841,8 +1866,18 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
/* get the pci devices we want to reserve for our use */
mutex_lock
(
&
i7core_edac_lock
);
rc
=
i7core_get_devices
(
pci_dev_descr_i7core
,
ARRAY_SIZE
(
pci_dev_descr_i7core
));
if
(
pdev
->
device
==
PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE
)
{
printk
(
KERN_INFO
"i7core_edac: detected a "
"Lynnfield processor
\n
"
);
rc
=
i7core_get_devices
(
pci_dev_descr_lynnfield
,
ARRAY_SIZE
(
pci_dev_descr_lynnfield
));
}
else
{
printk
(
KERN_INFO
"i7core_edac: detected a "
"Nehalem/Nehalem-EP processor
\n
"
);
rc
=
i7core_get_devices
(
pci_dev_descr_i7core
,
ARRAY_SIZE
(
pci_dev_descr_i7core
));
}
if
(
unlikely
(
rc
<
0
))
goto
fail0
;
...
...
include/linux/pci_ids.h
浏览文件 @
52a2e4fc
...
...
@@ -2550,6 +2550,21 @@
#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_TC 0x2c33
#define PCI_DEVICE_ID_INTEL_I7_NONCORE 0x2c41
#define PCI_DEVICE_ID_INTEL_I7_NONCORE_ALT 0x2c40
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE 0x2c50
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_SAD 0x2c81
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_LINK0 0x2c90
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_PHY0 0x2c91
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR 0x2c98
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD 0x2c99
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST 0x2c9C
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL 0x2ca0
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR 0x2ca1
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK 0x2ca2
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC 0x2ca3
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL 0x2ca8
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR 0x2ca9
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK 0x2caa
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC 0x2cab
#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
#define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429
#define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a
...
...
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