ASoC: Intel: Skylake: Disable SRAM Retention before D3
SW needs to set the PGCTL.LSRMD = 1 to disable LPSRAM retention feature,otherwise it may lead to SRAM ECC Errors. Signed-off-by: NDharageswari R <dharageswari.r@intel.com> Signed-off-by: NJeeja KP <jeeja.kp@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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