Provide 64-bit address space definitions for the Sibyte SB1 CPU core.

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

include/asm-mips/addrspace.h

@@ -162,6 +162,16 @@
 #define TO_PHYS_MASK	_LLCONST_(0x000000ffffffffff)	/* 2^^40 - 1 */
 #endif
 
+#if defined(CONFIG_CPU_SB1)
+#define KUSIZE		_LLCONST_(0x0000100000000000)	/* 2^^44 */
+#define KUSIZE_64	_LLCONST_(0x0000100000000000)	/* 2^^44 */
+#define K0SIZE		_LLCONST_(0x0000100000000000)	/* 2^^44 */
+#define K1SIZE		_LLCONST_(0x0000100000000000)	/* 2^^44 */
+#define K2SIZE		_LLCONST_(0x0000ffff80000000)
+#define KSEGSIZE	_LLCONST_(0x0000ffff80000000)	/* max syssegsz */
+#define TO_PHYS_MASK	_LLCONST_(0x00000fffffffffff)	/* 2^^44 - 1 */
+#endif
+
 /*
  * Further names for SGI source compatibility.  These are stolen from
  * IRIX's <sys/mips_addrspace.h>.