提交 4ef888ed 编写于 作者: N Nirmoy Das 提交者: Zheng Zengkai

PCI: Add a REBAR size quirk for Sapphire RX 5600 XT Pulse

stable inclusion
from stable-5.10.21
commit 0b6383a9a80acb08768da7d15370f4ad6456baba
bugzilla: 50609

--------------------------------

[ Upstream commit 907830b0 ]

RX 5600 XT Pulse advertises support for BAR 0 being 256MB, 512MB,
or 1GB, but it also supports 2GB, 4GB, and 8GB. Add a rebar
size quirk so that the BAR 0 is big enough to cover complete VARM.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NNirmoy Das <nirmoy.das@amd.com>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20210107175017.15893-5-nirmoy.das@amd.comSigned-off-by: NSasha Levin <sashal@kernel.org>
Signed-off-by: NChen Jun <chenjun102@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 239e4c14
...@@ -3577,7 +3577,14 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar) ...@@ -3577,7 +3577,14 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
return 0; return 0;
pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap); pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap);
return (cap & PCI_REBAR_CAP_SIZES) >> 4; cap &= PCI_REBAR_CAP_SIZES;
/* Sapphire RX 5600 XT Pulse has an invalid cap dword for BAR 0 */
if (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x731f &&
bar == 0 && cap == 0x7000)
cap = 0x3f000;
return cap >> 4;
} }
/** /**
......
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