LoongArch: Enhance booting and resume compatibility

LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP

--------------------------------

- For bootstrap processor booting, firmare legacy mmu environment
is used on calling kernel_entry(), if the first instruction and
next instructions of it are not in one page built by firmware, the
instructions outside the page containing first entry instruction
will trigger tlb refill exception, which will cause bug because the
tlb refill ebase has not been configured. To avoid the disaster,
we should ensure the kernel_entry to be page aligned with 4k page
size, so that for pages of size >= 4k built by firmware, the instrutions
of kernel_entry() will be in one firmware's page.

- For S3 resume from firmware, firmare legacy mmu environment is also
used on calling wakeup entry, so the wakeup entry is required to be 4k
page aligned too. And for compatibility with calling wakeup entry by
using physical address, a jumping to itself in the wakeup entry is
required.

REBASE:
1 rebase changes at head.s to
commit a8fc1e90de478fb711ccf7e1a7115370388ab7fc
LoongArch: Add boot and setup routines

2 rebase changes at suspend_asm.S to
b4206b674b85d365097a40485c87187dfbea9a39
LoongArch:Support Power Manager

Change-Id: I5304f271c9440a8526466cfe6be44da43466cd90
Signed-off-by: NJianmin Lv <lvjianmin@loongson.cn>

arch/loongarch/kernel/head.S

@@ -34,6 +34,7 @@ SYM_DATA(kernel_offset, .long kernel_offset - _text);
 
 	__REF
 
+.align	12
 SYM_CODE_START(kernel_entry)			# kernel entry point
 
 	/* Config direct window and set PG */

arch/loongarch/power/suspend_asm.S

@@ -106,12 +106,16 @@ SYM_CODE_END(loongarch_suspend_enter)
 	/* This is where we return upon wakeup.
 	 * Reload all of the registers and return.
 	 */
+	.align	12
 SYM_CODE_START(loongarch_wakeup_start)
 	li.d	t0, CSR_DMW0_INIT	# UC, PLV0
 	csrwr	t0, LOONGARCH_CSR_DMWIN0
 	li.d	t0, CSR_DMW1_INIT	# CA, PLV0
 	csrwr	t0, LOONGARCH_CSR_DMWIN1
 
+	la.abs	t0, 0f
+	jirl	zero, t0, 0
+0:
 	la.pcrel	t0, acpi_saved_sp
 	ld.d	sp, t0, 0
 	SETUP_WAKEUP