提交 4ce8da45 编写于 作者: J Jean-Philippe Brucker 提交者: Will Deacon

iommu/arm-smmu-v3: Add command queue batching helpers

As more functions will implement command queue batching, add two helpers
to simplify building a command list.
Signed-off-by: NJean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: NWill Deacon <will@kernel.org>
上级 87e5fe5b
...@@ -548,6 +548,11 @@ struct arm_smmu_cmdq { ...@@ -548,6 +548,11 @@ struct arm_smmu_cmdq {
atomic_t lock; atomic_t lock;
}; };
struct arm_smmu_cmdq_batch {
u64 cmds[CMDQ_BATCH_ENTRIES * CMDQ_ENT_DWORDS];
int num;
};
struct arm_smmu_evtq { struct arm_smmu_evtq {
struct arm_smmu_queue q; struct arm_smmu_queue q;
u32 max_stalls; u32 max_stalls;
...@@ -1482,6 +1487,24 @@ static int arm_smmu_cmdq_issue_sync(struct arm_smmu_device *smmu) ...@@ -1482,6 +1487,24 @@ static int arm_smmu_cmdq_issue_sync(struct arm_smmu_device *smmu)
return arm_smmu_cmdq_issue_cmdlist(smmu, NULL, 0, true); return arm_smmu_cmdq_issue_cmdlist(smmu, NULL, 0, true);
} }
static void arm_smmu_cmdq_batch_add(struct arm_smmu_device *smmu,
struct arm_smmu_cmdq_batch *cmds,
struct arm_smmu_cmdq_ent *cmd)
{
if (cmds->num == CMDQ_BATCH_ENTRIES) {
arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmds, cmds->num, false);
cmds->num = 0;
}
arm_smmu_cmdq_build_cmd(&cmds->cmds[cmds->num * CMDQ_ENT_DWORDS], cmd);
cmds->num++;
}
static int arm_smmu_cmdq_batch_submit(struct arm_smmu_device *smmu,
struct arm_smmu_cmdq_batch *cmds)
{
return arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmds, cmds->num, true);
}
/* Context descriptor manipulation functions */ /* Context descriptor manipulation functions */
static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain, static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
int ssid, bool leaf) int ssid, bool leaf)
...@@ -2220,10 +2243,9 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size, ...@@ -2220,10 +2243,9 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
size_t granule, bool leaf, size_t granule, bool leaf,
struct arm_smmu_domain *smmu_domain) struct arm_smmu_domain *smmu_domain)
{ {
u64 cmds[CMDQ_BATCH_ENTRIES * CMDQ_ENT_DWORDS];
struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_device *smmu = smmu_domain->smmu;
unsigned long start = iova, end = iova + size; unsigned long start = iova, end = iova + size;
int i = 0; struct arm_smmu_cmdq_batch cmds = {};
struct arm_smmu_cmdq_ent cmd = { struct arm_smmu_cmdq_ent cmd = {
.tlbi = { .tlbi = {
.leaf = leaf, .leaf = leaf,
...@@ -2242,18 +2264,11 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size, ...@@ -2242,18 +2264,11 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
} }
while (iova < end) { while (iova < end) {
if (i == CMDQ_BATCH_ENTRIES) {
arm_smmu_cmdq_issue_cmdlist(smmu, cmds, i, false);
i = 0;
}
cmd.tlbi.addr = iova; cmd.tlbi.addr = iova;
arm_smmu_cmdq_build_cmd(&cmds[i * CMDQ_ENT_DWORDS], &cmd); arm_smmu_cmdq_batch_add(smmu, &cmds, &cmd);
iova += granule; iova += granule;
i++;
} }
arm_smmu_cmdq_batch_submit(smmu, &cmds);
arm_smmu_cmdq_issue_cmdlist(smmu, cmds, i, true);
/* /*
* Unfortunately, this can't be leaf-only since we may have * Unfortunately, this can't be leaf-only since we may have
......
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