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提交 460f5318 编写于 作者: B Bartlomiej Zolnierkiewicz 提交者： Jeff Garzik
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pata_via: store UDMA masks in via_isa_bridges table 

* store UDMA masks in via_isa_bridges[] and while at it make "flags"
  field to be u8 instead of u16

* convert the driver to use UDMA masks from via_isa_bridges[]

* remove no longer needed VIA_UDMA* defines

Make some minor documentation and CodingStyle fixes while at it.
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
上级 f777582f
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drivers/ata/pata_via.c
浏览文件 @ 460f5318
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
* VIA VT8233c - UDMA100 * VIA VT8233c - UDMA100
* VIA VT8235 - UDMA133 * VIA VT8235 - UDMA133
* VIA VT8237 - UDMA133 * VIA VT8237 - UDMA133
* VIA VT8237A - UDMA133
* VIA VT8237S - UDMA133 * VIA VT8237S - UDMA133
* VIA VT8251 - UDMA133 * VIA VT8251 - UDMA133
* *
...@@ -64,26 +65,15 @@ ...@@ -64,26 +65,15 @@
#define DRV_NAME "pata_via" #define DRV_NAME "pata_via"
#define DRV_VERSION "0.3.4" #define DRV_VERSION "0.3.4"
/*
* The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
* driver.
*/
enum { enum {
VIA_UDMA = 0x007, VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
VIA_UDMA_NONE = 0x000, VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
VIA_UDMA_33 = 0x001, VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
VIA_UDMA_66 = 0x002, VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
VIA_UDMA_100 = 0x003, VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
VIA_UDMA_133 = 0x004, VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */ VIA_NO_ENABLES = 0x40, /* Has no enablebits */
VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */ VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
VIA_NO_ENABLES = 0x400, /* Has no enablebits */
VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
}; };
enum { enum {
...@@ -99,40 +89,37 @@ static const struct via_isa_bridge { ...@@ -99,40 +89,37 @@ static const struct via_isa_bridge {
u16 id; u16 id;
u8 rev_min; u8 rev_min;
u8 rev_max; u8 rev_max;
u16 flags; u8 udma_mask;
u8 flags;
} via_isa_bridges[] = { } via_isa_bridges[] = {
{ "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
{ "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
VIA_BAD_AST | VIA_SATA_PATA }, { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
VIA_UDMA_133 | VIA_BAD_AST }, { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
{ "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 }, { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
{ "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 }, { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
{ "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 }, { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
{ "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 }, { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
{ "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
{ "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 }, { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
{ "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO }, { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ }, { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO }, { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
{ "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO }, { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
{ "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
{ "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f,
VIA_UDMA_133 | VIA_BAD_AST },
{ NULL } { NULL }
}; };
...@@ -191,10 +178,10 @@ static int via_cable_detect(struct ata_port *ap) { ...@@ -191,10 +178,10 @@ static int via_cable_detect(struct ata_port *ap) {
return ATA_CBL_SATA; return ATA_CBL_SATA;
/* Early chips are 40 wire */ /* Early chips are 40 wire */
if ((config->flags & VIA_UDMA) < VIA_UDMA_66) if (config->udma_mask < ATA_UDMA4)
return ATA_CBL_PATA40; return ATA_CBL_PATA40;
/* UDMA 66 chips have only drive side logic */ /* UDMA 66 chips have only drive side logic */
else if ((config->flags & VIA_UDMA) < VIA_UDMA_100) else if (config->udma_mask < ATA_UDMA5)
return ATA_CBL_PATA_UNK; return ATA_CBL_PATA_UNK;
/* UDMA 100 or later */ /* UDMA 100 or later */
pci_read_config_dword(pdev, 0x50, &ata66); pci_read_config_dword(pdev, 0x50, &ata66);
...@@ -233,7 +220,6 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline) ...@@ -233,7 +220,6 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline)
* @ap: ATA interface * @ap: ATA interface
* @adev: ATA device * @adev: ATA device
* @mode: ATA mode being programmed * @mode: ATA mode being programmed
* @tdiv: Clocks per PCI clock
* @set_ast: Set to program address setup * @set_ast: Set to program address setup
* @udma_type: UDMA mode/format of registers * @udma_type: UDMA mode/format of registers
* *
...@@ -244,17 +230,27 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline) ...@@ -244,17 +230,27 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline)
* on the two channels. * on the two channels.
*/ */
static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type) static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
int mode, int set_ast, int udma_type)
{ {
struct pci_dev *pdev = to_pci_dev(ap->host->dev); struct pci_dev *pdev = to_pci_dev(ap->host->dev);
struct ata_device *peer = ata_dev_pair(adev); struct ata_device *peer = ata_dev_pair(adev);
struct ata_timing t, p; struct ata_timing t, p;
static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */ static int via_clock = 33333; /* Bus clock in kHZ */
unsigned long T = 1000000000 / via_clock; unsigned long T = 1000000000 / via_clock;
unsigned long UT = T/tdiv; unsigned long UT = T;
int ut; int ut;
int offset = 3 - (2*ap->port_no) - adev->devno; int offset = 3 - (2*ap->port_no) - adev->devno;
switch (udma_type) {
case ATA_UDMA4:
UT = T / 2; break;
case ATA_UDMA5:
UT = T / 3; break;
case ATA_UDMA6:
UT = T / 4; break;
}
/* Calculate the timing values we require */ /* Calculate the timing values we require */
ata_timing_compute(adev, mode, &t, T, UT); ata_timing_compute(adev, mode, &t, T, UT);
...@@ -284,22 +280,20 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo ...@@ -284,22 +280,20 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo
((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1)); ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
/* Load the UDMA bits according to type */ /* Load the UDMA bits according to type */
switch(udma_type) { switch (udma_type) {
default: case ATA_UDMA2:
/* BUG() ? */ default:
/* fall through */ ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
case 33: break;
ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03; case ATA_UDMA4:
break; ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
case 66: break;
ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f; case ATA_UDMA5:
break; ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
case 100: break;
ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; case ATA_UDMA6:
break; ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
case 133: break;
ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
break;
} }
/* Set UDMA unless device is not UDMA capable */ /* Set UDMA unless device is not UDMA capable */
...@@ -325,22 +319,16 @@ static void via_set_piomode(struct ata_port *ap, struct ata_device *adev) ...@@ -325,22 +319,16 @@ static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
{ {
const struct via_isa_bridge *config = ap->host->private_data; const struct via_isa_bridge *config = ap->host->private_data;
int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
int mode = config->flags & VIA_UDMA;
static u8 tclock[5] = { 1, 1, 2, 3, 4 };
static u8 udma[5] = { 0, 33, 66, 100, 133 };
via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]); via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
} }
static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev) static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{ {
const struct via_isa_bridge *config = ap->host->private_data; const struct via_isa_bridge *config = ap->host->private_data;
int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
int mode = config->flags & VIA_UDMA;
static u8 tclock[5] = { 1, 1, 2, 3, 4 };
static u8 udma[5] = { 0, 33, 66, 100, 133 };
via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]); via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
} }
/** /**
...@@ -604,33 +592,29 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) ...@@ -604,33 +592,29 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
via_config_fifo(pdev, config->flags); via_config_fifo(pdev, config->flags);
/* Clock set up */ /* Clock set up */
switch(config->flags & VIA_UDMA) { switch (config->udma_mask) {
case VIA_UDMA_NONE: case 0x00:
if (config->flags & VIA_NO_UNMASK) if (config->flags & VIA_NO_UNMASK)
ppi[0] = &via_mwdma_info_borked; ppi[0] = &via_mwdma_info_borked;
else else
ppi[0] = &via_mwdma_info; ppi[0] = &via_mwdma_info;
break; break;
case VIA_UDMA_33: case ATA_UDMA2:
ppi[0] = &via_udma33_info; ppi[0] = &via_udma33_info;
break; break;
case VIA_UDMA_66: case ATA_UDMA4:
ppi[0] = &via_udma66_info; ppi[0] = &via_udma66_info;
/* The 66 MHz devices require we enable the clock */ break;
pci_read_config_dword(pdev, 0x50, &timing); case ATA_UDMA5:
timing |= 0x80008; ppi[0] = &via_udma100_info;
pci_write_config_dword(pdev, 0x50, timing); break;
break; case ATA_UDMA6:
case VIA_UDMA_100: ppi[0] = &via_udma133_info;
ppi[0] = &via_udma100_info; break;
break; default:
case VIA_UDMA_133: WARN_ON(1);
ppi[0] = &via_udma133_info; return -ENODEV;
break; }
default:
WARN_ON(1);
return -ENODEV;
}
if (config->flags & VIA_BAD_CLK66) { if (config->flags & VIA_BAD_CLK66) {
/* Disable the 66MHz clock on problem devices */ /* Disable the 66MHz clock on problem devices */
...@@ -667,7 +651,7 @@ static int via_reinit_one(struct pci_dev *pdev) ...@@ -667,7 +651,7 @@ static int via_reinit_one(struct pci_dev *pdev)
via_config_fifo(pdev, config->flags); via_config_fifo(pdev, config->flags);
if ((config->flags & VIA_UDMA) == VIA_UDMA_66) { if (config->udma_mask == ATA_UDMA4) {
/* The 66 MHz devices require we enable the clock */ /* The 66 MHz devices require we enable the clock */
pci_read_config_dword(pdev, 0x50, &timing); pci_read_config_dword(pdev, 0x50, &timing);
timing |= 0x80008; timing |= 0x80008;
......
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