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提交 45fc24e8 编写于 作者: D Dave Hansen 提交者： Dave Hansen
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x86/mpx: remove MPX from arch/x86 

From: Dave Hansen <dave.hansen@linux.intel.com>

MPX is being removed from the kernel due to a lack of support
in the toolchain going forward (gcc).

This removes all the remaining (dead at this point) MPX handling
code remaining in the tree.  The only remaining code is the XSAVE
support for MPX state which is currently needd for KVM to handle
VMs which might use MPX.

Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: x86@kernel.org
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDave Hansen <dave.hansen@linux.intel.com>
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Documentation/x86/intel_mpx.rst 已删除 100644 → 0
浏览文件 @ 42222eae
.. SPDX-License-Identifier: GPL-2.0
===========================================
Intel(R) Memory Protection Extensions (MPX)
===========================================
Intel(R) MPX Overview
=====================
Intel(R) Memory Protection Extensions (Intel(R) MPX) is a new capability
introduced into Intel Architecture. Intel MPX provides hardware features
that can be used in conjunction with compiler changes to check memory
references, for those references whose compile-time normal intentions are
usurped at runtime due to buffer overflow or underflow.
You can tell if your CPU supports MPX by looking in /proc/cpuinfo::
cat /proc/cpuinfo | grep ' mpx '
For more information, please refer to Intel(R) Architecture Instruction
Set Extensions Programming Reference, Chapter 9: Intel(R) Memory Protection
Extensions.
Note: As of December 2014, no hardware with MPX is available but it is
possible to use SDE (Intel(R) Software Development Emulator) instead, which
can be downloaded from
http://software.intel.com/en-us/articles/intel-software-development-emulator
How to get the advantage of MPX
===============================
For MPX to work, changes are required in the kernel, binutils and compiler.
No source changes are required for applications, just a recompile.
There are a lot of moving parts of this to all work right. The following
is how we expect the compiler, application and kernel to work together.
1) Application developer compiles with -fmpx. The compiler will add the
instrumentation as well as some setup code called early after the app
starts. New instruction prefixes are noops for old CPUs.
2) That setup code allocates (virtual) space for the "bounds directory",
points the "bndcfgu" register to the directory (must also set the valid
bit) and notifies the kernel (via the new prctl(PR_MPX_ENABLE_MANAGEMENT))
that the app will be using MPX. The app must be careful not to access
the bounds tables between the time when it populates "bndcfgu" and
when it calls the prctl(). This might be hard to guarantee if the app
is compiled with MPX. You can add "__attribute__((bnd_legacy))" to
the function to disable MPX instrumentation to help guarantee this.
Also be careful not to call out to any other code which might be
MPX-instrumented.
3) The kernel detects that the CPU has MPX, allows the new prctl() to
succeed, and notes the location of the bounds directory. Userspace is
expected to keep the bounds directory at that location. We note it
instead of reading it each time because the 'xsave' operation needed
to access the bounds directory register is an expensive operation.
4) If the application needs to spill bounds out of the 4 registers, it
issues a bndstx instruction. Since the bounds directory is empty at
this point, a bounds fault (#BR) is raised, the kernel allocates a
bounds table (in the user address space) and makes the relevant entry
in the bounds directory point to the new table.
5) If the application violates the bounds specified in the bounds registers,
a separate kind of #BR is raised which will deliver a signal with
information about the violation in the 'struct siginfo'.
6) Whenever memory is freed, we know that it can no longer contain valid
pointers, and we attempt to free the associated space in the bounds
tables. If an entire table becomes unused, we will attempt to free
the table and remove the entry in the directory.
To summarize, there are essentially three things interacting here:
GCC with -fmpx:
* enables annotation of code with MPX instructions and prefixes
* inserts code early in the application to call in to the "gcc runtime"
GCC MPX Runtime:
* Checks for hardware MPX support in cpuid leaf
* allocates virtual space for the bounds directory (malloc() essentially)
* points the hardware BNDCFGU register at the directory
* calls a new prctl(PR_MPX_ENABLE_MANAGEMENT) to notify the kernel to
start managing the bounds directories
Kernel MPX Code:
* Checks for hardware MPX support in cpuid leaf
* Handles #BR exceptions and sends SIGSEGV to the app when it violates
bounds, like during a buffer overflow.
* When bounds are spilled in to an unallocated bounds table, the kernel
notices in the #BR exception, allocates the virtual space, then
updates the bounds directory to point to the new table. It keeps
special track of the memory with a VM_MPX flag.
* Frees unused bounds tables at the time that the memory they described
is unmapped.
How does MPX kernel code work
=============================
Handling #BR faults caused by MPX
---------------------------------
When MPX is enabled, there are 2 new situations that can generate
#BR faults.
* new bounds tables (BT) need to be allocated to save bounds.
* bounds violation caused by MPX instructions.
We hook #BR handler to handle these two new situations.
On-demand kernel allocation of bounds tables
--------------------------------------------
MPX only has 4 hardware registers for storing bounds information. If
MPX-enabled code needs more than these 4 registers, it needs to spill
them somewhere. It has two special instructions for this which allow
the bounds to be moved between the bounds registers and some new "bounds
tables".
#BR exceptions are a new class of exceptions just for MPX. They are
similar conceptually to a page fault and will be raised by the MPX
hardware during both bounds violations or when the tables are not
present. The kernel handles those #BR exceptions for not-present tables
by carving the space out of the normal processes address space and then
pointing the bounds-directory over to it.
The tables need to be accessed and controlled by userspace because
the instructions for moving bounds in and out of them are extremely
frequent. They potentially happen every time a register points to
memory. Any direct kernel involvement (like a syscall) to access the
tables would obviously destroy performance.
Why not do this in userspace? MPX does not strictly require anything in
the kernel. It can theoretically be done completely from userspace. Here
are a few ways this could be done. We don't think any of them are practical
in the real-world, but here they are.
:Q: Can virtual space simply be reserved for the bounds tables so that we
never have to allocate them?
:A: MPX-enabled application will possibly create a lot of bounds tables in
process address space to save bounds information. These tables can take
up huge swaths of memory (as much as 80% of the memory on the system)
even if we clean them up aggressively. In the worst-case scenario, the
tables can be 4x the size of the data structure being tracked. IOW, a
1-page structure can require 4 bounds-table pages. An X-GB virtual
area needs 4*X GB of virtual space, plus 2GB for the bounds directory.
If we were to preallocate them for the 128TB of user virtual address
space, we would need to reserve 512TB+2GB, which is larger than the
entire virtual address space today. This means they can not be reserved
ahead of time. Also, a single process's pre-populated bounds directory
consumes 2GB of virtual *AND* physical memory. IOW, it's completely
infeasible to prepopulate bounds directories.
:Q: Can we preallocate bounds table space at the same time memory is
allocated which might contain pointers that might eventually need
bounds tables?
:A: This would work if we could hook the site of each and every memory
allocation syscall. This can be done for small, constrained applications.
But, it isn't practical at a larger scale since a given app has no
way of controlling how all the parts of the app might allocate memory
(think libraries). The kernel is really the only place to intercept
these calls.
:Q: Could a bounds fault be handed to userspace and the tables allocated
there in a signal handler instead of in the kernel?
:A: mmap() is not on the list of safe async handler functions and even
if mmap() would work it still requires locking or nasty tricks to
keep track of the allocation state there.
Having ruled out all of the userspace-only approaches for managing
bounds tables that we could think of, we create them on demand in
the kernel.
Decoding MPX instructions
-------------------------
If a #BR is generated due to a bounds violation caused by MPX.
We need to decode MPX instructions to get violation address and
set this address into extended struct siginfo.
The _sigfault field of struct siginfo is extended as follow::
87 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
88 struct {
89 void __user *_addr; /* faulting insn/memory ref. */
90 #ifdef __ARCH_SI_TRAPNO
91 int _trapno; /* TRAP # which caused the signal */
92 #endif
93 short _addr_lsb; /* LSB of the reported address */
94 struct {
95 void __user *_lower;
96 void __user *_upper;
97 } _addr_bnd;
98 } _sigfault;
The '_addr' field refers to violation address, and new '_addr_and'
field refers to the upper/lower bounds when a #BR is caused.
Glibc will be also updated to support this new siginfo. So user
can get violation address and bounds when bounds violations occur.
Cleanup unused bounds tables
----------------------------
When a BNDSTX instruction attempts to save bounds to a bounds directory
entry marked as invalid, a #BR is generated. This is an indication that
no bounds table exists for this entry. In this case the fault handler
will allocate a new bounds table on demand.
Since the kernel allocated those tables on-demand without userspace
knowledge, it is also responsible for freeing them when the associated
mappings go away.
Here, the solution for this issue is to hook do_munmap() to check
whether one process is MPX enabled. If yes, those bounds tables covered
in the virtual address region which is being unmapped will be freed also.
Adding new prctl commands
-------------------------
Two new prctl commands are added to enable and disable MPX bounds tables
management in kernel.
::
155 #define PR_MPX_ENABLE_MANAGEMENT 43
156 #define PR_MPX_DISABLE_MANAGEMENT 44
Runtime library in userspace is responsible for allocation of bounds
directory. So kernel have to use XSAVE instruction to get the base
of bounds directory from BNDCFG register.
But XSAVE is expected to be very expensive. In order to do performance
optimization, we have to get the base of bounds directory and save it
into struct mm_struct to be used in future during PR_MPX_ENABLE_MANAGEMENT
command execution.
Special rules
=============
1) If userspace is requesting help from the kernel to do the management
of bounds tables, it may not create or modify entries in the bounds directory.
Certainly users can allocate bounds tables and forcibly point the bounds
directory at them through XSAVE instruction, and then set valid bit
of bounds entry to have this entry valid. But, the kernel will decline
to assist in managing these tables.
2) Userspace may not take multiple bounds directory entries and point
them at the same bounds table.
This is allowed architecturally. See more information "Intel(R) Architecture
Instruction Set Extensions Programming Reference" (9.3.4).
However, if users did this, the kernel might be fooled in to unmapping an
in-use bounds table since it does not recognize sharing.
arch/x86/include/asm/bugs.h
浏览文件 @ 45fc24e8
......@@ -6,12 +6,6 @@
extern void check_bugs(void);
#if defined(CONFIG_CPU_SUP_INTEL)
void check_mpx_erratum(struct cpuinfo_x86 *c);
#else
static inline void check_mpx_erratum(struct cpuinfo_x86 *c) {}
#endif
#if defined(CONFIG_CPU_SUP_INTEL) && defined(CONFIG_X86_32)
int ppro_with_ram_bug(void);
#else
......
arch/x86/include/asm/disabled-features.h
浏览文件 @ 45fc24e8
......@@ -10,12 +10,6 @@
* cpu_feature_enabled().
*/
#ifdef CONFIG_X86_INTEL_MPX
# define DISABLE_MPX 0
#else
# define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31))
#endif
#ifdef CONFIG_X86_SMAP
# define DISABLE_SMAP 0
#else
......@@ -74,7 +68,7 @@
#define DISABLED_MASK6 0
#define DISABLED_MASK7 (DISABLE_PTI)
#define DISABLED_MASK8 0
#define DISABLED_MASK9 (DISABLE_MPX|DISABLE_SMAP)
#define DISABLED_MASK9 (DISABLE_SMAP)
#define DISABLED_MASK10 0
#define DISABLED_MASK11 0
#define DISABLED_MASK12 0
......
arch/x86/include/asm/mmu.h
浏览文件 @ 45fc24e8
......@@ -50,10 +50,6 @@ typedef struct {
u16 pkey_allocation_map;
s16 execute_only_pkey;
#endif
#ifdef CONFIG_X86_INTEL_MPX
/* address of the bounds directory */
void __user *bd_addr;
#endif
} mm_context_t;
#define INIT_MM_CONTEXT(mm) \
......
arch/x86/include/asm/mmu_context.h
浏览文件 @ 45fc24e8
......@@ -12,7 +12,6 @@
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>
#include <asm/paravirt.h>
#include <asm/mpx.h>
#include <asm/debugreg.h>
extern atomic64_t last_mm_ctx_id;
......@@ -275,25 +274,6 @@ static inline bool is_64bit_mm(struct mm_struct *mm)
static inline void arch_unmap(struct mm_struct *mm, unsigned long start,
unsigned long end)
{
/*
* mpx_notify_unmap() goes and reads a rarely-hot
* cacheline in the mm_struct. That can be expensive
* enough to be seen in profiles.
*
* The mpx_notify_unmap() call and its contents have been
* observed to affect munmap() performance on hardware
* where MPX is not present.
*
* The unlikely() optimizes for the fast case: no MPX
* in the CPU, or no MPX use in the process. Even if
* we get this wrong (in the unlikely event that MPX
* is widely enabled on some system) the overhead of
* MPX itself (reading bounds tables) is expected to
* overwhelm the overhead of getting this unlikely()
* consistently wrong.
*/
if (unlikely(cpu_feature_enabled(X86_FEATURE_MPX)))
mpx_notify_unmap(mm, start, end);
}
/*
......
arch/x86/include/asm/mpx.h 已删除 100644 → 0
浏览文件 @ 42222eae
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_MPX_H
#define _ASM_X86_MPX_H
#include <linux/types.h>
#include <linux/mm_types.h>
#include <asm/ptrace.h>
#include <asm/insn.h>
/*
* NULL is theoretically a valid place to put the bounds
* directory, so point this at an invalid address.
*/
#define MPX_INVALID_BOUNDS_DIR ((void __user *)-1)
#define MPX_BNDCFG_ENABLE_FLAG 0x1
#define MPX_BD_ENTRY_VALID_FLAG 0x1
/*
* The upper 28 bits [47:20] of the virtual address in 64-bit
* are used to index into bounds directory (BD).
*
* The directory is 2G (2^31) in size, and with 8-byte entries
* it has 2^28 entries.
*/
#define MPX_BD_SIZE_BYTES_64 (1UL<<31)
#define MPX_BD_ENTRY_BYTES_64 8
#define MPX_BD_NR_ENTRIES_64 (MPX_BD_SIZE_BYTES_64/MPX_BD_ENTRY_BYTES_64)
/*
* The 32-bit directory is 4MB (2^22) in size, and with 4-byte
* entries it has 2^20 entries.
*/
#define MPX_BD_SIZE_BYTES_32 (1UL<<22)
#define MPX_BD_ENTRY_BYTES_32 4
#define MPX_BD_NR_ENTRIES_32 (MPX_BD_SIZE_BYTES_32/MPX_BD_ENTRY_BYTES_32)
/*
* A 64-bit table is 4MB total in size, and an entry is
* 4 64-bit pointers in size.
*/
#define MPX_BT_SIZE_BYTES_64 (1UL<<22)
#define MPX_BT_ENTRY_BYTES_64 32
#define MPX_BT_NR_ENTRIES_64 (MPX_BT_SIZE_BYTES_64/MPX_BT_ENTRY_BYTES_64)
/*
* A 32-bit table is 16kB total in size, and an entry is
* 4 32-bit pointers in size.
*/
#define MPX_BT_SIZE_BYTES_32 (1UL<<14)
#define MPX_BT_ENTRY_BYTES_32 16
#define MPX_BT_NR_ENTRIES_32 (MPX_BT_SIZE_BYTES_32/MPX_BT_ENTRY_BYTES_32)
#define MPX_BNDSTA_TAIL 2
#define MPX_BNDCFG_TAIL 12
#define MPX_BNDSTA_ADDR_MASK (~((1UL<<MPX_BNDSTA_TAIL)-1))
#define MPX_BNDCFG_ADDR_MASK (~((1UL<<MPX_BNDCFG_TAIL)-1))
#define MPX_BNDSTA_ERROR_CODE 0x3
struct mpx_fault_info {
void __user *addr;
void __user *lower;
void __user *upper;
};
#ifdef CONFIG_X86_INTEL_MPX
extern int mpx_fault_info(struct mpx_fault_info *info, struct pt_regs *regs);
extern int mpx_handle_bd_fault(void);
static inline int kernel_managing_mpx_tables(struct mm_struct *mm)
{
return (mm->context.bd_addr != MPX_INVALID_BOUNDS_DIR);
}
static inline void mpx_mm_init(struct mm_struct *mm)
{
/*
* NULL is theoretically a valid place to put the bounds
* directory, so point this at an invalid address.
*/
mm->context.bd_addr = MPX_INVALID_BOUNDS_DIR;
}
extern void mpx_notify_unmap(struct mm_struct *mm, unsigned long start, unsigned long end);
extern unsigned long mpx_unmapped_area_check(unsigned long addr, unsigned long len, unsigned long flags);
#else
static inline int mpx_fault_info(struct mpx_fault_info *info, struct pt_regs *regs)
{
return -EINVAL;
}
static inline int mpx_handle_bd_fault(void)
{
return -EINVAL;
}
static inline int kernel_managing_mpx_tables(struct mm_struct *mm)
{
return 0;
}
static inline void mpx_mm_init(struct mm_struct *mm)
{
}
static inline void mpx_notify_unmap(struct mm_struct *mm,
unsigned long start, unsigned long end)
{
}
static inline unsigned long mpx_unmapped_area_check(unsigned long addr,
unsigned long len, unsigned long flags)
{
return addr;
}
#endif /* CONFIG_X86_INTEL_MPX */
#endif /* _ASM_X86_MPX_H */
arch/x86/include/asm/processor.h
浏览文件 @ 45fc24e8
......@@ -915,24 +915,6 @@ extern int set_tsc_mode(unsigned int val);
DECLARE_PER_CPU(u64, msr_misc_features_shadow);
/* Register/unregister a process' MPX related resource */
#define MPX_ENABLE_MANAGEMENT() mpx_enable_management()
#define MPX_DISABLE_MANAGEMENT() mpx_disable_management()
#ifdef CONFIG_X86_INTEL_MPX
extern int mpx_enable_management(void);
extern int mpx_disable_management(void);
#else
static inline int mpx_enable_management(void)
{
return -EINVAL;
}
static inline int mpx_disable_management(void)
{
return -EINVAL;
}
#endif /* CONFIG_X86_INTEL_MPX */
#ifdef CONFIG_CPU_SUP_AMD
extern u16 amd_get_nb_id(int cpu);
extern u32 amd_get_nodes_per_socket(void);
......
arch/x86/include/asm/trace/mpx.h 已删除 100644 → 0
浏览文件 @ 42222eae
/* SPDX-License-Identifier: GPL-2.0 */
#undef TRACE_SYSTEM
#define TRACE_SYSTEM mpx
#if !defined(_TRACE_MPX_H) || defined(TRACE_HEADER_MULTI_READ)
#define _TRACE_MPX_H
#include <linux/tracepoint.h>
#ifdef CONFIG_X86_INTEL_MPX
TRACE_EVENT(mpx_bounds_register_exception,
TP_PROTO(void __user *addr_referenced,
const struct mpx_bndreg *bndreg),
TP_ARGS(addr_referenced, bndreg),
TP_STRUCT__entry(
__field(void __user *, addr_referenced)
__field(u64, lower_bound)
__field(u64, upper_bound)
),
TP_fast_assign(
__entry->addr_referenced = addr_referenced;
__entry->lower_bound = bndreg->lower_bound;
__entry->upper_bound = bndreg->upper_bound;
),
/*
* Note that we are printing out the '~' of the upper
* bounds register here. It is actually stored in its
* one's complement form so that its 'init' state
* corresponds to all 0's. But, that looks like
* gibberish when printed out, so print out the 1's
* complement instead of the actual value here. Note
* though that you still need to specify filters for the
* actual value, not the displayed one.
*/
TP_printk("address referenced: 0x%p bounds: lower: 0x%llx ~upper: 0x%llx",
__entry->addr_referenced,
__entry->lower_bound,
~__entry->upper_bound
)
);
TRACE_EVENT(bounds_exception_mpx,
TP_PROTO(const struct mpx_bndcsr *bndcsr),
TP_ARGS(bndcsr),
TP_STRUCT__entry(
__field(u64, bndcfgu)
__field(u64, bndstatus)
),
TP_fast_assign(
/* need to get rid of the 'const' on bndcsr */
__entry->bndcfgu = (u64)bndcsr->bndcfgu;
__entry->bndstatus = (u64)bndcsr->bndstatus;
),
TP_printk("bndcfgu:0x%llx bndstatus:0x%llx",
__entry->bndcfgu,
__entry->bndstatus)
);
DECLARE_EVENT_CLASS(mpx_range_trace,
TP_PROTO(unsigned long start,
unsigned long end),
TP_ARGS(start, end),
TP_STRUCT__entry(
__field(unsigned long, start)
__field(unsigned long, end)
),
TP_fast_assign(
__entry->start = start;
__entry->end = end;
),
TP_printk("[0x%p:0x%p]",
(void *)__entry->start,
(void *)__entry->end
)
);
DEFINE_EVENT(mpx_range_trace, mpx_unmap_zap,
TP_PROTO(unsigned long start, unsigned long end),
TP_ARGS(start, end)
);
DEFINE_EVENT(mpx_range_trace, mpx_unmap_search,
TP_PROTO(unsigned long start, unsigned long end),
TP_ARGS(start, end)
);
TRACE_EVENT(mpx_new_bounds_table,
TP_PROTO(unsigned long table_vaddr),
TP_ARGS(table_vaddr),
TP_STRUCT__entry(
__field(unsigned long, table_vaddr)
),
TP_fast_assign(
__entry->table_vaddr = table_vaddr;
),
TP_printk("table vaddr:%p", (void *)__entry->table_vaddr)
);
#else
/*
* This gets used outside of MPX-specific code, so we need a stub.
*/
static inline
void trace_bounds_exception_mpx(const struct mpx_bndcsr *bndcsr)
{
}
#endif /* CONFIG_X86_INTEL_MPX */
#undef TRACE_INCLUDE_PATH
#define TRACE_INCLUDE_PATH asm/trace/
#undef TRACE_INCLUDE_FILE
#define TRACE_INCLUDE_FILE mpx
#endif /* _TRACE_MPX_H */
/* This part must be outside protection */
#include <trace/define_trace.h>
arch/x86/kernel/cpu/common.c
浏览文件 @ 45fc24e8
......@@ -165,22 +165,6 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
} };
EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
static int __init x86_mpx_setup(char *s)
{
/* require an exact match without trailing characters */
if (strlen(s))
return 0;
/* do not emit a message if the feature is not present */
if (!boot_cpu_has(X86_FEATURE_MPX))
return 1;
setup_clear_cpu_cap(X86_FEATURE_MPX);
pr_info("nompx: Intel Memory Protection Extensions (MPX) disabled\n");
return 1;
}
__setup("nompx", x86_mpx_setup);
#ifdef CONFIG_X86_64
static int __init x86_nopcid_setup(char *s)
{
......@@ -307,8 +291,6 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
static __init int setup_disable_smep(char *arg)
{
setup_clear_cpu_cap(X86_FEATURE_SMEP);
/* Check for things that depend on SMEP being enabled: */
check_mpx_erratum(&boot_cpu_data);
return 1;
}
__setup("nosmep", setup_disable_smep);
......
arch/x86/kernel/cpu/intel.c
浏览文件 @ 45fc24e8
......@@ -31,41 +31,6 @@
#include <asm/apic.h>
#endif
/*
* Just in case our CPU detection goes bad, or you have a weird system,
* allow a way to override the automatic disabling of MPX.
*/
static int forcempx;
static int __init forcempx_setup(char *__unused)
{
forcempx = 1;
return 1;
}
__setup("intel-skd-046-workaround=disable", forcempx_setup);
void check_mpx_erratum(struct cpuinfo_x86 *c)
{
if (forcempx)
return;
/*
* Turn off the MPX feature on CPUs where SMEP is not
* available or disabled.
*
* Works around Intel Erratum SKD046: "Branch Instructions
* May Initialize MPX Bound Registers Incorrectly".
*
* This might falsely disable MPX on systems without
* SMEP, like Atom processors without SMEP. But there
* is no such hardware known at the moment.
*/
if (cpu_has(c, X86_FEATURE_MPX) && !cpu_has(c, X86_FEATURE_SMEP)) {
setup_clear_cpu_cap(X86_FEATURE_MPX);
pr_warn("x86/mpx: Disabling MPX since SMEP not present\n");
}
}
/*
* Processors which have self-snooping capability can handle conflicting
* memory type across CPUs by snooping its own cache. However, there exists
......@@ -330,7 +295,6 @@ static void early_init_intel(struct cpuinfo_x86 *c)
c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);
}
check_mpx_erratum(c);
check_memory_type_self_snoop_errata(c);
/*
......
arch/x86/kernel/setup.c
浏览文件 @ 45fc24e8
......@@ -947,8 +947,6 @@ void __init setup_arch(char **cmdline_p)
init_mm.end_data = (unsigned long) _edata;
init_mm.brk = _brk_end;
mpx_mm_init(&init_mm);
code_resource.start = __pa_symbol(_text);
code_resource.end = __pa_symbol(_etext)-1;
data_resource.start = __pa_symbol(_etext);
......
arch/x86/kernel/sys_x86_64.c
浏览文件 @ 45fc24e8
......@@ -22,7 +22,6 @@
#include <asm/elf.h>
#include <asm/ia32.h>
#include <asm/syscalls.h>
#include <asm/mpx.h>
/*
* Align a virtual address to avoid aliasing in the I$ on AMD F15h.
......@@ -137,10 +136,6 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
struct vm_unmapped_area_info info;
unsigned long begin, end;
addr = mpx_unmapped_area_check(addr, len, flags);
if (IS_ERR_VALUE(addr))
return addr;
if (flags & MAP_FIXED)
return addr;
......@@ -180,10 +175,6 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
unsigned long addr = addr0;
struct vm_unmapped_area_info info;
addr = mpx_unmapped_area_check(addr, len, flags);
if (IS_ERR_VALUE(addr))
return addr;
/* requested length too big for entire address space */
if (len > TASK_SIZE)
return -ENOMEM;
......
arch/x86/mm/hugetlbpage.c
浏览文件 @ 45fc24e8
......@@ -19,7 +19,6 @@
#include <asm/tlbflush.h>
#include <asm/pgalloc.h>
#include <asm/elf.h>
#include <asm/mpx.h>
#if 0 /* This is just for testing */
struct page *
......@@ -151,10 +150,6 @@ hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
if (len & ~huge_page_mask(h))
return -EINVAL;
addr = mpx_unmapped_area_check(addr, len, flags);
if (IS_ERR_VALUE(addr))
return addr;
if (len > TASK_SIZE)
return -ENOMEM;
......
arch/x86/mm/mmap.c
浏览文件 @ 45fc24e8
......@@ -163,8 +163,6 @@ unsigned long get_mmap_base(int is_legacy)
const char *arch_vma_name(struct vm_area_struct *vma)
{
if (vma->vm_flags & VM_MPX)
return "[mpx]";
return NULL;
}
......
arch/x86/mm/mpx.c 已删除 100644 → 0
浏览文件 @ 42222eae
此差异已折叠。
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