提交 4178802c 编写于 作者: L Linus Torvalds

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

 - The SMCCC firmware interface for the spectre variant 2 mitigation has
   been updated to allow the discovery of whether the CPU needs the
   workaround. This pull request relaxes the kernel check on the return
   value from firmware.

 - Fix the commit allowing changing from global to non-global page table
   entries which inadvertently disallowed other safe attribute changes.

 - Fix sleeping in atomic during the arm_perf_teardown_cpu() code.

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: Relax ARM_SMCCC_ARCH_WORKAROUND_1 discovery
  arm_pmu: Use disable_irq_nosync when disabling SPI in CPU teardown hook
  arm64: mm: fix thinko in non-global page table attribute check
...@@ -178,7 +178,7 @@ static int enable_smccc_arch_workaround_1(void *data) ...@@ -178,7 +178,7 @@ static int enable_smccc_arch_workaround_1(void *data)
case PSCI_CONDUIT_HVC: case PSCI_CONDUIT_HVC:
arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
ARM_SMCCC_ARCH_WORKAROUND_1, &res); ARM_SMCCC_ARCH_WORKAROUND_1, &res);
if (res.a0) if ((int)res.a0 < 0)
return 0; return 0;
cb = call_hvc_arch_workaround_1; cb = call_hvc_arch_workaround_1;
smccc_start = __smccc_workaround_1_hvc_start; smccc_start = __smccc_workaround_1_hvc_start;
...@@ -188,7 +188,7 @@ static int enable_smccc_arch_workaround_1(void *data) ...@@ -188,7 +188,7 @@ static int enable_smccc_arch_workaround_1(void *data)
case PSCI_CONDUIT_SMC: case PSCI_CONDUIT_SMC:
arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
ARM_SMCCC_ARCH_WORKAROUND_1, &res); ARM_SMCCC_ARCH_WORKAROUND_1, &res);
if (res.a0) if ((int)res.a0 < 0)
return 0; return 0;
cb = call_smc_arch_workaround_1; cb = call_smc_arch_workaround_1;
smccc_start = __smccc_workaround_1_smc_start; smccc_start = __smccc_workaround_1_smc_start;
......
...@@ -108,7 +108,7 @@ static bool pgattr_change_is_safe(u64 old, u64 new) ...@@ -108,7 +108,7 @@ static bool pgattr_change_is_safe(u64 old, u64 new)
* The following mapping attributes may be updated in live * The following mapping attributes may be updated in live
* kernel mappings without the need for break-before-make. * kernel mappings without the need for break-before-make.
*/ */
static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE; static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG;
/* creating or taking down mappings is always safe */ /* creating or taking down mappings is always safe */
if (old == 0 || new == 0) if (old == 0 || new == 0)
...@@ -118,9 +118,9 @@ static bool pgattr_change_is_safe(u64 old, u64 new) ...@@ -118,9 +118,9 @@ static bool pgattr_change_is_safe(u64 old, u64 new)
if ((old | new) & PTE_CONT) if ((old | new) & PTE_CONT)
return false; return false;
/* Transitioning from Global to Non-Global is safe */ /* Transitioning from Non-Global to Global is unsafe */
if (((old ^ new) == PTE_NG) && (new & PTE_NG)) if (old & ~new & PTE_NG)
return true; return false;
return ((old ^ new) & ~mask) == 0; return ((old ^ new) & ~mask) == 0;
} }
......
...@@ -638,7 +638,7 @@ static int arm_perf_teardown_cpu(unsigned int cpu, struct hlist_node *node) ...@@ -638,7 +638,7 @@ static int arm_perf_teardown_cpu(unsigned int cpu, struct hlist_node *node)
if (irq_is_percpu_devid(irq)) if (irq_is_percpu_devid(irq))
disable_percpu_irq(irq); disable_percpu_irq(irq);
else else
disable_irq(irq); disable_irq_nosync(irq);
} }
per_cpu(cpu_armpmu, cpu) = NULL; per_cpu(cpu_armpmu, cpu) = NULL;
......
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