未验证 提交 3ed4c84c 编写于 作者: E Eddie James 提交者: Mark Brown

spi: fsi: Remove multiple sequenced ops for restricted chips

Updated restricted chips have trouble processing multiple sequenced
operations. So remove the capability to sequence multiple operations and
reduce the maximum transfer size to 8 bytes.
Signed-off-by: NEddie James <eajames@linux.ibm.com>
Reviewed-by: NJoel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210324220516.41192-1-eajames@linux.ibm.comSigned-off-by: NMark Brown <broonie@kernel.org>
上级 9d537687
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
#define SPI_FSI_BASE 0x70000 #define SPI_FSI_BASE 0x70000
#define SPI_FSI_INIT_TIMEOUT_MS 1000 #define SPI_FSI_INIT_TIMEOUT_MS 1000
#define SPI_FSI_MAX_XFR_SIZE 2048 #define SPI_FSI_MAX_XFR_SIZE 2048
#define SPI_FSI_MAX_XFR_SIZE_RESTRICTED 32 #define SPI_FSI_MAX_XFR_SIZE_RESTRICTED 8
#define SPI_FSI_ERROR 0x0 #define SPI_FSI_ERROR 0x0
#define SPI_FSI_COUNTER_CFG 0x1 #define SPI_FSI_COUNTER_CFG 0x1
...@@ -265,14 +265,12 @@ static int fsi_spi_sequence_transfer(struct fsi_spi *ctx, ...@@ -265,14 +265,12 @@ static int fsi_spi_sequence_transfer(struct fsi_spi *ctx,
struct fsi_spi_sequence *seq, struct fsi_spi_sequence *seq,
struct spi_transfer *transfer) struct spi_transfer *transfer)
{ {
bool docfg = false;
int loops; int loops;
int idx; int idx;
int rc; int rc;
u8 val = 0; u8 val = 0;
u8 len = min(transfer->len, 8U); u8 len = min(transfer->len, 8U);
u8 rem = transfer->len % len; u8 rem = transfer->len % len;
u64 cfg = 0ULL;
loops = transfer->len / len; loops = transfer->len / len;
...@@ -292,28 +290,17 @@ static int fsi_spi_sequence_transfer(struct fsi_spi *ctx, ...@@ -292,28 +290,17 @@ static int fsi_spi_sequence_transfer(struct fsi_spi *ctx,
return -EINVAL; return -EINVAL;
} }
if (ctx->restricted) { if (ctx->restricted && loops > 1) {
const int eidx = rem ? 5 : 6; dev_warn(ctx->dev,
"Transfer too large; no branches permitted.\n");
while (loops > 1 && idx <= eidx) { return -EINVAL;
idx = fsi_spi_sequence_add(seq, val);
loops--;
docfg = true;
}
if (loops > 1) {
dev_warn(ctx->dev, "No sequencer slots; aborting.\n");
return -EINVAL;
}
} }
if (loops > 1) { if (loops > 1) {
u64 cfg = SPI_FSI_COUNTER_CFG_LOOPS(loops - 1);
fsi_spi_sequence_add(seq, SPI_FSI_SEQUENCE_BRANCH(idx)); fsi_spi_sequence_add(seq, SPI_FSI_SEQUENCE_BRANCH(idx));
docfg = true;
}
if (docfg) {
cfg = SPI_FSI_COUNTER_CFG_LOOPS(loops - 1);
if (transfer->rx_buf) if (transfer->rx_buf)
cfg |= SPI_FSI_COUNTER_CFG_N2_RX | cfg |= SPI_FSI_COUNTER_CFG_N2_RX |
SPI_FSI_COUNTER_CFG_N2_TX | SPI_FSI_COUNTER_CFG_N2_TX |
......
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