提交 3d1b28fd 编写于 作者: L Luca Coelho

iwlwifi: pcie: rename L0S_ENABLED bit to L0S_DISABLED

This bit has been misnamed since the initial implementation of the
driver.  The correct semantics is that setting this bit disables L0S
states, and we already clearly use it as such in the code.  Rename it
to avoid confusion.
Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
上级 df2378ab
......@@ -379,7 +379,7 @@ enum {
/* CSR GIO */
#define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002)
#define CSR_GIO_REG_VAL_L0S_DISABLED (0x00000002)
/*
* UCODE-DRIVER GP (general purpose) mailbox register 1
......
......@@ -311,9 +311,9 @@ void iwl_pcie_apm_config(struct iwl_trans *trans)
*/
pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl);
if (lctl & PCI_EXP_LNKCTL_ASPM_L1)
iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_DISABLED);
else
iwl_clear_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
iwl_clear_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_DISABLED);
trans->pm_support = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_DEVCTL2, &cap);
......
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