drm/amdgpu: i2c subsystem uses 7 bit addresses

Convert from 8 bit to 7 bit.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NLuben Tuikov <luben.tuikov@amd.com>

drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c

@@ -29,7 +29,7 @@
 #include "amdgpu_fru_eeprom.h"
 #include "amdgpu_eeprom.h"
 
-#define I2C_PRODUCT_INFO_ADDR		0xAC
+#define I2C_PRODUCT_INFO_ADDR		0x56
 #define I2C_PRODUCT_INFO_OFFSET		0xC0
 
 static bool is_fru_eeprom_supported(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

@@ -28,11 +28,11 @@
 #include "atom.h"
 #include "amdgpu_eeprom.h"
 
-#define EEPROM_I2C_TARGET_ADDR_VEGA20		0xA0
-#define EEPROM_I2C_TARGET_ADDR_ARCTURUS		0xA8
-#define EEPROM_I2C_TARGET_ADDR_ARCTURUS_D342	0xA0
-#define EEPROM_I2C_TARGET_ADDR_SIENNA_CICHLID   0xA0
-#define EEPROM_I2C_TARGET_ADDR_ALDEBARAN        0xA0
+#define EEPROM_I2C_TARGET_ADDR_VEGA20		0x50
+#define EEPROM_I2C_TARGET_ADDR_ARCTURUS		0x54
+#define EEPROM_I2C_TARGET_ADDR_ARCTURUS_D342	0x50
+#define EEPROM_I2C_TARGET_ADDR_SIENNA_CICHLID   0x50
+#define EEPROM_I2C_TARGET_ADDR_ALDEBARAN        0x50	       
 
 /*
  * The 2 macros bellow represent the actual size in bytes that