提交 395eaaae 编写于 作者: C Chris Zhong 提交者: Sean Paul

drm/rockchip/dsi: correct the grf_switch_reg name

For the RK3399, the grf_switch_reg name should be RK3399_GRF_SOC_CON20,
not RK3399_GRF_SOC_CON19.
Signed-off-by: NChris Zhong <zyw@rock-chips.com>
Reviewed-by: NBrian Norris <briannorris@chromium.org>
Reviewed-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1490147691-4489-5-git-send-email-zyw@rock-chips.com
上级 5bc07b15
......@@ -34,7 +34,7 @@
#define RK3288_DSI0_SEL_VOP_LIT BIT(6)
#define RK3288_DSI1_SEL_VOP_LIT BIT(9)
#define RK3399_GRF_SOC_CON19 0x6250
#define RK3399_GRF_SOC_CON20 0x6250
#define RK3399_DSI0_SEL_VOP_LIT BIT(0)
#define RK3399_DSI1_SEL_VOP_LIT BIT(4)
......@@ -1151,7 +1151,7 @@ static struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
static struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
.grf_switch_reg = RK3399_GRF_SOC_CON19,
.grf_switch_reg = RK3399_GRF_SOC_CON20,
.grf_dsi0_mode = RK3399_GRF_DSI_MODE,
.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
.flags = DW_MIPI_NEEDS_PHY_CFG_CLK | DW_MIPI_NEEDS_GRF_CLK,
......
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