提交 392af023 编写于 作者: G Grigor Tovmasyan 提交者: Felipe Balbi

usb: dwc2: Add definitions for new registers

New registers were added to dwc otg core.

GREFCLK - This register used to control ref_clk parameters.

GINTSTS2 - New WKUP_ALERT interrupt was added.

GINTMSK2 - Mask register for GINTSTS2.
Acked-by: NMinas Harutyunyan <hminas@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
上级 48dac4e4
...@@ -405,6 +405,19 @@ ...@@ -405,6 +405,19 @@
#define ADPCTL_PRB_DSCHRG_MASK (0x3 << 0) #define ADPCTL_PRB_DSCHRG_MASK (0x3 << 0)
#define ADPCTL_PRB_DSCHRG_SHIFT 0 #define ADPCTL_PRB_DSCHRG_SHIFT 0
#define GREFCLK HSOTG_REG(0x0064)
#define GREFCLK_REFCLKPER_MASK (0x1ffff << 15)
#define GREFCLK_REFCLKPER_SHIFT 15
#define GREFCLK_REF_CLK_MODE BIT(14)
#define GREFCLK_SOF_CNT_WKUP_ALERT_MASK (0x3ff)
#define GREFCLK_SOF_CNT_WKUP_ALERT_SHIFT 0
#define GINTMSK2 HSOTG_REG(0x0068)
#define GINTMSK2_WKUP_ALERT_INT_MSK BIT(0)
#define GINTSTS2 HSOTG_REG(0x006c)
#define GINTSTS2_WKUP_ALERT_INT BIT(0)
#define HPTXFSIZ HSOTG_REG(0x100) #define HPTXFSIZ HSOTG_REG(0x100)
/* Use FIFOSIZE_* constants to access this register */ /* Use FIFOSIZE_* constants to access this register */
......
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