提交 37c26a90 编写于 作者: P Prashant Gaikwad 提交者: Stephen Warren

clk: tegra: add clock support for Tegra20

Add Tegra20 clock support based on common clock framework.
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
[swarren: s/1GHz/100MHz/ in call to tegra_clk_plle() to fix PCIe,
implemented KBC clock, ensure all OF lookups return valid cookies i.e.
an explicit error pointer or valid pointer not NULL, adapt to renames
in earlier patches, fixed some checkpatch issues.]
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
上级 8f8f484b
......@@ -6,3 +6,5 @@ obj-y += clk-periph-gate.o
obj-y += clk-pll.o
obj-y += clk-pll-out.o
obj-y += clk-super.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clk-tegra20.o
此差异已折叠。
......@@ -487,4 +487,10 @@ void tegra_init_from_table(struct tegra_clk_init_table *tbl,
void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
struct clk *clks[], int clk_max);
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
void tegra20_clock_init(struct device_node *np);
#else
static inline void tegra20_clock_init(struct device_node *np) {}
#endif /* CONFIG_ARCH_TEGRA_2x_SOC */
#endif /* TEGRA_CLK_H */
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