提交 375e1184 编写于 作者: T Thierry Reding

drm/tegra: hdmi: Resets are synchronous

Resets on Tegra are synchronous, so keep the clock enabled while
asserting the reset.
Signed-off-by: NThierry Reding <treding@nvidia.com>
上级 9d910b60
......@@ -1394,8 +1394,8 @@ static int tegra_hdmi_exit(struct host1x_client *client)
tegra_output_exit(&hdmi->output);
clk_disable_unprepare(hdmi->clk);
reset_control_assert(hdmi->rst);
clk_disable_unprepare(hdmi->clk);
regulator_disable(hdmi->vdd);
regulator_disable(hdmi->pll);
......
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