提交 333f9817 编写于 作者: R Richard Drummond 提交者: Linus Torvalds

[PATCH] Clean-up and bug fix for tdfxfb framebuffer size detection

Attached is a patch against 2.6.11.7 which tidies up the tdfxfb framebuffer
size detection code a little and fixes the broken support for Voodoo4/5
cards.  (I haven't tested this on a Voodoo5, however, because I don't have
the hardware).
Signed-off-by: NRichard Drummond <evilrich@rcdrummond.net>
Cc: <linux-fbdev-devel@lists.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
上级 0fbe9caf
...@@ -430,36 +430,35 @@ static void do_write_regs(struct fb_info *info, struct banshee_reg* reg) ...@@ -430,36 +430,35 @@ static void do_write_regs(struct fb_info *info, struct banshee_reg* reg)
static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id) static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
{ {
u32 draminit0 = 0; u32 draminit0;
u32 draminit1 = 0; u32 draminit1;
u32 miscinit1 = 0; u32 miscinit1;
u32 lfbsize = 0;
int sgram_p = 0; int num_chips;
int chip_size; /* in MB */
u32 lfbsize;
int has_sgram;
draminit0 = tdfx_inl(par, DRAMINIT0); draminit0 = tdfx_inl(par, DRAMINIT0);
draminit1 = tdfx_inl(par, DRAMINIT1); draminit1 = tdfx_inl(par, DRAMINIT1);
num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
if ((dev_id == PCI_DEVICE_ID_3DFX_BANSHEE) || if (dev_id < PCI_DEVICE_ID_3DFX_VOODOO5) {
(dev_id == PCI_DEVICE_ID_3DFX_VOODOO3)) { /* Banshee/Voodoo3 */
sgram_p = (draminit1 & DRAMINIT1_MEM_SDRAM) ? 0 : 1; has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
chip_size = has_sgram ? ((draminit0 & DRAMINIT0_SGRAM_TYPE) ? 2 : 1)
lfbsize = sgram_p ? : 2;
(((draminit0 & DRAMINIT0_SGRAM_NUM) ? 2 : 1) *
((draminit0 & DRAMINIT0_SGRAM_TYPE) ? 8 : 4) * 1024 * 1024) :
16 * 1024 * 1024;
} else { } else {
/* Voodoo4/5 */ /* Voodoo4/5 */
u32 chips, psize, banks; has_sgram = 0;
chip_size = 1 << ((draminit0 & DRAMINIT0_SGRAM_TYPE_MASK) >> DRAMINIT0_SGRAM_TYPE_SHIFT);
chips = ((draminit0 & (1 << 26)) == 0) ? 4 : 8; }
psize = 1 << ((draminit0 & 0x38000000) >> 28); lfbsize = num_chips * chip_size * 1024 * 1024;
banks = ((draminit0 & (1 << 30)) == 0) ? 2 : 4;
lfbsize = chips * psize * banks; /* disable block writes for SDRAM */
lfbsize <<= 20;
}
/* disable block writes for SDRAM (why?) */
miscinit1 = tdfx_inl(par, MISCINIT1); miscinit1 = tdfx_inl(par, MISCINIT1);
miscinit1 |= sgram_p ? 0 : MISCINIT1_2DBLOCK_DIS; miscinit1 |= has_sgram ? 0 : MISCINIT1_2DBLOCK_DIS;
miscinit1 |= MISCINIT1_CLUT_INV; miscinit1 |= MISCINIT1_CLUT_INV;
banshee_make_room(par, 1); banshee_make_room(par, 1);
......
...@@ -99,6 +99,8 @@ ...@@ -99,6 +99,8 @@
#define MISCINIT1_2DBLOCK_DIS BIT(15) #define MISCINIT1_2DBLOCK_DIS BIT(15)
#define DRAMINIT0_SGRAM_NUM BIT(26) #define DRAMINIT0_SGRAM_NUM BIT(26)
#define DRAMINIT0_SGRAM_TYPE BIT(27) #define DRAMINIT0_SGRAM_TYPE BIT(27)
#define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27)|BIT(28)|BIT(29))
#define DRAMINIT0_SGRAM_TYPE_SHIFT 27
#define DRAMINIT1_MEM_SDRAM BIT(30) #define DRAMINIT1_MEM_SDRAM BIT(30)
#define VGAINIT0_VGA_DISABLE BIT(0) #define VGAINIT0_VGA_DISABLE BIT(0)
#define VGAINIT0_EXT_TIMING BIT(1) #define VGAINIT0_EXT_TIMING BIT(1)
......
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