提交 32f16e14 编写于 作者: D David S. Miller

Merge branch 'mlx5-fixes'

Saeed Mahameed says:

====================
Mellanox 100G mlx5 fixes 2016-12-04

Some bug fixes for mlx5 core and mlx5e driver.

v1->v2:
 - replace "uint" with "unsigned int"
====================
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
...@@ -268,11 +268,6 @@ static void dump_buf(void *buf, int size, int data_only, int offset) ...@@ -268,11 +268,6 @@ static void dump_buf(void *buf, int size, int data_only, int offset)
pr_debug("\n"); pr_debug("\n");
} }
enum {
MLX5_DRIVER_STATUS_ABORTED = 0xfe,
MLX5_DRIVER_SYND = 0xbadd00de,
};
static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
u32 *synd, u8 *status) u32 *synd, u8 *status)
{ {
......
...@@ -241,7 +241,7 @@ struct mlx5e_tstamp { ...@@ -241,7 +241,7 @@ struct mlx5e_tstamp {
}; };
enum { enum {
MLX5E_RQ_STATE_FLUSH, MLX5E_RQ_STATE_ENABLED,
MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS,
MLX5E_RQ_STATE_AM, MLX5E_RQ_STATE_AM,
}; };
...@@ -394,7 +394,7 @@ struct mlx5e_sq_dma { ...@@ -394,7 +394,7 @@ struct mlx5e_sq_dma {
}; };
enum { enum {
MLX5E_SQ_STATE_FLUSH, MLX5E_SQ_STATE_ENABLED,
MLX5E_SQ_STATE_BF_ENABLE, MLX5E_SQ_STATE_BF_ENABLE,
}; };
......
...@@ -759,6 +759,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c, ...@@ -759,6 +759,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
if (err) if (err)
goto err_destroy_rq; goto err_destroy_rq;
set_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY); err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY);
if (err) if (err)
goto err_disable_rq; goto err_disable_rq;
...@@ -773,6 +774,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c, ...@@ -773,6 +774,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
return 0; return 0;
err_disable_rq: err_disable_rq:
clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
mlx5e_disable_rq(rq); mlx5e_disable_rq(rq);
err_destroy_rq: err_destroy_rq:
mlx5e_destroy_rq(rq); mlx5e_destroy_rq(rq);
...@@ -782,7 +784,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c, ...@@ -782,7 +784,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
static void mlx5e_close_rq(struct mlx5e_rq *rq) static void mlx5e_close_rq(struct mlx5e_rq *rq)
{ {
set_bit(MLX5E_RQ_STATE_FLUSH, &rq->state); clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */ napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */
cancel_work_sync(&rq->am.work); cancel_work_sync(&rq->am.work);
...@@ -1006,7 +1008,6 @@ static int mlx5e_enable_sq(struct mlx5e_sq *sq, struct mlx5e_sq_param *param) ...@@ -1006,7 +1008,6 @@ static int mlx5e_enable_sq(struct mlx5e_sq *sq, struct mlx5e_sq_param *param)
MLX5_SET(sqc, sqc, min_wqe_inline_mode, sq->min_inline_mode); MLX5_SET(sqc, sqc, min_wqe_inline_mode, sq->min_inline_mode);
MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
MLX5_SET(sqc, sqc, tis_lst_sz, param->type == MLX5E_SQ_ICO ? 0 : 1); MLX5_SET(sqc, sqc, tis_lst_sz, param->type == MLX5E_SQ_ICO ? 0 : 1);
MLX5_SET(sqc, sqc, flush_in_error_en, 1);
MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
MLX5_SET(wq, wq, uar_page, sq->uar.index); MLX5_SET(wq, wq, uar_page, sq->uar.index);
...@@ -1083,6 +1084,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c, ...@@ -1083,6 +1084,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c,
if (err) if (err)
goto err_destroy_sq; goto err_destroy_sq;
set_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY, err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY,
false, 0); false, 0);
if (err) if (err)
...@@ -1096,6 +1098,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c, ...@@ -1096,6 +1098,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c,
return 0; return 0;
err_disable_sq: err_disable_sq:
clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
mlx5e_disable_sq(sq); mlx5e_disable_sq(sq);
err_destroy_sq: err_destroy_sq:
mlx5e_destroy_sq(sq); mlx5e_destroy_sq(sq);
...@@ -1112,7 +1115,7 @@ static inline void netif_tx_disable_queue(struct netdev_queue *txq) ...@@ -1112,7 +1115,7 @@ static inline void netif_tx_disable_queue(struct netdev_queue *txq)
static void mlx5e_close_sq(struct mlx5e_sq *sq) static void mlx5e_close_sq(struct mlx5e_sq *sq)
{ {
set_bit(MLX5E_SQ_STATE_FLUSH, &sq->state); clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
/* prevent netif_tx_wake_queue */ /* prevent netif_tx_wake_queue */
napi_synchronize(&sq->channel->napi); napi_synchronize(&sq->channel->napi);
...@@ -3092,7 +3095,7 @@ static void mlx5e_tx_timeout(struct net_device *dev) ...@@ -3092,7 +3095,7 @@ static void mlx5e_tx_timeout(struct net_device *dev)
if (!netif_xmit_stopped(netdev_get_tx_queue(dev, i))) if (!netif_xmit_stopped(netdev_get_tx_queue(dev, i)))
continue; continue;
sched_work = true; sched_work = true;
set_bit(MLX5E_SQ_STATE_FLUSH, &sq->state); clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n", netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n",
i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc); i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc);
} }
...@@ -3147,13 +3150,13 @@ static int mlx5e_xdp_set(struct net_device *netdev, struct bpf_prog *prog) ...@@ -3147,13 +3150,13 @@ static int mlx5e_xdp_set(struct net_device *netdev, struct bpf_prog *prog)
for (i = 0; i < priv->params.num_channels; i++) { for (i = 0; i < priv->params.num_channels; i++) {
struct mlx5e_channel *c = priv->channel[i]; struct mlx5e_channel *c = priv->channel[i];
set_bit(MLX5E_RQ_STATE_FLUSH, &c->rq.state); clear_bit(MLX5E_RQ_STATE_ENABLED, &c->rq.state);
napi_synchronize(&c->napi); napi_synchronize(&c->napi);
/* prevent mlx5e_poll_rx_cq from accessing rq->xdp_prog */ /* prevent mlx5e_poll_rx_cq from accessing rq->xdp_prog */
old_prog = xchg(&c->rq.xdp_prog, prog); old_prog = xchg(&c->rq.xdp_prog, prog);
clear_bit(MLX5E_RQ_STATE_FLUSH, &c->rq.state); set_bit(MLX5E_RQ_STATE_ENABLED, &c->rq.state);
/* napi_schedule in case we have missed anything */ /* napi_schedule in case we have missed anything */
set_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags); set_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags);
napi_schedule(&c->napi); napi_schedule(&c->napi);
......
...@@ -340,7 +340,7 @@ static inline void mlx5e_post_umr_wqe(struct mlx5e_rq *rq, u16 ix) ...@@ -340,7 +340,7 @@ static inline void mlx5e_post_umr_wqe(struct mlx5e_rq *rq, u16 ix)
while ((pi = (sq->pc & wq->sz_m1)) > sq->edge) { while ((pi = (sq->pc & wq->sz_m1)) > sq->edge) {
sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP; sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
sq->db.ico_wqe[pi].num_wqebbs = 1; sq->db.ico_wqe[pi].num_wqebbs = 1;
mlx5e_send_nop(sq, true); mlx5e_send_nop(sq, false);
} }
wqe = mlx5_wq_cyc_get_wqe(wq, pi); wqe = mlx5_wq_cyc_get_wqe(wq, pi);
...@@ -412,7 +412,7 @@ void mlx5e_post_rx_mpwqe(struct mlx5e_rq *rq) ...@@ -412,7 +412,7 @@ void mlx5e_post_rx_mpwqe(struct mlx5e_rq *rq)
clear_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state); clear_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state);
if (unlikely(test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state))) { if (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state))) {
mlx5e_free_rx_mpwqe(rq, &rq->mpwqe.info[wq->head]); mlx5e_free_rx_mpwqe(rq, &rq->mpwqe.info[wq->head]);
return; return;
} }
...@@ -445,7 +445,7 @@ void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix) ...@@ -445,7 +445,7 @@ void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)
} }
#define RQ_CANNOT_POST(rq) \ #define RQ_CANNOT_POST(rq) \
(test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state) || \ (!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state) || \
test_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state)) test_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state))
bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq) bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq)
...@@ -924,7 +924,7 @@ int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget) ...@@ -924,7 +924,7 @@ int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget)
struct mlx5e_sq *xdp_sq = &rq->channel->xdp_sq; struct mlx5e_sq *xdp_sq = &rq->channel->xdp_sq;
int work_done = 0; int work_done = 0;
if (unlikely(test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state))) if (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state)))
return 0; return 0;
if (cq->decmprs_left) if (cq->decmprs_left)
......
...@@ -409,7 +409,7 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget) ...@@ -409,7 +409,7 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget)
sq = container_of(cq, struct mlx5e_sq, cq); sq = container_of(cq, struct mlx5e_sq, cq);
if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state))) if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
return false; return false;
npkts = 0; npkts = 0;
......
...@@ -56,7 +56,7 @@ static void mlx5e_poll_ico_cq(struct mlx5e_cq *cq) ...@@ -56,7 +56,7 @@ static void mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
struct mlx5_cqe64 *cqe; struct mlx5_cqe64 *cqe;
u16 sqcc; u16 sqcc;
if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state))) if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
return; return;
cqe = mlx5e_get_cqe(cq); cqe = mlx5e_get_cqe(cq);
...@@ -113,7 +113,7 @@ static inline bool mlx5e_poll_xdp_tx_cq(struct mlx5e_cq *cq) ...@@ -113,7 +113,7 @@ static inline bool mlx5e_poll_xdp_tx_cq(struct mlx5e_cq *cq)
sq = container_of(cq, struct mlx5e_sq, cq); sq = container_of(cq, struct mlx5e_sq, cq);
if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state))) if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
return false; return false;
/* sq->cc must be updated only after mlx5_cqwq_update_db_record(), /* sq->cc must be updated only after mlx5_cqwq_update_db_record(),
......
...@@ -62,13 +62,13 @@ MODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); ...@@ -62,13 +62,13 @@ MODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver");
MODULE_LICENSE("Dual BSD/GPL"); MODULE_LICENSE("Dual BSD/GPL");
MODULE_VERSION(DRIVER_VERSION); MODULE_VERSION(DRIVER_VERSION);
int mlx5_core_debug_mask; unsigned int mlx5_core_debug_mask;
module_param_named(debug_mask, mlx5_core_debug_mask, int, 0644); module_param_named(debug_mask, mlx5_core_debug_mask, uint, 0644);
MODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); MODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0");
#define MLX5_DEFAULT_PROF 2 #define MLX5_DEFAULT_PROF 2
static int prof_sel = MLX5_DEFAULT_PROF; static unsigned int prof_sel = MLX5_DEFAULT_PROF;
module_param_named(prof_sel, prof_sel, int, 0444); module_param_named(prof_sel, prof_sel, uint, 0444);
MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2");
enum { enum {
...@@ -732,13 +732,15 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev) ...@@ -732,13 +732,15 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
u8 status; u8 status;
mlx5_cmd_mbox_status(query_out, &status, &syndrome); mlx5_cmd_mbox_status(query_out, &status, &syndrome);
if (status == MLX5_CMD_STAT_BAD_OP_ERR) { if (!status || syndrome == MLX5_DRIVER_SYND) {
pr_debug("Only ISSI 0 is supported\n"); mlx5_core_err(dev, "Failed to query ISSI err(%d) status(%d) synd(%d)\n",
return 0; err, status, syndrome);
return err;
} }
pr_err("failed to query ISSI err(%d)\n", err); mlx5_core_warn(dev, "Query ISSI is not supported by FW, ISSI is 0\n");
return err; dev->issi = 0;
return 0;
} }
sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0);
...@@ -752,7 +754,8 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev) ...@@ -752,7 +754,8 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), err = mlx5_cmd_exec(dev, set_in, sizeof(set_in),
set_out, sizeof(set_out)); set_out, sizeof(set_out));
if (err) { if (err) {
pr_err("failed to set ISSI=1 err(%d)\n", err); mlx5_core_err(dev, "Failed to set ISSI to 1 err(%d)\n",
err);
return err; return err;
} }
...@@ -1227,13 +1230,6 @@ static int init_one(struct pci_dev *pdev, ...@@ -1227,13 +1230,6 @@ static int init_one(struct pci_dev *pdev,
dev->pdev = pdev; dev->pdev = pdev;
dev->event = mlx5_core_event; dev->event = mlx5_core_event;
if (prof_sel < 0 || prof_sel >= ARRAY_SIZE(profile)) {
mlx5_core_warn(dev,
"selected profile out of range, selecting default (%d)\n",
MLX5_DEFAULT_PROF);
prof_sel = MLX5_DEFAULT_PROF;
}
dev->profile = &profile[prof_sel]; dev->profile = &profile[prof_sel];
INIT_LIST_HEAD(&priv->ctx_list); INIT_LIST_HEAD(&priv->ctx_list);
...@@ -1450,10 +1446,22 @@ static struct pci_driver mlx5_core_driver = { ...@@ -1450,10 +1446,22 @@ static struct pci_driver mlx5_core_driver = {
.sriov_configure = mlx5_core_sriov_configure, .sriov_configure = mlx5_core_sriov_configure,
}; };
static void mlx5_core_verify_params(void)
{
if (prof_sel >= ARRAY_SIZE(profile)) {
pr_warn("mlx5_core: WARNING: Invalid module parameter prof_sel %d, valid range 0-%zu, changing back to default(%d)\n",
prof_sel,
ARRAY_SIZE(profile) - 1,
MLX5_DEFAULT_PROF);
prof_sel = MLX5_DEFAULT_PROF;
}
}
static int __init init(void) static int __init init(void)
{ {
int err; int err;
mlx5_core_verify_params();
mlx5_register_debugfs(); mlx5_register_debugfs();
err = pci_register_driver(&mlx5_core_driver); err = pci_register_driver(&mlx5_core_driver);
......
...@@ -44,11 +44,11 @@ ...@@ -44,11 +44,11 @@
#define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev)) #define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev))
extern int mlx5_core_debug_mask; extern uint mlx5_core_debug_mask;
#define mlx5_core_dbg(__dev, format, ...) \ #define mlx5_core_dbg(__dev, format, ...) \
dev_dbg(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \ dev_dbg(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
(__dev)->priv.name, __func__, __LINE__, current->pid, \ __func__, __LINE__, current->pid, \
##__VA_ARGS__) ##__VA_ARGS__)
#define mlx5_core_dbg_mask(__dev, mask, format, ...) \ #define mlx5_core_dbg_mask(__dev, mask, format, ...) \
...@@ -63,8 +63,8 @@ do { \ ...@@ -63,8 +63,8 @@ do { \
##__VA_ARGS__) ##__VA_ARGS__)
#define mlx5_core_warn(__dev, format, ...) \ #define mlx5_core_warn(__dev, format, ...) \
dev_warn(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \ dev_warn(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
(__dev)->priv.name, __func__, __LINE__, current->pid, \ __func__, __LINE__, current->pid, \
##__VA_ARGS__) ##__VA_ARGS__)
#define mlx5_core_info(__dev, format, ...) \ #define mlx5_core_info(__dev, format, ...) \
...@@ -75,6 +75,11 @@ enum { ...@@ -75,6 +75,11 @@ enum {
MLX5_CMD_TIME, /* print command execution time */ MLX5_CMD_TIME, /* print command execution time */
}; };
enum {
MLX5_DRIVER_STATUS_ABORTED = 0xfe,
MLX5_DRIVER_SYND = 0xbadd00de,
};
int mlx5_query_hca_caps(struct mlx5_core_dev *dev); int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
int mlx5_query_board_id(struct mlx5_core_dev *dev); int mlx5_query_board_id(struct mlx5_core_dev *dev);
int mlx5_cmd_init_hca(struct mlx5_core_dev *dev); int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
......
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