提交 305b5475 编写于 作者: P Paweł Jarosz 提交者: Heiko Stuebner

ARM: dts: rockchip: initialize rk3066 PLL clock rate

Initialize PLL, cpu bus and peripherial bus rate while kernel init.
No other module does than.

This gives us performance boost observable for example in mmc transfers.
Signed-off-by: NPaweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
上级 30522550
......@@ -151,6 +151,14 @@
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
<&cru ACLK_CPU>, <&cru HCLK_CPU>,
<&cru PCLK_CPU>, <&cru ACLK_PERI>,
<&cru HCLK_PERI>, <&cru PCLK_PERI>;
assigned-clock-rates = <400000000>, <594000000>,
<300000000>, <150000000>,
<75000000>, <300000000>,
<150000000>, <75000000>;
};
timer@2000e000 {
......
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