提交 2f8dd850 编写于 作者: L Linus Torvalds

Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6

* master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6:
  ide: remove CONFIG_IDEDMA_{ICS,PCI}_AUTO config options
  ide: don't allow DMA to be enabled if CONFIG_IDEDMA_{ICS,PCI}_AUTO=n
  scc_pata: dependency fix
  jmicron: make ide jmicron driver play nice with libata ones
  ide: remove static prototypes from include/asm-mips/mach-au1x00/au1xxx_ide.h
  ide: au1xxx: fix use of mixed declarations and code
  cmd64x: fix recovery time calculation (take 3)
......@@ -434,24 +434,8 @@ config BLK_DEV_IDEDMA_FORCED
Generally say N here.
config IDEDMA_PCI_AUTO
bool "Use PCI DMA by default when available"
---help---
Prior to kernel version 2.1.112, Linux used to automatically use
DMA for IDE drives and chipsets which support it. Due to concerns
about a couple of cases where buggy hardware may have caused damage,
the default is now to NOT use DMA automatically. To revert to the
previous behaviour, say Y to this question.
If you suspect your hardware is at all flakey, say N here.
Do NOT email the IDE kernel people regarding this issue!
It is normally safe to answer Y to this question unless your
motherboard uses a VIA VP2 chipset, in which case you should say N.
config IDEDMA_ONLYDISK
bool "Enable DMA only for disks "
depends on IDEDMA_PCI_AUTO
help
This is used if you know your ATAPI Devices are going to fail DMA
Transfers.
......@@ -769,6 +753,14 @@ config BLK_DEV_TC86C001
help
This driver adds support for Toshiba TC86C001 GOKU-S chip.
config BLK_DEV_CELLEB
tristate "Toshiba's Cell Reference Set IDE support"
depends on PPC_CELLEB
help
This driver provides support for the built-in IDE controller on
Toshiba Cell Reference Board.
If unsure, say Y.
endif
config BLK_DEV_IDE_PMAC
......@@ -800,14 +792,6 @@ config BLK_DEV_IDEDMA_PMAC
to transfer data to and from memory. Saying Y is safe and improves
performance.
config BLK_DEV_IDE_CELLEB
bool "Toshiba's Cell Reference Set IDE support"
depends on PPC_CELLEB && IDE=y
help
This driver provides support for the built-in IDE controller on
Toshiba Cell Reference Board.
If unsure, say Y.
config BLK_DEV_IDE_SWARM
tristate "IDE for Sibyte evaluation boards"
depends on SIBYTE_SB1xxx_SOC
......@@ -851,19 +835,6 @@ config BLK_DEV_IDEDMA_ICS
Say Y here if you want to add DMA (Direct Memory Access) support to
the ICS IDE driver.
config IDEDMA_ICS_AUTO
bool "Use ICS DMA by default"
depends on BLK_DEV_IDEDMA_ICS
help
Prior to kernel version 2.1.112, Linux used to automatically use
DMA for IDE drives and chipsets which support it. Due to concerns
about a couple of cases where buggy hardware may have caused damage,
the default is now to NOT use DMA automatically. To revert to the
previous behaviour, say Y to this question.
If you suspect your hardware is at all flakey, say N here.
Do NOT email the IDE kernel people regarding this issue!
config BLK_DEV_IDE_RAPIDE
tristate "RapIDE interface support"
depends on ARM && ARCH_ACORN
......@@ -1086,9 +1057,6 @@ config IDEDMA_IVB
It is normally safe to answer Y; however, the default is N.
config IDEDMA_AUTO
def_bool IDEDMA_PCI_AUTO || IDEDMA_ICS_AUTO
endif
config BLK_DEV_HD_ONLY
......
......@@ -37,7 +37,6 @@ ide-core-$(CONFIG_BLK_DEV_Q40IDE) += legacy/q40ide.o
# built-in only drivers from ppc/
ide-core-$(CONFIG_BLK_DEV_MPC8xx_IDE) += ppc/mpc8xx.o
ide-core-$(CONFIG_BLK_DEV_IDE_PMAC) += ppc/pmac.o
ide-core-$(CONFIG_BLK_DEV_IDE_CELLEB) += ppc/scc_pata.o
# built-in only drivers from h8300/
ide-core-$(CONFIG_H8300) += h8300/ide-h8300.o
......
......@@ -196,11 +196,6 @@ static void icside_maskproc(ide_drive_t *drive, int mask)
}
#ifdef CONFIG_BLK_DEV_IDEDMA_ICS
#ifndef CONFIG_IDEDMA_ICS_AUTO
#warning CONFIG_IDEDMA_ICS_AUTO=n support is obsolete, and will be removed soon.
#endif
/*
* SG-DMA support.
*
......@@ -474,12 +469,6 @@ static int icside_dma_lostirq(ide_drive_t *drive)
static void icside_dma_init(ide_hwif_t *hwif)
{
int autodma = 0;
#ifdef CONFIG_IDEDMA_ICS_AUTO
autodma = 1;
#endif
printk(" %s: SG-DMA", hwif->name);
hwif->atapi_dma = 1;
......@@ -489,7 +478,7 @@ static void icside_dma_init(ide_hwif_t *hwif)
hwif->dmatable_cpu = NULL;
hwif->dmatable_dma = 0;
hwif->speedproc = icside_set_speed;
hwif->autodma = autodma;
hwif->autodma = 1;
hwif->ide_dma_check = icside_dma_check;
hwif->dma_host_off = icside_dma_host_off;
......
......@@ -767,7 +767,7 @@ int ide_set_dma(ide_drive_t *drive)
switch(rc) {
case -1: /* DMA needs to be disabled */
hwif->dma_off_quietly(drive);
return 0;
return -1;
case 0: /* DMA needs to be enabled */
return hwif->ide_dma_on(drive);
case 1: /* DMA setting cannot be changed */
......
......@@ -177,11 +177,7 @@ DECLARE_MUTEX(ide_cfg_sem);
static int ide_scan_direction; /* THIS was formerly 2.2.x pci=reverse */
#endif
#ifdef CONFIG_IDEDMA_AUTO
int noautodma = 0;
#else
int noautodma = 1;
#endif
EXPORT_SYMBOL(noautodma);
......
......@@ -639,6 +639,7 @@ static int au_ide_probe(struct device *dev)
_auide_hwif *ahwif = &auide_hwif;
ide_hwif_t *hwif;
struct resource *res;
hw_regs_t *hw;
int ret = 0;
#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
......@@ -681,7 +682,7 @@ static int au_ide_probe(struct device *dev)
/* FIXME: This might possibly break PCMCIA IDE devices */
hwif = &ide_hwifs[pdev->id];
hw_regs_t *hw = &hwif->hw;
hw = &hwif->hw;
hwif->irq = hw->irq = ahwif->irq;
hwif->chipset = ide_au1xxx;
......
......@@ -3,6 +3,7 @@ obj-$(CONFIG_BLK_DEV_AEC62XX) += aec62xx.o
obj-$(CONFIG_BLK_DEV_ALI15X3) += alim15x3.o
obj-$(CONFIG_BLK_DEV_AMD74XX) += amd74xx.o
obj-$(CONFIG_BLK_DEV_ATIIXP) += atiixp.o
obj-$(CONFIG_BLK_DEV_CELLEB) += scc_pata.o
obj-$(CONFIG_BLK_DEV_CMD64X) += cmd64x.o
obj-$(CONFIG_BLK_DEV_CS5520) += cs5520.o
obj-$(CONFIG_BLK_DEV_CS5530) += cs5530.o
......
/* $Id: cmd64x.c,v 1.21 2000/01/30 23:23:16
*
* linux/drivers/ide/pci/cmd64x.c Version 1.41 Feb 3, 2007
* linux/drivers/ide/pci/cmd64x.c Version 1.42 Feb 8, 2007
*
* cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines.
* Note, this driver is not used at all on other systems because
......@@ -189,6 +189,11 @@ static int cmd64x_get_info (char *buffer, char **addr, off_t offset, int count)
#endif /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS) */
static u8 quantize_timing(int timing, int quant)
{
return (timing + quant - 1) / quant;
}
/*
* This routine writes the prepared setup/active/recovery counts
* for a drive into the cmd646 chipset registers to active them.
......@@ -268,47 +273,37 @@ static void program_drive_counts (ide_drive_t *drive, int setup_count, int activ
*/
static u8 cmd64x_tune_pio (ide_drive_t *drive, u8 mode_wanted)
{
int setup_time, active_time, recovery_time;
int clock_time, pio_mode, cycle_time;
u8 recovery_count2, cycle_count;
int setup_count, active_count, recovery_count;
int bus_speed = system_bus_clock();
ide_pio_data_t d;
int setup_time, active_time, cycle_time;
u8 cycle_count, setup_count, active_count, recovery_count;
u8 pio_mode;
int clock_time = 1000 / system_bus_clock();
ide_pio_data_t pio;
pio_mode = ide_get_best_pio_mode(drive, mode_wanted, 5, &d);
cycle_time = d.cycle_time;
pio_mode = ide_get_best_pio_mode(drive, mode_wanted, 5, &pio);
cycle_time = pio.cycle_time;
/*
* I copied all this complicated stuff from cmd640.c and made a few
* minor changes. For now I am just going to pray that it is correct.
*/
setup_time = ide_pio_timings[pio_mode].setup_time;
active_time = ide_pio_timings[pio_mode].active_time;
recovery_time = cycle_time - (setup_time + active_time);
clock_time = 1000 / bus_speed;
cycle_count = (cycle_time + clock_time - 1) / clock_time;
setup_count = (setup_time + clock_time - 1) / clock_time;
active_count = (active_time + clock_time - 1) / clock_time;
setup_count = quantize_timing( setup_time, clock_time);
cycle_count = quantize_timing( cycle_time, clock_time);
active_count = quantize_timing(active_time, clock_time);
recovery_count = (recovery_time + clock_time - 1) / clock_time;
recovery_count2 = cycle_count - (setup_count + active_count);
if (recovery_count2 > recovery_count)
recovery_count = recovery_count2;
recovery_count = cycle_count - active_count;
/* program_drive_counts() takes care of zero recovery cycles */
if (recovery_count > 16) {
active_count += recovery_count - 16;
recovery_count = 16;
}
if (active_count > 16)
active_count = 16; /* maximum allowed by cmd646 */
active_count = 16; /* maximum allowed by cmd64x */
program_drive_counts (drive, setup_count, active_count, recovery_count);
cmdprintk("%s: PIO mode wanted %d, selected %d (%dns)%s, "
"clocks=%d/%d/%d\n",
drive->name, mode_wanted, pio_mode, cycle_time,
d.overridden ? " (overriding vendor mode)" : "",
pio.overridden ? " (overriding vendor mode)" : "",
setup_count, active_count, recovery_count);
return pio_mode;
......
......@@ -240,12 +240,31 @@ static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_devi
return 0;
}
/* If libata is configured, jmicron PCI quirk will configure it such
* that the SATA ports are in AHCI function while the PATA ports are
* in a separate IDE function. In such cases, match device class and
* attach only to IDE. If libata isn't configured, keep the old
* behavior for backward compatibility.
*/
#if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE)
#define JMB_CLASS PCI_CLASS_STORAGE_IDE << 8
#define JMB_CLASS_MASK 0xffff00
#else
#define JMB_CLASS 0
#define JMB_CLASS_MASK 0
#endif
static struct pci_device_id jmicron_pci_tbl[] = {
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361,
PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 0},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363,
PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 1},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365,
PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 2},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366,
PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 3},
{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368,
PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 4},
{ 0, },
};
......
......@@ -505,11 +505,6 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi
}
}
}
#ifndef CONFIG_IDEDMA_PCI_AUTO
#warning CONFIG_IDEDMA_PCI_AUTO=n support is obsolete, and will be removed soon.
#endif
#endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
/**
......
......@@ -141,40 +141,6 @@ static int auide_ddma_init( _auide_hwif *auide );
static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif);
int __init auide_probe(void);
#ifdef CONFIG_PM
int au1200ide_pm_callback( au1xxx_power_dev_t *dev,
au1xxx_request_t request, void *data);
static int au1xxxide_pm_standby( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_sleep( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_resume( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_getstatus( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_access( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_idle( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_cleanup( au1xxx_power_dev_t *dev );
#endif
/*
* Multi-Word DMA + DbDMA functions
*/
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
static int auide_build_sglist(ide_drive_t *drive, struct request *rq);
static int auide_build_dmatable(ide_drive_t *drive);
static int auide_dma_end(ide_drive_t *drive);
ide_startstop_t auide_dma_intr (ide_drive_t *drive);
static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command);
static int auide_dma_setup(ide_drive_t *drive);
static int auide_dma_check(ide_drive_t *drive);
static int auide_dma_test_irq(ide_drive_t *drive);
static int auide_dma_host_off(ide_drive_t *drive);
static int auide_dma_host_on(ide_drive_t *drive);
static int auide_dma_lostirq(ide_drive_t *drive);
static int auide_dma_on(ide_drive_t *drive);
static void auide_ddma_tx_callback(int irq, void *param);
static void auide_ddma_rx_callback(int irq, void *param);
static int auide_dma_off_quietly(ide_drive_t *drive);
#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
/*******************************************************************************
* PIO Mode timing calculation : *
* *
......
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