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“5c01fe2b1870361fb8f8e25c461181537b3367f6”上不存在“...sun/git@gitcode.net:openanolis/dragonwell8_jdk.git”
提交 2ee4396a 编写于 作者: L leoliuoc
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ata: sata_zhaoxin: Update Zhaoxin Serial ATA product name 

zhaoxin inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I6J0SW
CVE: NA

----------------------------------------------------------

Change internal project name to external product name.
Signed-off-by: Nleoliuoc <leoliu-oc@zhaoxin.com>
上级 fe71e580
隐藏空白更改
内联 并排
Showing with 49 addition and 49 deletion
drivers/ata/sata_zhaoxin.c
浏览文件 @ 2ee4396a
...@@ -18,7 +18,7 @@ ...@@ -18,7 +18,7 @@
#define DRV_VERSION "2.6.1" #define DRV_VERSION "2.6.1"
enum board_ids_enum { enum board_ids_enum {
cnd001, zx100s,
}; };
enum { enum {
...@@ -37,25 +37,25 @@ enum { ...@@ -37,25 +37,25 @@ enum {
SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */ SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */
}; };
static int szx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); static int zx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static int cnd001_scr_read(struct ata_link *link, unsigned int scr, u32 *val); static int zx_scr_read(struct ata_link *link, unsigned int scr, u32 *val);
static int cnd001_scr_write(struct ata_link *link, unsigned int scr, u32 val); static int zx_scr_write(struct ata_link *link, unsigned int scr, u32 val);
static int szx_hardreset(struct ata_link *link, unsigned int *class, static int zx_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline); unsigned long deadline);
static void szx_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); static void zx_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
static const struct pci_device_id szx_pci_tbl[] = { static const struct pci_device_id zx_pci_tbl[] = {
{ PCI_VDEVICE(ZHAOXIN, 0x9002), cnd001 }, { PCI_VDEVICE(ZHAOXIN, 0x9002), zx100s },
{ PCI_VDEVICE(ZHAOXIN, 0x9003), cnd001 }, { PCI_VDEVICE(ZHAOXIN, 0x9003), zx100s },
{ } /* terminate list */ { } /* terminate list */
}; };
static struct pci_driver szx_pci_driver = { static struct pci_driver zx_pci_driver = {
.name = DRV_NAME, .name = DRV_NAME,
.id_table = szx_pci_tbl, .id_table = zx_pci_tbl,
.probe = szx_init_one, .probe = zx_init_one,
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
.suspend = ata_pci_device_suspend, .suspend = ata_pci_device_suspend,
.resume = ata_pci_device_resume, .resume = ata_pci_device_resume,
...@@ -63,32 +63,32 @@ static struct pci_driver szx_pci_driver = { ...@@ -63,32 +63,32 @@ static struct pci_driver szx_pci_driver = {
.remove = ata_pci_remove_one, .remove = ata_pci_remove_one,
}; };
static struct scsi_host_template szx_sht = { static struct scsi_host_template zx_sht = {
ATA_BMDMA_SHT(DRV_NAME), ATA_BMDMA_SHT(DRV_NAME),
}; };
static struct ata_port_operations szx_base_ops = { static struct ata_port_operations zx_base_ops = {
.inherits = &ata_bmdma_port_ops, .inherits = &ata_bmdma_port_ops,
.sff_tf_load = szx_tf_load, .sff_tf_load = zx_tf_load,
}; };
static struct ata_port_operations cnd001_ops = { static struct ata_port_operations zx_ops = {
.inherits = &szx_base_ops, .inherits = &zx_base_ops,
.hardreset = szx_hardreset, .hardreset = zx_hardreset,
.scr_read = cnd001_scr_read, .scr_read = zx_scr_read,
.scr_write = cnd001_scr_write, .scr_write = zx_scr_write,
}; };
static struct ata_port_info cnd001_port_info = { static struct ata_port_info zx100s_port_info = {
.flags = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS, .flags = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS,
.pio_mask = ATA_PIO4, .pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2, .mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA6, .udma_mask = ATA_UDMA6,
.port_ops = &cnd001_ops, .port_ops = &zx_ops,
}; };
static int szx_hardreset(struct ata_link *link, unsigned int *class, static int zx_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline) unsigned long deadline)
{ {
int rc; int rc;
...@@ -120,7 +120,7 @@ static int szx_hardreset(struct ata_link *link, unsigned int *class, ...@@ -120,7 +120,7 @@ static int szx_hardreset(struct ata_link *link, unsigned int *class,
return rc; return rc;
} }
static int cnd001_scr_read(struct ata_link *link, unsigned int scr, u32 *val) static int zx_scr_read(struct ata_link *link, unsigned int scr, u32 *val)
{ {
static const u8 ipm_tbl[] = { 1, 2, 6, 0 }; static const u8 ipm_tbl[] = { 1, 2, 6, 0 };
struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
...@@ -168,7 +168,7 @@ static int cnd001_scr_read(struct ata_link *link, unsigned int scr, u32 *val) ...@@ -168,7 +168,7 @@ static int cnd001_scr_read(struct ata_link *link, unsigned int scr, u32 *val)
return 0; return 0;
} }
static int cnd001_scr_write(struct ata_link *link, unsigned int scr, u32 val) static int zx_scr_write(struct ata_link *link, unsigned int scr, u32 val)
{ {
struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
int slot = 2 * link->ap->port_no + link->pmp; int slot = 2 * link->ap->port_no + link->pmp;
...@@ -204,7 +204,7 @@ static int cnd001_scr_write(struct ata_link *link, unsigned int scr, u32 val) ...@@ -204,7 +204,7 @@ static int cnd001_scr_write(struct ata_link *link, unsigned int scr, u32 val)
/** /**
* szx_tf_load - send taskfile registers to host controller * zx_tf_load - send taskfile registers to host controller
* @ap: Port to which output is sent * @ap: Port to which output is sent
* @tf: ATA taskfile register set * @tf: ATA taskfile register set
* *
...@@ -214,7 +214,7 @@ static int cnd001_scr_write(struct ata_link *link, unsigned int scr, u32 val) ...@@ -214,7 +214,7 @@ static int cnd001_scr_write(struct ata_link *link, unsigned int scr, u32 val)
* reset the device register after changing the IEN bit on ctl * reset the device register after changing the IEN bit on ctl
* register. * register.
*/ */
static void szx_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) static void zx_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
{ {
struct ata_taskfile ttf; struct ata_taskfile ttf;
...@@ -226,25 +226,25 @@ static void szx_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) ...@@ -226,25 +226,25 @@ static void szx_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
ata_sff_tf_load(ap, tf); ata_sff_tf_load(ap, tf);
} }
static const unsigned int szx_bar_sizes[] = { static const unsigned int zx_bar_sizes[] = {
8, 4, 8, 4, 16, 256 8, 4, 8, 4, 16, 256
}; };
static const unsigned int cnd001_bar_sizes0[] = { static const unsigned int zx100s_bar_sizes0[] = {
8, 4, 8, 4, 16, 0 8, 4, 8, 4, 16, 0
}; };
static const unsigned int cnd001_bar_sizes1[] = { static const unsigned int zx100s_bar_sizes1[] = {
8, 4, 0, 0, 16, 0 8, 4, 0, 0, 16, 0
}; };
static int cnd001_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) static int zx_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
{ {
const struct ata_port_info *ppi0[] = { const struct ata_port_info *ppi0[] = {
&cnd001_port_info, NULL &zx100s_port_info, NULL
}; };
const struct ata_port_info *ppi1[] = { const struct ata_port_info *ppi1[] = {
&cnd001_port_info, &ata_dummy_port_info &zx100s_port_info, &ata_dummy_port_info
}; };
struct ata_host *host; struct ata_host *host;
int i, rc; int i, rc;
...@@ -261,15 +261,15 @@ static int cnd001_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) ...@@ -261,15 +261,15 @@ static int cnd001_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
*r_host = host; *r_host = host;
/* cnd001 9002 hosts four sata ports as M/S of the two channels */ /* 9002 hosts four sata ports as M/S of the two channels */
/* cnd001 9003 hosts two sata ports as M/S of the one channel */ /* 9003 hosts two sata ports as M/S of the one channel */
for (i = 0; i < host->n_ports; i++) for (i = 0; i < host->n_ports; i++)
ata_slave_link_init(host->ports[i]); ata_slave_link_init(host->ports[i]);
return 0; return 0;
} }
static void szx_configure(struct pci_dev *pdev, int board_id) static void zx_configure(struct pci_dev *pdev, int board_id)
{ {
u8 tmp8; u8 tmp8;
...@@ -306,7 +306,7 @@ static void szx_configure(struct pci_dev *pdev, int board_id) ...@@ -306,7 +306,7 @@ static void szx_configure(struct pci_dev *pdev, int board_id)
} }
} }
static int szx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) static int zx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
unsigned int i; unsigned int i;
int rc; int rc;
...@@ -335,14 +335,14 @@ static int szx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -335,14 +335,14 @@ static int szx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
if (rc) if (rc)
return rc; return rc;
if (board_id == cnd001 && pdev->device == 0x9002) if (board_id == zx100s && pdev->device == 0x9002)
bar_sizes = &cnd001_bar_sizes0[0]; bar_sizes = &zx100s_bar_sizes0[0];
else if (board_id == cnd001 && pdev->device == 0x9003) else if (board_id == zx100s && pdev->device == 0x9003)
bar_sizes = &cnd001_bar_sizes1[0]; bar_sizes = &zx100s_bar_sizes1[0];
else else
bar_sizes = &szx_bar_sizes[0]; bar_sizes = &zx_bar_sizes[0];
for (i = 0; i < ARRAY_SIZE(szx_bar_sizes); i++) { for (i = 0; i < ARRAY_SIZE(zx_bar_sizes); i++) {
if ((pci_resource_start(pdev, i) == 0) || if ((pci_resource_start(pdev, i) == 0) ||
(pci_resource_len(pdev, i) < bar_sizes[i])) { (pci_resource_len(pdev, i) < bar_sizes[i])) {
if (bar_sizes[i] == 0) if (bar_sizes[i] == 0)
...@@ -359,8 +359,8 @@ static int szx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -359,8 +359,8 @@ static int szx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
} }
switch (board_id) { switch (board_id) {
case cnd001: case zx100s:
rc = cnd001_prepare_host(pdev, &host); rc = zx_prepare_host(pdev, &host);
break; break;
default: default:
rc = -EINVAL; rc = -EINVAL;
...@@ -368,17 +368,17 @@ static int szx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -368,17 +368,17 @@ static int szx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
if (rc) if (rc)
return rc; return rc;
szx_configure(pdev, board_id); zx_configure(pdev, board_id);
pci_set_master(pdev); pci_set_master(pdev);
return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
IRQF_SHARED, &szx_sht); IRQF_SHARED, &zx_sht);
} }
module_pci_driver(szx_pci_driver); module_pci_driver(zx_pci_driver);
MODULE_AUTHOR("Yanchen:YanchenSun@zhaoxin.com"); MODULE_AUTHOR("Yanchen:YanchenSun@zhaoxin.com");
MODULE_DESCRIPTION("SCSI low-level driver for ZX SATA controllers"); MODULE_DESCRIPTION("SCSI low-level driver for ZX SATA controllers");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, szx_pci_tbl); MODULE_DEVICE_TABLE(pci, zx_pci_tbl);
MODULE_VERSION(DRV_VERSION); MODULE_VERSION(DRV_VERSION);
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